Lines Matching refs:VBinV
1185 i->ARM64in.VBinV.op = op; in ARM64Instr_VBinV()
1186 i->ARM64in.VBinV.dst = dst; in ARM64Instr_VBinV()
1187 i->ARM64in.VBinV.argL = argL; in ARM64Instr_VBinV()
1188 i->ARM64in.VBinV.argR = argR; in ARM64Instr_VBinV()
1782 showARM64VecBinOp(&nm, &ar, i->ARM64in.VBinV.op); in ppARM64Instr()
1784 ppHRegARM64(i->ARM64in.VBinV.dst); in ppARM64Instr()
1786 ppHRegARM64(i->ARM64in.VBinV.argL); in ppARM64Instr()
1788 ppHRegARM64(i->ARM64in.VBinV.argR); in ppARM64Instr()
2185 addHRegUse(u, HRmWrite, i->ARM64in.VBinV.dst); in getRegUsage_ARM64Instr()
2186 addHRegUse(u, HRmRead, i->ARM64in.VBinV.argL); in getRegUsage_ARM64Instr()
2187 addHRegUse(u, HRmRead, i->ARM64in.VBinV.argR); in getRegUsage_ARM64Instr()
2428 i->ARM64in.VBinV.dst = lookupHRegRemap(m, i->ARM64in.VBinV.dst); in mapRegs_ARM64Instr()
2429 i->ARM64in.VBinV.argL = lookupHRegRemap(m, i->ARM64in.VBinV.argL); in mapRegs_ARM64Instr()
2430 i->ARM64in.VBinV.argR = lookupHRegRemap(m, i->ARM64in.VBinV.argR); in mapRegs_ARM64Instr()
4426 UInt vD = qregEnc(i->ARM64in.VBinV.dst); in emit_ARM64Instr()
4427 UInt vN = qregEnc(i->ARM64in.VBinV.argL); in emit_ARM64Instr()
4428 UInt vM = qregEnc(i->ARM64in.VBinV.argR); in emit_ARM64Instr()
4429 switch (i->ARM64in.VBinV.op) { in emit_ARM64Instr()