Lines Matching refs:VCvtSD
1085 i->ARM64in.VCvtSD.sToD = sToD; in ARM64Instr_VCvtSD()
1086 i->ARM64in.VCvtSD.dst = dst; in ARM64Instr_VCvtSD()
1087 i->ARM64in.VCvtSD.src = src; in ARM64Instr_VCvtSD()
1672 vex_printf("fcvt%s ", i->ARM64in.VCvtSD.sToD ? "s2d" : "d2s"); in ppARM64Instr()
1673 if (i->ARM64in.VCvtSD.sToD) { in ppARM64Instr()
1674 ppHRegARM64(i->ARM64in.VCvtSD.dst); in ppARM64Instr()
1676 ppHRegARM64asSreg(i->ARM64in.VCvtSD.src); in ppARM64Instr()
1678 ppHRegARM64asSreg(i->ARM64in.VCvtSD.dst); in ppARM64Instr()
1680 ppHRegARM64(i->ARM64in.VCvtSD.src); in ppARM64Instr()
2130 addHRegUse(u, HRmWrite, i->ARM64in.VCvtSD.dst); in getRegUsage_ARM64Instr()
2131 addHRegUse(u, HRmRead, i->ARM64in.VCvtSD.src); in getRegUsage_ARM64Instr()
2379 i->ARM64in.VCvtSD.dst = lookupHRegRemap(m, i->ARM64in.VCvtSD.dst); in mapRegs_ARM64Instr()
2380 i->ARM64in.VCvtSD.src = lookupHRegRemap(m, i->ARM64in.VCvtSD.src); in mapRegs_ARM64Instr()
4064 UInt dd = dregEnc(i->ARM64in.VCvtSD.dst); in emit_ARM64Instr()
4065 UInt nn = dregEnc(i->ARM64in.VCvtSD.src); in emit_ARM64Instr()
4066 if (i->ARM64in.VCvtSD.sToD) { in emit_ARM64Instr()