Lines Matching refs:VFCSel
1160 i->ARM64in.VFCSel.dst = dst; in ARM64Instr_VFCSel()
1161 i->ARM64in.VFCSel.argL = argL; in ARM64Instr_VFCSel()
1162 i->ARM64in.VFCSel.argR = argR; in ARM64Instr_VFCSel()
1163 i->ARM64in.VFCSel.cond = cond; in ARM64Instr_VFCSel()
1164 i->ARM64in.VFCSel.isD = isD; in ARM64Instr_VFCSel()
1749 = (i->ARM64in.VFCSel.isD ? ppHRegARM64 : ppHRegARM64asSreg); in ppARM64Instr()
1751 ppHRegARM64fp(i->ARM64in.VFCSel.dst); in ppARM64Instr()
1753 ppHRegARM64fp(i->ARM64in.VFCSel.argL); in ppARM64Instr()
1755 ppHRegARM64fp(i->ARM64in.VFCSel.argR); in ppARM64Instr()
1756 vex_printf(", %s", showARM64CondCode(i->ARM64in.VFCSel.cond)); in ppARM64Instr()
2168 addHRegUse(u, HRmRead, i->ARM64in.VFCSel.argL); in getRegUsage_ARM64Instr()
2169 addHRegUse(u, HRmRead, i->ARM64in.VFCSel.argR); in getRegUsage_ARM64Instr()
2170 addHRegUse(u, HRmWrite, i->ARM64in.VFCSel.dst); in getRegUsage_ARM64Instr()
2417 i->ARM64in.VFCSel.argL = lookupHRegRemap(m, i->ARM64in.VFCSel.argL); in mapRegs_ARM64Instr()
2418 i->ARM64in.VFCSel.argR = lookupHRegRemap(m, i->ARM64in.VFCSel.argR); in mapRegs_ARM64Instr()
2419 i->ARM64in.VFCSel.dst = lookupHRegRemap(m, i->ARM64in.VFCSel.dst); in mapRegs_ARM64Instr()
4244 Bool isD = i->ARM64in.VFCSel.isD; in emit_ARM64Instr()
4245 UInt dd = dregEnc(i->ARM64in.VFCSel.dst); in emit_ARM64Instr()
4246 UInt nn = dregEnc(i->ARM64in.VFCSel.argL); in emit_ARM64Instr()
4247 UInt mm = dregEnc(i->ARM64in.VFCSel.argR); in emit_ARM64Instr()
4248 UInt cond = (UInt)i->ARM64in.VFCSel.cond; in emit_ARM64Instr()