Lines Matching refs:VLdStD
1048 i->ARM64in.VLdStD.isLoad = isLoad; in ARM64Instr_VLdStD()
1049 i->ARM64in.VLdStD.dD = dD; in ARM64Instr_VLdStD()
1050 i->ARM64in.VLdStD.rN = rN; in ARM64Instr_VLdStD()
1051 i->ARM64in.VLdStD.uimm12 = uimm12; in ARM64Instr_VLdStD()
1620 if (i->ARM64in.VLdStD.isLoad) { in ppARM64Instr()
1622 ppHRegARM64(i->ARM64in.VLdStD.dD); in ppARM64Instr()
1623 vex_printf(", %u(", i->ARM64in.VLdStD.uimm12); in ppARM64Instr()
1624 ppHRegARM64(i->ARM64in.VLdStD.rN); in ppARM64Instr()
1628 vex_printf("%u(", i->ARM64in.VLdStD.uimm12); in ppARM64Instr()
1629 ppHRegARM64(i->ARM64in.VLdStD.rN); in ppARM64Instr()
1631 ppHRegARM64(i->ARM64in.VLdStD.dD); in ppARM64Instr()
2107 addHRegUse(u, HRmRead, i->ARM64in.VLdStD.rN); in getRegUsage_ARM64Instr()
2108 if (i->ARM64in.VLdStD.isLoad) { in getRegUsage_ARM64Instr()
2109 addHRegUse(u, HRmWrite, i->ARM64in.VLdStD.dD); in getRegUsage_ARM64Instr()
2111 addHRegUse(u, HRmRead, i->ARM64in.VLdStD.dD); in getRegUsage_ARM64Instr()
2363 i->ARM64in.VLdStD.dD = lookupHRegRemap(m, i->ARM64in.VLdStD.dD); in mapRegs_ARM64Instr()
2364 i->ARM64in.VLdStD.rN = lookupHRegRemap(m, i->ARM64in.VLdStD.rN); in mapRegs_ARM64Instr()
3930 UInt dD = dregEnc(i->ARM64in.VLdStD.dD); in emit_ARM64Instr()
3931 UInt rN = iregEnc(i->ARM64in.VLdStD.rN); in emit_ARM64Instr()
3932 UInt uimm12 = i->ARM64in.VLdStD.uimm12; in emit_ARM64Instr()
3933 Bool isLD = i->ARM64in.VLdStD.isLoad; in emit_ARM64Instr()