Lines Matching refs:VLdStQ
1058 i->ARM64in.VLdStQ.isLoad = isLoad; in ARM64Instr_VLdStQ()
1059 i->ARM64in.VLdStQ.rQ = rQ; in ARM64Instr_VLdStQ()
1060 i->ARM64in.VLdStQ.rN = rN; in ARM64Instr_VLdStQ()
1635 if (i->ARM64in.VLdStQ.isLoad) in ppARM64Instr()
1639 ppHRegARM64(i->ARM64in.VLdStQ.rQ); in ppARM64Instr()
1641 ppHRegARM64(i->ARM64in.VLdStQ.rN); in ppARM64Instr()
2115 addHRegUse(u, HRmRead, i->ARM64in.VLdStQ.rN); in getRegUsage_ARM64Instr()
2116 if (i->ARM64in.VLdStQ.isLoad) in getRegUsage_ARM64Instr()
2117 addHRegUse(u, HRmWrite, i->ARM64in.VLdStQ.rQ); in getRegUsage_ARM64Instr()
2119 addHRegUse(u, HRmRead, i->ARM64in.VLdStQ.rQ); in getRegUsage_ARM64Instr()
2367 i->ARM64in.VLdStQ.rQ = lookupHRegRemap(m, i->ARM64in.VLdStQ.rQ); in mapRegs_ARM64Instr()
2368 i->ARM64in.VLdStQ.rN = lookupHRegRemap(m, i->ARM64in.VLdStQ.rN); in mapRegs_ARM64Instr()
3947 UInt rQ = qregEnc(i->ARM64in.VLdStQ.rQ); in emit_ARM64Instr()
3948 UInt rN = iregEnc(i->ARM64in.VLdStQ.rN); in emit_ARM64Instr()
3951 if (i->ARM64in.VLdStQ.isLoad) { in emit_ARM64Instr()