Lines Matching refs:VUnaryD
1109 i->ARM64in.VUnaryD.op = op; in ARM64Instr_VUnaryD()
1110 i->ARM64in.VUnaryD.dst = dst; in ARM64Instr_VUnaryD()
1111 i->ARM64in.VUnaryD.src = src; in ARM64Instr_VUnaryD()
1708 vex_printf("f%s ", showARM64FpUnaryOp(i->ARM64in.VUnaryD.op)); in ppARM64Instr()
1709 ppHRegARM64(i->ARM64in.VUnaryD.dst); in ppARM64Instr()
1711 ppHRegARM64(i->ARM64in.VUnaryD.src); in ppARM64Instr()
2142 addHRegUse(u, HRmWrite, i->ARM64in.VUnaryD.dst); in getRegUsage_ARM64Instr()
2143 addHRegUse(u, HRmRead, i->ARM64in.VUnaryD.src); in getRegUsage_ARM64Instr()
2391 i->ARM64in.VUnaryD.dst = lookupHRegRemap(m, i->ARM64in.VUnaryD.dst); in mapRegs_ARM64Instr()
2392 i->ARM64in.VUnaryD.src = lookupHRegRemap(m, i->ARM64in.VUnaryD.src); in mapRegs_ARM64Instr()
4110 UInt dD = dregEnc(i->ARM64in.VUnaryD.dst); in emit_ARM64Instr()
4111 UInt dN = dregEnc(i->ARM64in.VUnaryD.src); in emit_ARM64Instr()
4114 switch (i->ARM64in.VUnaryD.op) { in emit_ARM64Instr()
4128 if (i->ARM64in.VUnaryD.op == ARM64fpu_RINT) { in emit_ARM64Instr()
4135 if (i->ARM64in.VUnaryD.op == ARM64fpu_RECPX) { in emit_ARM64Instr()