Lines Matching refs:X100
2666 #define X100 BITS4(0, 1,0,0) macro
3313 i->ARM64in.Arith.isAdd ? X100 : X110, in emit_ARM64Instr()
3359 case ARM64lo_AND: opc = X100; break; in emit_ARM64Instr()
3431 *p++ = X_3_6_1_6_6_5_5(X100, X100110, 1, sh, 63, rN, rD); in emit_ARM64Instr()
3451 *p++ = X_3_8_5_6_5_5(X100, X11010110, rM, subOpc, rN, rD); in emit_ARM64Instr()
3701 *p++ = X_3_8_5_6_5_5(X100, X11010100, mm, cond << 2, nn, dd); in emit_ARM64Instr()
3784 *p++ = X_3_8_5_6_5_5(X100, X11011110, mm, X011111, nn, dd); in emit_ARM64Instr()
3787 *p++ = X_3_8_5_6_5_5(X100, X11011010, mm, X011111, nn, dd); in emit_ARM64Instr()
3790 *p++ = X_3_8_5_6_5_5(X100, X11011000, mm, X011111, nn, dd); in emit_ARM64Instr()
3981 *p++ = X_3_5_8_6_5_5(X100, X11110, X00100010, X000000, rN, rD); in emit_ARM64Instr()
3984 *p++ = X_3_5_8_6_5_5(X100, X11110, X01100010, X000000, rN, rD); in emit_ARM64Instr()
3993 *p++ = X_3_5_8_6_5_5(X100, X11110, X00100011, X000000, rN, rD); in emit_ARM64Instr()
3996 *p++ = X_3_5_8_6_5_5(X100, X11110, X01100011, X000000, rN, rD); in emit_ARM64Instr()
4030 *p++ = X_3_5_8_6_5_5(X100, X11110, X01100000 | (armRM << 3), in emit_ARM64Instr()
4034 *p++ = X_3_5_8_6_5_5(X100, X11110, X01100001 | (armRM << 3), in emit_ARM64Instr()
4046 *p++ = X_3_5_8_6_5_5(X100, X11110, X00100000 | (armRM << 3), in emit_ARM64Instr()
4050 *p++ = X_3_5_8_6_5_5(X100, X11110, X00100001 | (armRM << 3), in emit_ARM64Instr()
5390 *p++ = X_3_8_5_6_5_5(fromD ? X100 : X000, in emit_ARM64Instr()