Lines Matching refs:HRmRead
550 addHRegUse(u, HRmRead, am->Mam.IR.base); in addRegUsage_MIPSAMode()
553 addHRegUse(u, HRmRead, am->Mam.RR.base); in addRegUsage_MIPSAMode()
554 addHRegUse(u, HRmRead, am->Mam.RR.index); in addRegUsage_MIPSAMode()
630 addHRegUse(u, HRmRead, op->Mrh.Reg.reg); in addRegUsage_MIPSRH()
1577 addHRegUse(u, HRmRead, i->Min.Alu.srcL); in getRegUsage_MIPSInstr()
1582 addHRegUse(u, HRmRead, i->Min.Shft.srcL); in getRegUsage_MIPSInstr()
1587 addHRegUse(u, HRmRead, i->Min.Cmp.srcL); in getRegUsage_MIPSInstr()
1588 addHRegUse(u, HRmRead, i->Min.Cmp.srcR); in getRegUsage_MIPSInstr()
1592 addHRegUse(u, HRmRead, i->Min.Unary.src); in getRegUsage_MIPSInstr()
1597 addHRegUse(u, HRmRead, i->Min.Mul.srcL); in getRegUsage_MIPSInstr()
1598 addHRegUse(u, HRmRead, i->Min.Mul.srcR); in getRegUsage_MIPSInstr()
1604 addHRegUse(u, HRmRead, i->Min.MtHL.src); in getRegUsage_MIPSInstr()
1608 addHRegUse(u, HRmRead, hregMIPS_HI(mode64)); in getRegUsage_MIPSInstr()
1609 addHRegUse(u, HRmRead, hregMIPS_LO(mode64)); in getRegUsage_MIPSInstr()
1613 addHRegUse(u, HRmRead, i->Min.MtFCSR.src); in getRegUsage_MIPSInstr()
1621 addHRegUse(u, HRmRead, i->Min.Macc.srcL); in getRegUsage_MIPSInstr()
1622 addHRegUse(u, HRmRead, i->Min.Macc.srcR); in getRegUsage_MIPSInstr()
1627 addHRegUse(u, HRmRead, i->Min.Div.srcL); in getRegUsage_MIPSInstr()
1628 addHRegUse(u, HRmRead, i->Min.Div.srcR); in getRegUsage_MIPSInstr()
1635 addHRegUse(u, HRmRead, i->Min.Call.src); in getRegUsage_MIPSInstr()
1663 if (argir & (1<<11)) addHRegUse(u, HRmRead, hregMIPS_GPR11(mode64)); in getRegUsage_MIPSInstr()
1664 if (argir & (1<<10)) addHRegUse(u, HRmRead, hregMIPS_GPR10(mode64)); in getRegUsage_MIPSInstr()
1665 if (argir & (1<<9)) addHRegUse(u, HRmRead, hregMIPS_GPR9(mode64)); in getRegUsage_MIPSInstr()
1666 if (argir & (1<<8)) addHRegUse(u, HRmRead, hregMIPS_GPR8(mode64)); in getRegUsage_MIPSInstr()
1667 if (argir & (1<<7)) addHRegUse(u, HRmRead, hregMIPS_GPR7(mode64)); in getRegUsage_MIPSInstr()
1668 if (argir & (1<<6)) addHRegUse(u, HRmRead, hregMIPS_GPR6(mode64)); in getRegUsage_MIPSInstr()
1669 if (argir & (1<<5)) addHRegUse(u, HRmRead, hregMIPS_GPR5(mode64)); in getRegUsage_MIPSInstr()
1670 if (argir & (1<<4)) addHRegUse(u, HRmRead, hregMIPS_GPR4(mode64)); in getRegUsage_MIPSInstr()
1687 addHRegUse(u, HRmRead, i->Min.XIndir.dstGA); in getRegUsage_MIPSInstr()
1691 addHRegUse(u, HRmRead, i->Min.XAssisted.dstGA); in getRegUsage_MIPSInstr()
1699 addHRegUse(u, HRmRead, i->Min.Store.src); in getRegUsage_MIPSInstr()
1708 addHRegUse(u, HRmRead, i->Min.Cas.addr); in getRegUsage_MIPSInstr()
1709 addHRegUse(u, HRmRead, i->Min.Cas.expd); in getRegUsage_MIPSInstr()
1714 addHRegUse(u, HRmRead, i->Min.StoreC.src); in getRegUsage_MIPSInstr()
1718 addHRegUse(u, (i->Min.RdWrLR.wrLR ? HRmRead : HRmWrite), in getRegUsage_MIPSInstr()
1723 addHRegUse(u, (i->Min.FpLdSt.isLoad ? HRmWrite : HRmRead), in getRegUsage_MIPSInstr()
1728 addHRegUse(u, (i->Min.FpLdSt.isLoad ? HRmWrite : HRmRead), in getRegUsage_MIPSInstr()
1736 addHRegUse(u, HRmRead, i->Min.FpUnary.src); in getRegUsage_MIPSInstr()
1740 addHRegUse(u, HRmRead, i->Min.FpBinary.srcL); in getRegUsage_MIPSInstr()
1741 addHRegUse(u, HRmRead, i->Min.FpBinary.srcR); in getRegUsage_MIPSInstr()
1745 addHRegUse(u, HRmRead, i->Min.FpTernary.src1); in getRegUsage_MIPSInstr()
1746 addHRegUse(u, HRmRead, i->Min.FpTernary.src2); in getRegUsage_MIPSInstr()
1747 addHRegUse(u, HRmRead, i->Min.FpTernary.src3); in getRegUsage_MIPSInstr()
1751 addHRegUse(u, HRmRead, i->Min.FpConvert.src); in getRegUsage_MIPSInstr()
1755 addHRegUse(u, HRmRead, i->Min.FpCompare.srcL); in getRegUsage_MIPSInstr()
1756 addHRegUse(u, HRmRead, i->Min.FpCompare.srcR); in getRegUsage_MIPSInstr()
1760 addHRegUse(u, HRmRead, i->Min.FpGpMove.src); in getRegUsage_MIPSInstr()
1764 addHRegUse(u, HRmRead, i->Min.MoveCond.src); in getRegUsage_MIPSInstr()
1765 addHRegUse(u, HRmRead, i->Min.MoveCond.cond); in getRegUsage_MIPSInstr()