Lines Matching refs:vassert
159 vassert(hregClass(reg) == HRcInt32 || hregClass(reg) == HRcInt64 || in ppHRegMIPS()
166 vassert(r >= 0 && r < 32); in ppHRegMIPS()
171 vassert (r >= 0 && r < 32); in ppHRegMIPS()
176 vassert(r >= 0 && r < 32); in ppHRegMIPS()
181 vassert(r >= 0 && r < 32); in ppHRegMIPS()
589 vassert(imm16 != 0x8000); in MIPSRH_Imm()
590 vassert(syned == True || syned == False); in MIPSRH_Imm()
697 vassert(immR == False); /*there's no nor with an immediate operand!? */ in showMIPSAluOp()
880 vassert(0 == (argiregs & ~mask)); in MIPSInstr_Call()
881 vassert(is_sane_RetLoc(rloc)); in MIPSInstr_Call()
898 vassert(0 == (argiregs & ~mask)); in MIPSInstr_CallAlways()
899 vassert(is_sane_RetLoc(rloc)); in MIPSInstr_CallAlways()
942 vassert(sz == 1 || sz == 2 || sz == 4 || sz == 8); in MIPSInstr_Load()
945 vassert(mode64); in MIPSInstr_Load()
956 vassert(sz == 1 || sz == 2 || sz == 4 || sz == 8); in MIPSInstr_Store()
959 vassert(mode64); in MIPSInstr_Store()
970 vassert(sz == 4 || sz == 8); in MIPSInstr_LoadL()
973 vassert(mode64); in MIPSInstr_LoadL()
987 vassert(sz == 1 || sz == 2 || sz == 4 || sz == 8); in MIPSInstr_Cas()
990 vassert(mode64); in MIPSInstr_Cas()
1001 vassert(sz == 4 || sz == 8); in MIPSInstr_StoreC()
1004 vassert(mode64); in MIPSInstr_StoreC()
1058 vassert(sz == 4 || sz == 8); in MIPSInstr_FpLdSt()
1672 vassert(0 == (argir & ~((1 << 4) | (1 << 5) | (1 << 6) in getRegUsage_MIPSInstr()
1972 vassert(offsetB >= 0); in genSpill_MIPS()
1973 vassert(!hregIsVirtual(rreg)); in genSpill_MIPS()
1979 vassert(mode64); in genSpill_MIPS()
1983 vassert(!mode64); in genSpill_MIPS()
1987 vassert(!mode64); in genSpill_MIPS()
2004 vassert(!hregIsVirtual(rreg)); in genReload_MIPS()
2009 vassert(mode64); in genReload_MIPS()
2013 vassert(!mode64); in genReload_MIPS()
2037 vassert(hregClass(r) == (mode64 ? HRcInt64 : HRcInt32)); in iregNo()
2038 vassert(!hregIsVirtual(r)); in iregNo()
2040 vassert(n <= 32); in iregNo()
2047 vassert(!hregIsVirtual(r)); in fregNo()
2049 vassert(n <= 31); in fregNo()
2056 vassert(!hregIsVirtual(r)); in dregNo()
2058 vassert(n <= 31); in dregNo()
2116 vassert(opc < 0x40); in mkFormI()
2117 vassert(rs < 0x20); in mkFormI()
2118 vassert(rt < 0x20); in mkFormI()
2137 vassert(opc < 0x40); in mkFormR()
2138 vassert(rs < 0x20); in mkFormR()
2139 vassert(rt < 0x20); in mkFormR()
2140 vassert(rd < 0x20); in mkFormR()
2141 vassert(sa < 0x20); in mkFormR()
2153 vassert(opc1 <= 0x3F); in mkFormS()
2154 vassert(rRD < 0x20); in mkFormS()
2155 vassert(rRS < 0x20); in mkFormS()
2156 vassert(rRT < 0x20); in mkFormS()
2157 vassert(opc2 <= 0x3F); in mkFormS()
2158 vassert(sa >= 0 && sa <= 0x3F); in mkFormS()
2170 vassert(am->tag == Mam_IR); in doAMode_IR()
2171 vassert(am->Mam.IR.index < 0x10000); in doAMode_IR()
2210 vassert(am->tag == Mam_RR); in doAMode_RR()
2262 vassert(r_dst < 0x20); in mkLoadImm()
2282 vassert(mode64); in mkLoadImm()
2307 vassert(r_dst < 0x20); in mkLoadImm_EXACTLY2or6()
2327 vassert(mode64); in mkLoadImm_EXACTLY2or6()
2349 vassert(r_dst < 0x20); in isLoadImm_EXACTLY2or6()
2367 vassert(p == (UChar*)&expect[2]); in isLoadImm_EXACTLY2or6()
2386 vassert(p == (UChar*)&expect[6]); in isLoadImm_EXACTLY2or6()
2410 vassert(0 == (am->Mam.IR.index & 3)); in do_load_or_store_machine_word()
2417 vassert(0); in do_load_or_store_machine_word()
2420 vassert(0); in do_load_or_store_machine_word()
2427 vassert(0 == (am->Mam.IR.index & 3)); in do_load_or_store_machine_word()
2434 vassert(0); in do_load_or_store_machine_word()
2437 vassert(0); in do_load_or_store_machine_word()
2453 vassert(0 == (am->Mam.IR.index & 3)); in do_load_or_store_word32()
2460 vassert(0); in do_load_or_store_word32()
2463 vassert(0); in do_load_or_store_word32()
2470 vassert(0 == (am->Mam.IR.index & 3)); in do_load_or_store_word32()
2477 vassert(0); in do_load_or_store_word32()
2480 vassert(0); in do_load_or_store_word32()
2490 vassert(r_dst < 0x20); in mkMoveReg()
2491 vassert(r_src < 0x20); in mkMoveReg()
2516 vassert(nbuf >= 32); in emit_MIPSInstr()
2534 vassert(srcR->Mrh.Imm.syned); in emit_MIPSInstr()
2545 vassert(srcR->Mrh.Imm.syned); in emit_MIPSInstr()
2546 vassert(srcR->Mrh.Imm.imm16 != 0x8000); in emit_MIPSInstr()
2556 vassert(!srcR->Mrh.Imm.syned); in emit_MIPSInstr()
2566 vassert(!srcR->Mrh.Imm.syned); in emit_MIPSInstr()
2588 vassert(!immR); in emit_MIPSInstr()
2594 vassert(!srcR->Mrh.Imm.syned); in emit_MIPSInstr()
2603 vassert(srcR->Mrh.Imm.syned); in emit_MIPSInstr()
2604 vassert(srcR->Mrh.Imm.imm16 != 0x8000); in emit_MIPSInstr()
2640 vassert(sz32); in emit_MIPSInstr()
2646 vassert(n >= 0 && n <= 32); in emit_MIPSInstr()
2655 vassert((n >= 0 && n < 32) || (n > 31 && n < 64)); in emit_MIPSInstr()
2672 vassert(n >= 0 && n < 32); in emit_MIPSInstr()
2682 vassert((n >= 0 && n < 32) || (n > 31 && n < 64)); in emit_MIPSInstr()
2699 vassert(n >= 0 && n < 32); in emit_MIPSInstr()
2709 vassert((n >= 0 && n < 32) || (n > 31 && n < 64)); in emit_MIPSInstr()
2978 vassert(delta >= 20 && delta <= 32); in emit_MIPSInstr()
2993 vassert(disp_cp_chain_me_to_slowEP != NULL); in emit_MIPSInstr()
2994 vassert(disp_cp_chain_me_to_fastEP != NULL); in emit_MIPSInstr()
3003 vassert(i->Min.XDirect.cond != MIPScc_NV); in emit_MIPSInstr()
3038 vassert(delta > 0 && delta < 40); in emit_MIPSInstr()
3057 vassert(disp_cp_xindir != NULL); in emit_MIPSInstr()
3065 vassert(i->Min.XIndir.cond != MIPScc_NV); in emit_MIPSInstr()
3088 vassert(delta > 0 && delta < 40); in emit_MIPSInstr()
3106 vassert(i->Min.XAssisted.cond != MIPScc_NV); in emit_MIPSInstr()
3145 vassert(trcval != 0); in emit_MIPSInstr()
3160 vassert(delta > 0 && delta < 40); in emit_MIPSInstr()
3179 vassert(0 == (am_addr->Mam.IR.index & 3)); in emit_MIPSInstr()
3193 vassert(mode64); in emit_MIPSInstr()
3217 vassert(mode64); in emit_MIPSInstr()
3236 vassert(0 == (am_addr->Mam.IR.index & 3)); in emit_MIPSInstr()
3249 vassert(mode64); in emit_MIPSInstr()
3273 vassert(mode64); in emit_MIPSInstr()
3356 vassert(sz == 4 || sz == 8); in emit_MIPSInstr()
3727 vassert(mode64); in emit_MIPSInstr()
3740 vassert(mode64); in emit_MIPSInstr()
3814 vassert(evCheckSzB_MIPS() == (UChar*)p - (UChar*)p0); in emit_MIPSInstr()
3878 vassert(!(*is_profInc)); in emit_MIPSInstr()
3893 vassert(p - &buf[0] <= 128); in emit_MIPSInstr()
3914 vassert(endness_host == VexEndnessLE || endness_host == VexEndnessBE); in chainXDirect_MIPS()
3925 vassert(0 == (3 & (HWord)p)); in chainXDirect_MIPS()
3926 vassert(isLoadImm_EXACTLY2or6(p, /*r*/9, in chainXDirect_MIPS()
3929 vassert(fetch32(p + (mode64 ? 24 : 8) + 0) == 0x120F809); in chainXDirect_MIPS()
3930 vassert(fetch32(p + (mode64 ? 24 : 8) + 4) == 0x00000000); in chainXDirect_MIPS()
3949 vassert(len == (mode64 ? 32 : 16)); /* stay sane */ in chainXDirect_MIPS()
3962 vassert(endness_host == VexEndnessLE || endness_host == VexEndnessBE); in unchainXDirect_MIPS()
3973 vassert(0 == (3 & (HWord)p)); in unchainXDirect_MIPS()
3974 vassert(isLoadImm_EXACTLY2or6(p, /*r*/ 9, in unchainXDirect_MIPS()
3977 vassert(fetch32(p + (mode64 ? 24 : 8) + 0) == 0x120F809); in unchainXDirect_MIPS()
3978 vassert(fetch32(p + (mode64 ? 24 : 8) + 4) == 0x00000000); in unchainXDirect_MIPS()
3995 vassert(len == (mode64 ? 32 : 16)); /* stay sane */ in unchainXDirect_MIPS()
4007 vassert(endness_host == VexEndnessLE || endness_host == VexEndnessBE); in patchProfInc_MIPS()
4009 vassert(sizeof(ULong*) == 8); in patchProfInc_MIPS()
4011 vassert(sizeof(ULong*) == 4); in patchProfInc_MIPS()
4014 vassert(0 == (3 & (HWord)p)); in patchProfInc_MIPS()
4015 vassert(isLoadImm_EXACTLY2or6((UChar *)p, /*r*/9, in patchProfInc_MIPS()
4020 vassert(fetch32(p + 24 + 0) == 0xDD280000); in patchProfInc_MIPS()
4021 vassert(fetch32(p + 24 + 4) == 0x65080001); in patchProfInc_MIPS()
4022 vassert(fetch32(p + 24 + 8) == 0xFD280000); in patchProfInc_MIPS()
4024 vassert(fetch32(p + 8 + 0) == 0x8D280000); in patchProfInc_MIPS()
4025 vassert(fetch32(p + 8 + 4) == 0x25080001); in patchProfInc_MIPS()
4026 vassert(fetch32(p + 8 + 8) == 0xAD280000); in patchProfInc_MIPS()
4027 vassert(fetch32(p + 8 + 12) == 0x2d010001); in patchProfInc_MIPS()
4028 vassert(fetch32(p + 8 + 16) == 0x8d280004); in patchProfInc_MIPS()
4029 vassert(fetch32(p + 8 + 20) == 0x01014021); in patchProfInc_MIPS()
4030 vassert(fetch32(p + 8 + 24) == 0xad280004); in patchProfInc_MIPS()