Lines Matching refs:PPC64FN
111 #define PPC64FN(f) f macro
114 #define PPC64FN(f) NULL macro
417 = PPC64FN(guest_ppc64_state_requires_precise_mem_exns); in LibVEX_FrontEnd()
418 disInstrFn = PPC64FN(disInstr_PPC); in LibVEX_FrontEnd()
419 specHelper = PPC64FN(guest_ppc64_spechelper); in LibVEX_FrontEnd()
420 guest_layout = PPC64FN(&ppc64Guest_layout); in LibVEX_FrontEnd()
800 = PPC64FN(guest_ppc64_state_requires_precise_mem_exns); in libvex_BackEnd()
905 rRegUniv = PPC64FN(getRRegUniverse_PPC(mode64)); in libvex_BackEnd()
906 isMove = CAST_TO_TYPEOF(isMove) PPC64FN(isMove_PPCInstr); in libvex_BackEnd()
908 = CAST_TO_TYPEOF(getRegUsage) PPC64FN(getRegUsage_PPCInstr); in libvex_BackEnd()
909 mapRegs = CAST_TO_TYPEOF(mapRegs) PPC64FN(mapRegs_PPCInstr); in libvex_BackEnd()
910 genSpill = CAST_TO_TYPEOF(genSpill) PPC64FN(genSpill_PPC); in libvex_BackEnd()
911 genReload = CAST_TO_TYPEOF(genReload) PPC64FN(genReload_PPC); in libvex_BackEnd()
912 ppInstr = CAST_TO_TYPEOF(ppInstr) PPC64FN(ppPPCInstr); in libvex_BackEnd()
913 ppReg = CAST_TO_TYPEOF(ppReg) PPC64FN(ppHRegPPC); in libvex_BackEnd()
914 iselSB = PPC64FN(iselSB_PPC); in libvex_BackEnd()
915 emit = CAST_TO_TYPEOF(emit) PPC64FN(emit_PPCInstr); in libvex_BackEnd()