77 #define TESTINSN_vmov_core_single(instruction, RN, SD, SDval) \  argument
95 #define TESTINSN_vmov_single_core(instruction, SD, RN, RNval) \  argument
134 #define TESTINSN_vmov_2single_2core(instruction, SD1, SD2, RN, RM, RNval, RMval) \  argument
154 #define TESTINSN_vmov_double_2core(instruction, DD, RN, RM, RNval, RMval) \  argument
295 #define TESTINSN_un_f64_q_vmrs(instruction, DD, DM, DMtype, DMval, RN) \  argument
334 #define TESTINSN_vldr_f64(instruction, DD, RN, RNval, imm) \  argument
351 #define TESTINSN_vldr_f32(instruction, SD, RN, RNval, imm) \  argument
452 #define TESTINSN_VSTMIAnoWB(instruction, RN, QD, QDval) \  argument
468 #define TESTINSN_VSTMIAnoWB32(instruction, RN, SD, SDval) \  argument
484 #define TESTINSN_VSTMIAWB(RN, QD1, QD2) \  argument
502 #define TESTINSN_VSTMIAWB32(RN, SD1, SD2) \  argument
520 #define TESTINSN_VSTMDB(RN, QD1, QD2) \  argument
541 #define TESTINSN_VLDMIAnoWB(instruction, RN, QD) \  argument
560 #define TESTINSN_VLDMIAWB(RN, QD1, QD2) \  argument
582 #define TESTINSN_VLDMDB(RN, QD1, QD2) \  argument