Lines Matching refs:xn
180 void Assembler::br(const Register& xn) { in br() argument
181 VIXL_ASSERT(xn.Is64Bits()); in br()
182 Emit(BR | Rn(xn)); in br()
186 void Assembler::blr(const Register& xn) { in blr() argument
187 VIXL_ASSERT(xn.Is64Bits()); in blr()
188 Emit(BLR | Rn(xn)); in blr()
192 void Assembler::ret(const Register& xn) { in ret() argument
193 VIXL_ASSERT(xn.Is64Bits()); in ret()
194 Emit(RET | Rn(xn)); in ret()
891 const Register& xn, in smulh() argument
893 VIXL_ASSERT(xd.Is64Bits() && xn.Is64Bits() && xm.Is64Bits()); in smulh()
894 DataProcessing3Source(xd, xn, xm, xzr, SMULH_x); in smulh()
899 const Register& xn, in umulh() argument
901 VIXL_ASSERT(xd.Is64Bits() && xn.Is64Bits() && xm.Is64Bits()); in umulh()
902 DataProcessing3Source(xd, xn, xm, xzr, UMULH_x); in umulh()
925 void Assembler::rev32(const Register& xd, const Register& xn) { in rev32() argument
927 DataProcessing1Source(xd, xn, REV); in rev32()