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Lines Matching refs:AppendToOutput

4000     AppendToOutput("%c%d", reg_char, reg.GetCode());  in AppendRegisterNameToOutput()
4003 AppendToOutput("%s", reg.Is64Bits() ? "sp" : "wsp"); in AppendRegisterNameToOutput()
4006 AppendToOutput("%czr", reg_char); in AppendRegisterNameToOutput()
4017 AppendToOutput("#-0x%" PRIx64, abs_offset); in AppendPCRelativeOffsetToOutput()
4019 AppendToOutput("#+0x%" PRIx64, offset); in AppendPCRelativeOffsetToOutput()
4027 AppendToOutput("(addr 0x%" PRIxPTR ")", reinterpret_cast<uintptr_t>(addr)); in AppendAddressToOutput()
4048 AppendToOutput("(addr 0x%" PRIx64 ")", rel_addr); in AppendCodeRelativeAddressToOutput()
4050 AppendToOutput("(addr -0x%" PRIx64 ")", -rel_addr); in AppendCodeRelativeAddressToOutput()
4197 AppendToOutput("#%d", imm); in SubstituteRegisterField()
4279 AppendToOutput("v%d", reg_num); in SubstituteRegisterField()
4303 AppendToOutput("#0x%" PRIx32, instr->GetImmMoveWide()); in SubstituteImmediateField()
4305 AppendToOutput(", lsl #%" PRId32, 16 * instr->GetShiftMoveWide()); in SubstituteImmediateField()
4313 AppendToOutput("#0x%" PRIx64, imm); in SubstituteImmediateField()
4320 AppendToOutput("pc%+" PRId32, in SubstituteImmediateField()
4327 AppendToOutput(", #%" PRId32, instr->GetImmLS()); in SubstituteImmediateField()
4335 AppendToOutput(", #%" PRId32, instr->GetImmLSPair() * scale); in SubstituteImmediateField()
4342 AppendToOutput(", #%" PRId32, instr->GetImmLSUnsigned() << shift); in SubstituteImmediateField()
4356 AppendToOutput("#0x%" PRIx64 " (%" PRId64 ")", imm, imm); in SubstituteImmediateField()
4361 AppendToOutput("#%" PRId32, 64 - instr->GetFPScale()); in SubstituteImmediateField()
4364 AppendToOutput("#0x%" PRIx32 " (%.4f)", in SubstituteImmediateField()
4372 AppendToOutput("#0x%" PRIx64, instr->GetImmLogical()); in SubstituteImmediateField()
4377 AppendToOutput("#%c%c%c%c", in SubstituteImmediateField()
4385 AppendToOutput("#%" PRId32, instr->GetImmCondCmp()); in SubstituteImmediateField()
4392 AppendToOutput("#%" PRId32, instr->GetImmS()); in SubstituteImmediateField()
4396 AppendToOutput("#%" PRId32, in SubstituteImmediateField()
4406 AppendToOutput("#%d", shift); in SubstituteImmediateField()
4412 AppendToOutput("#%d", shift); in SubstituteImmediateField()
4422 AppendToOutput("#0x%" PRIx32, instr->GetImmException()); in SubstituteImmediateField()
4428 AppendToOutput("#%" PRId32, instr->GetImmNEONExt()); in SubstituteImmediateField()
4436 AppendToOutput("%d", vm_index); in SubstituteImmediateField()
4449 AppendToOutput("%d", rd_index); in SubstituteImmediateField()
4454 AppendToOutput("%d", rn_index); in SubstituteImmediateField()
4463 AppendToOutput("%d", instr->GetNEONLSIndex(format[8] - '0')); in SubstituteImmediateField()
4469 AppendToOutput("#0x%" PRIx32 " (%.4f)", in SubstituteImmediateField()
4476 AppendToOutput("#0x%" PRIx32 " (%.4f)", in SubstituteImmediateField()
4482 AppendToOutput("#0x%" PRIx64, imm8); in SubstituteImmediateField()
4492 AppendToOutput("#0x%" PRIx64, imm); in SubstituteImmediateField()
4499 AppendToOutput("#%d", shift_amount); in SubstituteImmediateField()
4506 AppendToOutput("#%d", shift_amount); in SubstituteImmediateField()
4520 AppendToOutput("#0x%" PRIx32, instr->GetCRm()); in SubstituteImmediateField()
4539 AppendToOutput("#%d", r); in SubstituteBitfieldImmediateField()
4544 AppendToOutput("#%d", s + 1); in SubstituteBitfieldImmediateField()
4548 AppendToOutput("#%d", s - r + 1); in SubstituteBitfieldImmediateField()
4556 AppendToOutput("#%d", reg_size - r); in SubstituteBitfieldImmediateField()
4619 AppendToOutput(", %s #%" PRId32, in SubstituteShiftField()
4663 AppendToOutput("%s", condition_code[cond]); in SubstituteConditionField()
4688 AppendToOutput(" "); in SubstitutePCRelAddressField()
4724 AppendToOutput(" "); in SubstituteBranchTargetField()
4746 AppendToOutput(", lsl #%" PRId32, instr->GetImmExtendShift()); in SubstituteExtendField()
4749 AppendToOutput(", %s", extend_mode[instr->GetExtendMode()]); in SubstituteExtendField()
4751 AppendToOutput(" #%" PRId32, instr->GetImmExtendShift()); in SubstituteExtendField()
4777 AppendToOutput("%czr", reg_type); in SubstituteLSRegOffsetField()
4779 AppendToOutput("%c%d", reg_type, rm); in SubstituteLSRegOffsetField()
4784 AppendToOutput(", %s", extend_mode[ext]); in SubstituteLSRegOffsetField()
4786 AppendToOutput(" #%d", instr->GetSizeLS()); in SubstituteLSRegOffsetField()
4808 AppendToOutput("#0b%c%c%c%c%c", in SubstitutePrefetchField()
4816 AppendToOutput("p%sl%d%s", hints[hint], target, stream_options[stream]); in SubstitutePrefetchField()
4833 AppendToOutput("%s", options[domain][type]); in SubstituteBarrierField()
4851 AppendToOutput("#%d", op); in SubstituteSysOpField()
4869 AppendToOutput("C%d", cr); in SubstituteCrField()
4879 void Disassembler::AppendToOutput(const char *format, ...) { in AppendToOutput() function in vixl::aarch64::Disassembler