Lines Matching refs:LogicVRegister
360 class LogicVRegister {
362 inline LogicVRegister( in LogicVRegister() function
579 LogicVRegister& SignedSaturate(VectorFormat vform) { in SignedSaturate()
591 LogicVRegister& UnsignedSaturate(VectorFormat vform) { in UnsignedSaturate()
610 LogicVRegister& Round(VectorFormat vform) { in Round()
619 LogicVRegister& Uhalve(VectorFormat vform) { in Uhalve()
635 LogicVRegister& Halve(VectorFormat vform) { in Halve()
1843 void ld1(VectorFormat vform, LogicVRegister dst, uint64_t addr);
1844 void ld1(VectorFormat vform, LogicVRegister dst, int index, uint64_t addr);
1845 void ld1r(VectorFormat vform, LogicVRegister dst, uint64_t addr);
1847 LogicVRegister dst1,
1848 LogicVRegister dst2,
1851 LogicVRegister dst1,
1852 LogicVRegister dst2,
1856 LogicVRegister dst1,
1857 LogicVRegister dst2,
1860 LogicVRegister dst1,
1861 LogicVRegister dst2,
1862 LogicVRegister dst3,
1865 LogicVRegister dst1,
1866 LogicVRegister dst2,
1867 LogicVRegister dst3,
1871 LogicVRegister dst1,
1872 LogicVRegister dst2,
1873 LogicVRegister dst3,
1876 LogicVRegister dst1,
1877 LogicVRegister dst2,
1878 LogicVRegister dst3,
1879 LogicVRegister dst4,
1882 LogicVRegister dst1,
1883 LogicVRegister dst2,
1884 LogicVRegister dst3,
1885 LogicVRegister dst4,
1889 LogicVRegister dst1,
1890 LogicVRegister dst2,
1891 LogicVRegister dst3,
1892 LogicVRegister dst4,
1894 void st1(VectorFormat vform, LogicVRegister src, uint64_t addr);
1895 void st1(VectorFormat vform, LogicVRegister src, int index, uint64_t addr);
1897 LogicVRegister src,
1898 LogicVRegister src2,
1901 LogicVRegister src,
1902 LogicVRegister src2,
1906 LogicVRegister src,
1907 LogicVRegister src2,
1908 LogicVRegister src3,
1911 LogicVRegister src,
1912 LogicVRegister src2,
1913 LogicVRegister src3,
1917 LogicVRegister src,
1918 LogicVRegister src2,
1919 LogicVRegister src3,
1920 LogicVRegister src4,
1923 LogicVRegister src,
1924 LogicVRegister src2,
1925 LogicVRegister src3,
1926 LogicVRegister src4,
1929 LogicVRegister cmp(VectorFormat vform,
1930 LogicVRegister dst,
1931 const LogicVRegister& src1,
1932 const LogicVRegister& src2,
1934 LogicVRegister cmp(VectorFormat vform,
1935 LogicVRegister dst,
1936 const LogicVRegister& src1,
1939 LogicVRegister cmptst(VectorFormat vform,
1940 LogicVRegister dst,
1941 const LogicVRegister& src1,
1942 const LogicVRegister& src2);
1943 LogicVRegister add(VectorFormat vform,
1944 LogicVRegister dst,
1945 const LogicVRegister& src1,
1946 const LogicVRegister& src2);
1947 LogicVRegister addp(VectorFormat vform,
1948 LogicVRegister dst,
1949 const LogicVRegister& src1,
1950 const LogicVRegister& src2);
1951 LogicVRegister mla(VectorFormat vform,
1952 LogicVRegister dst,
1953 const LogicVRegister& src1,
1954 const LogicVRegister& src2);
1955 LogicVRegister mls(VectorFormat vform,
1956 LogicVRegister dst,
1957 const LogicVRegister& src1,
1958 const LogicVRegister& src2);
1959 LogicVRegister mul(VectorFormat vform,
1960 LogicVRegister dst,
1961 const LogicVRegister& src1,
1962 const LogicVRegister& src2);
1963 LogicVRegister mul(VectorFormat vform,
1964 LogicVRegister dst,
1965 const LogicVRegister& src1,
1966 const LogicVRegister& src2,
1968 LogicVRegister mla(VectorFormat vform,
1969 LogicVRegister dst,
1970 const LogicVRegister& src1,
1971 const LogicVRegister& src2,
1973 LogicVRegister mls(VectorFormat vform,
1974 LogicVRegister dst,
1975 const LogicVRegister& src1,
1976 const LogicVRegister& src2,
1978 LogicVRegister pmul(VectorFormat vform,
1979 LogicVRegister dst,
1980 const LogicVRegister& src1,
1981 const LogicVRegister& src2);
1983 typedef LogicVRegister (Simulator::*ByElementOp)(VectorFormat vform,
1984 LogicVRegister dst,
1985 const LogicVRegister& src1,
1986 const LogicVRegister& src2,
1988 LogicVRegister fmul(VectorFormat vform,
1989 LogicVRegister dst,
1990 const LogicVRegister& src1,
1991 const LogicVRegister& src2,
1993 LogicVRegister fmla(VectorFormat vform,
1994 LogicVRegister dst,
1995 const LogicVRegister& src1,
1996 const LogicVRegister& src2,
1998 LogicVRegister fmls(VectorFormat vform,
1999 LogicVRegister dst,
2000 const LogicVRegister& src1,
2001 const LogicVRegister& src2,
2003 LogicVRegister fmulx(VectorFormat vform,
2004 LogicVRegister dst,
2005 const LogicVRegister& src1,
2006 const LogicVRegister& src2,
2008 LogicVRegister smull(VectorFormat vform,
2009 LogicVRegister dst,
2010 const LogicVRegister& src1,
2011 const LogicVRegister& src2,
2013 LogicVRegister smull2(VectorFormat vform,
2014 LogicVRegister dst,
2015 const LogicVRegister& src1,
2016 const LogicVRegister& src2,
2018 LogicVRegister umull(VectorFormat vform,
2019 LogicVRegister dst,
2020 const LogicVRegister& src1,
2021 const LogicVRegister& src2,
2023 LogicVRegister umull2(VectorFormat vform,
2024 LogicVRegister dst,
2025 const LogicVRegister& src1,
2026 const LogicVRegister& src2,
2028 LogicVRegister smlal(VectorFormat vform,
2029 LogicVRegister dst,
2030 const LogicVRegister& src1,
2031 const LogicVRegister& src2,
2033 LogicVRegister smlal2(VectorFormat vform,
2034 LogicVRegister dst,
2035 const LogicVRegister& src1,
2036 const LogicVRegister& src2,
2038 LogicVRegister umlal(VectorFormat vform,
2039 LogicVRegister dst,
2040 const LogicVRegister& src1,
2041 const LogicVRegister& src2,
2043 LogicVRegister umlal2(VectorFormat vform,
2044 LogicVRegister dst,
2045 const LogicVRegister& src1,
2046 const LogicVRegister& src2,
2048 LogicVRegister smlsl(VectorFormat vform,
2049 LogicVRegister dst,
2050 const LogicVRegister& src1,
2051 const LogicVRegister& src2,
2053 LogicVRegister smlsl2(VectorFormat vform,
2054 LogicVRegister dst,
2055 const LogicVRegister& src1,
2056 const LogicVRegister& src2,
2058 LogicVRegister umlsl(VectorFormat vform,
2059 LogicVRegister dst,
2060 const LogicVRegister& src1,
2061 const LogicVRegister& src2,
2063 LogicVRegister umlsl2(VectorFormat vform,
2064 LogicVRegister dst,
2065 const LogicVRegister& src1,
2066 const LogicVRegister& src2,
2068 LogicVRegister sqdmull(VectorFormat vform,
2069 LogicVRegister dst,
2070 const LogicVRegister& src1,
2071 const LogicVRegister& src2,
2073 LogicVRegister sqdmull2(VectorFormat vform,
2074 LogicVRegister dst,
2075 const LogicVRegister& src1,
2076 const LogicVRegister& src2,
2078 LogicVRegister sqdmlal(VectorFormat vform,
2079 LogicVRegister dst,
2080 const LogicVRegister& src1,
2081 const LogicVRegister& src2,
2083 LogicVRegister sqdmlal2(VectorFormat vform,
2084 LogicVRegister dst,
2085 const LogicVRegister& src1,
2086 const LogicVRegister& src2,
2088 LogicVRegister sqdmlsl(VectorFormat vform,
2089 LogicVRegister dst,
2090 const LogicVRegister& src1,
2091 const LogicVRegister& src2,
2093 LogicVRegister sqdmlsl2(VectorFormat vform,
2094 LogicVRegister dst,
2095 const LogicVRegister& src1,
2096 const LogicVRegister& src2,
2098 LogicVRegister sqdmulh(VectorFormat vform,
2099 LogicVRegister dst,
2100 const LogicVRegister& src1,
2101 const LogicVRegister& src2,
2103 LogicVRegister sqrdmulh(VectorFormat vform,
2104 LogicVRegister dst,
2105 const LogicVRegister& src1,
2106 const LogicVRegister& src2,
2108 LogicVRegister sub(VectorFormat vform,
2109 LogicVRegister dst,
2110 const LogicVRegister& src1,
2111 const LogicVRegister& src2);
2112 LogicVRegister and_(VectorFormat vform,
2113 LogicVRegister dst,
2114 const LogicVRegister& src1,
2115 const LogicVRegister& src2);
2116 LogicVRegister orr(VectorFormat vform,
2117 LogicVRegister dst,
2118 const LogicVRegister& src1,
2119 const LogicVRegister& src2);
2120 LogicVRegister orn(VectorFormat vform,
2121 LogicVRegister dst,
2122 const LogicVRegister& src1,
2123 const LogicVRegister& src2);
2124 LogicVRegister eor(VectorFormat vform,
2125 LogicVRegister dst,
2126 const LogicVRegister& src1,
2127 const LogicVRegister& src2);
2128 LogicVRegister bic(VectorFormat vform,
2129 LogicVRegister dst,
2130 const LogicVRegister& src1,
2131 const LogicVRegister& src2);
2132 LogicVRegister bic(VectorFormat vform,
2133 LogicVRegister dst,
2134 const LogicVRegister& src,
2136 LogicVRegister bif(VectorFormat vform,
2137 LogicVRegister dst,
2138 const LogicVRegister& src1,
2139 const LogicVRegister& src2);
2140 LogicVRegister bit(VectorFormat vform,
2141 LogicVRegister dst,
2142 const LogicVRegister& src1,
2143 const LogicVRegister& src2);
2144 LogicVRegister bsl(VectorFormat vform,
2145 LogicVRegister dst,
2146 const LogicVRegister& src1,
2147 const LogicVRegister& src2);
2148 LogicVRegister cls(VectorFormat vform,
2149 LogicVRegister dst,
2150 const LogicVRegister& src);
2151 LogicVRegister clz(VectorFormat vform,
2152 LogicVRegister dst,
2153 const LogicVRegister& src);
2154 LogicVRegister cnt(VectorFormat vform,
2155 LogicVRegister dst,
2156 const LogicVRegister& src);
2157 LogicVRegister not_(VectorFormat vform,
2158 LogicVRegister dst,
2159 const LogicVRegister& src);
2160 LogicVRegister rbit(VectorFormat vform,
2161 LogicVRegister dst,
2162 const LogicVRegister& src);
2163 LogicVRegister rev(VectorFormat vform,
2164 LogicVRegister dst,
2165 const LogicVRegister& src,
2167 LogicVRegister rev16(VectorFormat vform,
2168 LogicVRegister dst,
2169 const LogicVRegister& src);
2170 LogicVRegister rev32(VectorFormat vform,
2171 LogicVRegister dst,
2172 const LogicVRegister& src);
2173 LogicVRegister rev64(VectorFormat vform,
2174 LogicVRegister dst,
2175 const LogicVRegister& src);
2176 LogicVRegister addlp(VectorFormat vform,
2177 LogicVRegister dst,
2178 const LogicVRegister& src,
2181 LogicVRegister saddlp(VectorFormat vform,
2182 LogicVRegister dst,
2183 const LogicVRegister& src);
2184 LogicVRegister uaddlp(VectorFormat vform,
2185 LogicVRegister dst,
2186 const LogicVRegister& src);
2187 LogicVRegister sadalp(VectorFormat vform,
2188 LogicVRegister dst,
2189 const LogicVRegister& src);
2190 LogicVRegister uadalp(VectorFormat vform,
2191 LogicVRegister dst,
2192 const LogicVRegister& src);
2193 LogicVRegister ext(VectorFormat vform,
2194 LogicVRegister dst,
2195 const LogicVRegister& src1,
2196 const LogicVRegister& src2,
2198 LogicVRegister ins_element(VectorFormat vform,
2199 LogicVRegister dst,
2201 const LogicVRegister& src,
2203 LogicVRegister ins_immediate(VectorFormat vform,
2204 LogicVRegister dst,
2207 LogicVRegister dup_element(VectorFormat vform,
2208 LogicVRegister dst,
2209 const LogicVRegister& src,
2211 LogicVRegister dup_immediate(VectorFormat vform,
2212 LogicVRegister dst,
2214 LogicVRegister movi(VectorFormat vform, LogicVRegister dst, uint64_t imm);
2215 LogicVRegister mvni(VectorFormat vform, LogicVRegister dst, uint64_t imm);
2216 LogicVRegister orr(VectorFormat vform,
2217 LogicVRegister dst,
2218 const LogicVRegister& src,
2220 LogicVRegister sshl(VectorFormat vform,
2221 LogicVRegister dst,
2222 const LogicVRegister& src1,
2223 const LogicVRegister& src2);
2224 LogicVRegister ushl(VectorFormat vform,
2225 LogicVRegister dst,
2226 const LogicVRegister& src1,
2227 const LogicVRegister& src2);
2228 LogicVRegister sminmax(VectorFormat vform,
2229 LogicVRegister dst,
2230 const LogicVRegister& src1,
2231 const LogicVRegister& src2,
2233 LogicVRegister smax(VectorFormat vform,
2234 LogicVRegister dst,
2235 const LogicVRegister& src1,
2236 const LogicVRegister& src2);
2237 LogicVRegister smin(VectorFormat vform,
2238 LogicVRegister dst,
2239 const LogicVRegister& src1,
2240 const LogicVRegister& src2);
2241 LogicVRegister sminmaxp(VectorFormat vform,
2242 LogicVRegister dst,
2243 const LogicVRegister& src1,
2244 const LogicVRegister& src2,
2246 LogicVRegister smaxp(VectorFormat vform,
2247 LogicVRegister dst,
2248 const LogicVRegister& src1,
2249 const LogicVRegister& src2);
2250 LogicVRegister sminp(VectorFormat vform,
2251 LogicVRegister dst,
2252 const LogicVRegister& src1,
2253 const LogicVRegister& src2);
2254 LogicVRegister addp(VectorFormat vform,
2255 LogicVRegister dst,
2256 const LogicVRegister& src);
2257 LogicVRegister addv(VectorFormat vform,
2258 LogicVRegister dst,
2259 const LogicVRegister& src);
2260 LogicVRegister uaddlv(VectorFormat vform,
2261 LogicVRegister dst,
2262 const LogicVRegister& src);
2263 LogicVRegister saddlv(VectorFormat vform,
2264 LogicVRegister dst,
2265 const LogicVRegister& src);
2266 LogicVRegister sminmaxv(VectorFormat vform,
2267 LogicVRegister dst,
2268 const LogicVRegister& src,
2270 LogicVRegister smaxv(VectorFormat vform,
2271 LogicVRegister dst,
2272 const LogicVRegister& src);
2273 LogicVRegister sminv(VectorFormat vform,
2274 LogicVRegister dst,
2275 const LogicVRegister& src);
2276 LogicVRegister uxtl(VectorFormat vform,
2277 LogicVRegister dst,
2278 const LogicVRegister& src);
2279 LogicVRegister uxtl2(VectorFormat vform,
2280 LogicVRegister dst,
2281 const LogicVRegister& src);
2282 LogicVRegister sxtl(VectorFormat vform,
2283 LogicVRegister dst,
2284 const LogicVRegister& src);
2285 LogicVRegister sxtl2(VectorFormat vform,
2286 LogicVRegister dst,
2287 const LogicVRegister& src);
2288 LogicVRegister tbl(VectorFormat vform,
2289 LogicVRegister dst,
2290 const LogicVRegister& tab,
2291 const LogicVRegister& ind);
2292 LogicVRegister tbl(VectorFormat vform,
2293 LogicVRegister dst,
2294 const LogicVRegister& tab,
2295 const LogicVRegister& tab2,
2296 const LogicVRegister& ind);
2297 LogicVRegister tbl(VectorFormat vform,
2298 LogicVRegister dst,
2299 const LogicVRegister& tab,
2300 const LogicVRegister& tab2,
2301 const LogicVRegister& tab3,
2302 const LogicVRegister& ind);
2303 LogicVRegister tbl(VectorFormat vform,
2304 LogicVRegister dst,
2305 const LogicVRegister& tab,
2306 const LogicVRegister& tab2,
2307 const LogicVRegister& tab3,
2308 const LogicVRegister& tab4,
2309 const LogicVRegister& ind);
2310 LogicVRegister Table(VectorFormat vform,
2311 LogicVRegister dst,
2312 const LogicVRegister& ind,
2314 const LogicVRegister* tab1,
2315 const LogicVRegister* tab2 = NULL,
2316 const LogicVRegister* tab3 = NULL,
2317 const LogicVRegister* tab4 = NULL);
2318 LogicVRegister tbx(VectorFormat vform,
2319 LogicVRegister dst,
2320 const LogicVRegister& tab,
2321 const LogicVRegister& ind);
2322 LogicVRegister tbx(VectorFormat vform,
2323 LogicVRegister dst,
2324 const LogicVRegister& tab,
2325 const LogicVRegister& tab2,
2326 const LogicVRegister& ind);
2327 LogicVRegister tbx(VectorFormat vform,
2328 LogicVRegister dst,
2329 const LogicVRegister& tab,
2330 const LogicVRegister& tab2,
2331 const LogicVRegister& tab3,
2332 const LogicVRegister& ind);
2333 LogicVRegister tbx(VectorFormat vform,
2334 LogicVRegister dst,
2335 const LogicVRegister& tab,
2336 const LogicVRegister& tab2,
2337 const LogicVRegister& tab3,
2338 const LogicVRegister& tab4,
2339 const LogicVRegister& ind);
2340 LogicVRegister uaddl(VectorFormat vform,
2341 LogicVRegister dst,
2342 const LogicVRegister& src1,
2343 const LogicVRegister& src2);
2344 LogicVRegister uaddl2(VectorFormat vform,
2345 LogicVRegister dst,
2346 const LogicVRegister& src1,
2347 const LogicVRegister& src2);
2348 LogicVRegister uaddw(VectorFormat vform,
2349 LogicVRegister dst,
2350 const LogicVRegister& src1,
2351 const LogicVRegister& src2);
2352 LogicVRegister uaddw2(VectorFormat vform,
2353 LogicVRegister dst,
2354 const LogicVRegister& src1,
2355 const LogicVRegister& src2);
2356 LogicVRegister saddl(VectorFormat vform,
2357 LogicVRegister dst,
2358 const LogicVRegister& src1,
2359 const LogicVRegister& src2);
2360 LogicVRegister saddl2(VectorFormat vform,
2361 LogicVRegister dst,
2362 const LogicVRegister& src1,
2363 const LogicVRegister& src2);
2364 LogicVRegister saddw(VectorFormat vform,
2365 LogicVRegister dst,
2366 const LogicVRegister& src1,
2367 const LogicVRegister& src2);
2368 LogicVRegister saddw2(VectorFormat vform,
2369 LogicVRegister dst,
2370 const LogicVRegister& src1,
2371 const LogicVRegister& src2);
2372 LogicVRegister usubl(VectorFormat vform,
2373 LogicVRegister dst,
2374 const LogicVRegister& src1,
2375 const LogicVRegister& src2);
2376 LogicVRegister usubl2(VectorFormat vform,
2377 LogicVRegister dst,
2378 const LogicVRegister& src1,
2379 const LogicVRegister& src2);
2380 LogicVRegister usubw(VectorFormat vform,
2381 LogicVRegister dst,
2382 const LogicVRegister& src1,
2383 const LogicVRegister& src2);
2384 LogicVRegister usubw2(VectorFormat vform,
2385 LogicVRegister dst,
2386 const LogicVRegister& src1,
2387 const LogicVRegister& src2);
2388 LogicVRegister ssubl(VectorFormat vform,
2389 LogicVRegister dst,
2390 const LogicVRegister& src1,
2391 const LogicVRegister& src2);
2392 LogicVRegister ssubl2(VectorFormat vform,
2393 LogicVRegister dst,
2394 const LogicVRegister& src1,
2395 const LogicVRegister& src2);
2396 LogicVRegister ssubw(VectorFormat vform,
2397 LogicVRegister dst,
2398 const LogicVRegister& src1,
2399 const LogicVRegister& src2);
2400 LogicVRegister ssubw2(VectorFormat vform,
2401 LogicVRegister dst,
2402 const LogicVRegister& src1,
2403 const LogicVRegister& src2);
2404 LogicVRegister uminmax(VectorFormat vform,
2405 LogicVRegister dst,
2406 const LogicVRegister& src1,
2407 const LogicVRegister& src2,
2409 LogicVRegister umax(VectorFormat vform,
2410 LogicVRegister dst,
2411 const LogicVRegister& src1,
2412 const LogicVRegister& src2);
2413 LogicVRegister umin(VectorFormat vform,
2414 LogicVRegister dst,
2415 const LogicVRegister& src1,
2416 const LogicVRegister& src2);
2417 LogicVRegister uminmaxp(VectorFormat vform,
2418 LogicVRegister dst,
2419 const LogicVRegister& src1,
2420 const LogicVRegister& src2,
2422 LogicVRegister umaxp(VectorFormat vform,
2423 LogicVRegister dst,
2424 const LogicVRegister& src1,
2425 const LogicVRegister& src2);
2426 LogicVRegister uminp(VectorFormat vform,
2427 LogicVRegister dst,
2428 const LogicVRegister& src1,
2429 const LogicVRegister& src2);
2430 LogicVRegister uminmaxv(VectorFormat vform,
2431 LogicVRegister dst,
2432 const LogicVRegister& src,
2434 LogicVRegister umaxv(VectorFormat vform,
2435 LogicVRegister dst,
2436 const LogicVRegister& src);
2437 LogicVRegister uminv(VectorFormat vform,
2438 LogicVRegister dst,
2439 const LogicVRegister& src);
2440 LogicVRegister trn1(VectorFormat vform,
2441 LogicVRegister dst,
2442 const LogicVRegister& src1,
2443 const LogicVRegister& src2);
2444 LogicVRegister trn2(VectorFormat vform,
2445 LogicVRegister dst,
2446 const LogicVRegister& src1,
2447 const LogicVRegister& src2);
2448 LogicVRegister zip1(VectorFormat vform,
2449 LogicVRegister dst,
2450 const LogicVRegister& src1,
2451 const LogicVRegister& src2);
2452 LogicVRegister zip2(VectorFormat vform,
2453 LogicVRegister dst,
2454 const LogicVRegister& src1,
2455 const LogicVRegister& src2);
2456 LogicVRegister uzp1(VectorFormat vform,
2457 LogicVRegister dst,
2458 const LogicVRegister& src1,
2459 const LogicVRegister& src2);
2460 LogicVRegister uzp2(VectorFormat vform,
2461 LogicVRegister dst,
2462 const LogicVRegister& src1,
2463 const LogicVRegister& src2);
2464 LogicVRegister shl(VectorFormat vform,
2465 LogicVRegister dst,
2466 const LogicVRegister& src,
2468 LogicVRegister scvtf(VectorFormat vform,
2469 LogicVRegister dst,
2470 const LogicVRegister& src,
2473 LogicVRegister ucvtf(VectorFormat vform,
2474 LogicVRegister dst,
2475 const LogicVRegister& src,
2478 LogicVRegister sshll(VectorFormat vform,
2479 LogicVRegister dst,
2480 const LogicVRegister& src,
2482 LogicVRegister sshll2(VectorFormat vform,
2483 LogicVRegister dst,
2484 const LogicVRegister& src,
2486 LogicVRegister shll(VectorFormat vform,
2487 LogicVRegister dst,
2488 const LogicVRegister& src);
2489 LogicVRegister shll2(VectorFormat vform,
2490 LogicVRegister dst,
2491 const LogicVRegister& src);
2492 LogicVRegister ushll(VectorFormat vform,
2493 LogicVRegister dst,
2494 const LogicVRegister& src,
2496 LogicVRegister ushll2(VectorFormat vform,
2497 LogicVRegister dst,
2498 const LogicVRegister& src,
2500 LogicVRegister sli(VectorFormat vform,
2501 LogicVRegister dst,
2502 const LogicVRegister& src,
2504 LogicVRegister sri(VectorFormat vform,
2505 LogicVRegister dst,
2506 const LogicVRegister& src,
2508 LogicVRegister sshr(VectorFormat vform,
2509 LogicVRegister dst,
2510 const LogicVRegister& src,
2512 LogicVRegister ushr(VectorFormat vform,
2513 LogicVRegister dst,
2514 const LogicVRegister& src,
2516 LogicVRegister ssra(VectorFormat vform,
2517 LogicVRegister dst,
2518 const LogicVRegister& src,
2520 LogicVRegister usra(VectorFormat vform,
2521 LogicVRegister dst,
2522 const LogicVRegister& src,
2524 LogicVRegister srsra(VectorFormat vform,
2525 LogicVRegister dst,
2526 const LogicVRegister& src,
2528 LogicVRegister ursra(VectorFormat vform,
2529 LogicVRegister dst,
2530 const LogicVRegister& src,
2532 LogicVRegister suqadd(VectorFormat vform,
2533 LogicVRegister dst,
2534 const LogicVRegister& src);
2535 LogicVRegister usqadd(VectorFormat vform,
2536 LogicVRegister dst,
2537 const LogicVRegister& src);
2538 LogicVRegister sqshl(VectorFormat vform,
2539 LogicVRegister dst,
2540 const LogicVRegister& src,
2542 LogicVRegister uqshl(VectorFormat vform,
2543 LogicVRegister dst,
2544 const LogicVRegister& src,
2546 LogicVRegister sqshlu(VectorFormat vform,
2547 LogicVRegister dst,
2548 const LogicVRegister& src,
2550 LogicVRegister abs(VectorFormat vform,
2551 LogicVRegister dst,
2552 const LogicVRegister& src);
2553 LogicVRegister neg(VectorFormat vform,
2554 LogicVRegister dst,
2555 const LogicVRegister& src);
2556 LogicVRegister extractnarrow(VectorFormat vform,
2557 LogicVRegister dst,
2559 const LogicVRegister& src,
2561 LogicVRegister xtn(VectorFormat vform,
2562 LogicVRegister dst,
2563 const LogicVRegister& src);
2564 LogicVRegister sqxtn(VectorFormat vform,
2565 LogicVRegister dst,
2566 const LogicVRegister& src);
2567 LogicVRegister uqxtn(VectorFormat vform,
2568 LogicVRegister dst,
2569 const LogicVRegister& src);
2570 LogicVRegister sqxtun(VectorFormat vform,
2571 LogicVRegister dst,
2572 const LogicVRegister& src);
2573 LogicVRegister absdiff(VectorFormat vform,
2574 LogicVRegister dst,
2575 const LogicVRegister& src1,
2576 const LogicVRegister& src2,
2578 LogicVRegister saba(VectorFormat vform,
2579 LogicVRegister dst,
2580 const LogicVRegister& src1,
2581 const LogicVRegister& src2);
2582 LogicVRegister uaba(VectorFormat vform,
2583 LogicVRegister dst,
2584 const LogicVRegister& src1,
2585 const LogicVRegister& src2);
2586 LogicVRegister shrn(VectorFormat vform,
2587 LogicVRegister dst,
2588 const LogicVRegister& src,
2590 LogicVRegister shrn2(VectorFormat vform,
2591 LogicVRegister dst,
2592 const LogicVRegister& src,
2594 LogicVRegister rshrn(VectorFormat vform,
2595 LogicVRegister dst,
2596 const LogicVRegister& src,
2598 LogicVRegister rshrn2(VectorFormat vform,
2599 LogicVRegister dst,
2600 const LogicVRegister& src,
2602 LogicVRegister uqshrn(VectorFormat vform,
2603 LogicVRegister dst,
2604 const LogicVRegister& src,
2606 LogicVRegister uqshrn2(VectorFormat vform,
2607 LogicVRegister dst,
2608 const LogicVRegister& src,
2610 LogicVRegister uqrshrn(VectorFormat vform,
2611 LogicVRegister dst,
2612 const LogicVRegister& src,
2614 LogicVRegister uqrshrn2(VectorFormat vform,
2615 LogicVRegister dst,
2616 const LogicVRegister& src,
2618 LogicVRegister sqshrn(VectorFormat vform,
2619 LogicVRegister dst,
2620 const LogicVRegister& src,
2622 LogicVRegister sqshrn2(VectorFormat vform,
2623 LogicVRegister dst,
2624 const LogicVRegister& src,
2626 LogicVRegister sqrshrn(VectorFormat vform,
2627 LogicVRegister dst,
2628 const LogicVRegister& src,
2630 LogicVRegister sqrshrn2(VectorFormat vform,
2631 LogicVRegister dst,
2632 const LogicVRegister& src,
2634 LogicVRegister sqshrun(VectorFormat vform,
2635 LogicVRegister dst,
2636 const LogicVRegister& src,
2638 LogicVRegister sqshrun2(VectorFormat vform,
2639 LogicVRegister dst,
2640 const LogicVRegister& src,
2642 LogicVRegister sqrshrun(VectorFormat vform,
2643 LogicVRegister dst,
2644 const LogicVRegister& src,
2646 LogicVRegister sqrshrun2(VectorFormat vform,
2647 LogicVRegister dst,
2648 const LogicVRegister& src,
2650 LogicVRegister sqrdmulh(VectorFormat vform,
2651 LogicVRegister dst,
2652 const LogicVRegister& src1,
2653 const LogicVRegister& src2,
2655 LogicVRegister sqdmulh(VectorFormat vform,
2656 LogicVRegister dst,
2657 const LogicVRegister& src1,
2658 const LogicVRegister& src2);
2698 LogicVRegister FXN(VectorFormat vform, \
2699 LogicVRegister dst, \
2700 const LogicVRegister& src1, \
2701 const LogicVRegister& src2);
2718 LogicVRegister FN(VectorFormat vform, \
2719 LogicVRegister dst, \
2720 const LogicVRegister& src1, \
2721 const LogicVRegister& src2); \
2722 LogicVRegister FN(VectorFormat vform, \
2723 LogicVRegister dst, \
2724 const LogicVRegister& src1, \
2725 const LogicVRegister& src2);
2737 LogicVRegister FNP(VectorFormat vform, \
2738 LogicVRegister dst, \
2739 const LogicVRegister& src1, \
2740 const LogicVRegister& src2); \
2741 LogicVRegister FNP(VectorFormat vform, \
2742 LogicVRegister dst, \
2743 const LogicVRegister& src);
2748 LogicVRegister frecps(VectorFormat vform,
2749 LogicVRegister dst,
2750 const LogicVRegister& src1,
2751 const LogicVRegister& src2);
2752 LogicVRegister frecps(VectorFormat vform,
2753 LogicVRegister dst,
2754 const LogicVRegister& src1,
2755 const LogicVRegister& src2);
2757 LogicVRegister frsqrts(VectorFormat vform,
2758 LogicVRegister dst,
2759 const LogicVRegister& src1,
2760 const LogicVRegister& src2);
2761 LogicVRegister frsqrts(VectorFormat vform,
2762 LogicVRegister dst,
2763 const LogicVRegister& src1,
2764 const LogicVRegister& src2);
2766 LogicVRegister fmla(VectorFormat vform,
2767 LogicVRegister dst,
2768 const LogicVRegister& src1,
2769 const LogicVRegister& src2);
2770 LogicVRegister fmla(VectorFormat vform,
2771 LogicVRegister dst,
2772 const LogicVRegister& src1,
2773 const LogicVRegister& src2);
2775 LogicVRegister fmls(VectorFormat vform,
2776 LogicVRegister dst,
2777 const LogicVRegister& src1,
2778 const LogicVRegister& src2);
2779 LogicVRegister fmls(VectorFormat vform,
2780 LogicVRegister dst,
2781 const LogicVRegister& src1,
2782 const LogicVRegister& src2);
2783 LogicVRegister fnmul(VectorFormat vform,
2784 LogicVRegister dst,
2785 const LogicVRegister& src1,
2786 const LogicVRegister& src2);
2789 LogicVRegister fcmp(VectorFormat vform,
2790 LogicVRegister dst,
2791 const LogicVRegister& src1,
2792 const LogicVRegister& src2,
2794 LogicVRegister fcmp(VectorFormat vform,
2795 LogicVRegister dst,
2796 const LogicVRegister& src1,
2797 const LogicVRegister& src2,
2799 LogicVRegister fabscmp(VectorFormat vform,
2800 LogicVRegister dst,
2801 const LogicVRegister& src1,
2802 const LogicVRegister& src2,
2804 LogicVRegister fcmp_zero(VectorFormat vform,
2805 LogicVRegister dst,
2806 const LogicVRegister& src,
2810 LogicVRegister fneg(VectorFormat vform,
2811 LogicVRegister dst,
2812 const LogicVRegister& src);
2813 LogicVRegister fneg(VectorFormat vform,
2814 LogicVRegister dst,
2815 const LogicVRegister& src);
2817 LogicVRegister frecpx(VectorFormat vform,
2818 LogicVRegister dst,
2819 const LogicVRegister& src);
2820 LogicVRegister frecpx(VectorFormat vform,
2821 LogicVRegister dst,
2822 const LogicVRegister& src);
2824 LogicVRegister fabs_(VectorFormat vform,
2825 LogicVRegister dst,
2826 const LogicVRegister& src);
2827 LogicVRegister fabs_(VectorFormat vform,
2828 LogicVRegister dst,
2829 const LogicVRegister& src);
2830 LogicVRegister fabd(VectorFormat vform,
2831 LogicVRegister dst,
2832 const LogicVRegister& src1,
2833 const LogicVRegister& src2);
2834 LogicVRegister frint(VectorFormat vform,
2835 LogicVRegister dst,
2836 const LogicVRegister& src,
2839 LogicVRegister fcvts(VectorFormat vform,
2840 LogicVRegister dst,
2841 const LogicVRegister& src,
2844 LogicVRegister fcvtu(VectorFormat vform,
2845 LogicVRegister dst,
2846 const LogicVRegister& src,
2849 LogicVRegister fcvtl(VectorFormat vform,
2850 LogicVRegister dst,
2851 const LogicVRegister& src);
2852 LogicVRegister fcvtl2(VectorFormat vform,
2853 LogicVRegister dst,
2854 const LogicVRegister& src);
2855 LogicVRegister fcvtn(VectorFormat vform,
2856 LogicVRegister dst,
2857 const LogicVRegister& src);
2858 LogicVRegister fcvtn2(VectorFormat vform,
2859 LogicVRegister dst,
2860 const LogicVRegister& src);
2861 LogicVRegister fcvtxn(VectorFormat vform,
2862 LogicVRegister dst,
2863 const LogicVRegister& src);
2864 LogicVRegister fcvtxn2(VectorFormat vform,
2865 LogicVRegister dst,
2866 const LogicVRegister& src);
2867 LogicVRegister fsqrt(VectorFormat vform,
2868 LogicVRegister dst,
2869 const LogicVRegister& src);
2870 LogicVRegister frsqrte(VectorFormat vform,
2871 LogicVRegister dst,
2872 const LogicVRegister& src);
2873 LogicVRegister frecpe(VectorFormat vform,
2874 LogicVRegister dst,
2875 const LogicVRegister& src,
2877 LogicVRegister ursqrte(VectorFormat vform,
2878 LogicVRegister dst,
2879 const LogicVRegister& src);
2880 LogicVRegister urecpe(VectorFormat vform,
2881 LogicVRegister dst,
2882 const LogicVRegister& src);
2886 LogicVRegister fminmaxv(VectorFormat vform,
2887 LogicVRegister dst,
2888 const LogicVRegister& src,
2891 LogicVRegister fminv(VectorFormat vform,
2892 LogicVRegister dst,
2893 const LogicVRegister& src);
2894 LogicVRegister fmaxv(VectorFormat vform,
2895 LogicVRegister dst,
2896 const LogicVRegister& src);
2897 LogicVRegister fminnmv(VectorFormat vform,
2898 LogicVRegister dst,
2899 const LogicVRegister& src);
2900 LogicVRegister fmaxnmv(VectorFormat vform,
2901 LogicVRegister dst,
2902 const LogicVRegister& src);