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1 #ifndef _GPXE_ATA_H
2 #define _GPXE_ATA_H
3 
4 #include <stdint.h>
5 #include <gpxe/blockdev.h>
6 #include <gpxe/uaccess.h>
7 #include <gpxe/refcnt.h>
8 
9 /** @file
10  *
11  * ATA devices
12  *
13  */
14 
15 FILE_LICENCE ( GPL2_OR_LATER );
16 
17 /**
18  * An ATA Logical Block Address
19  *
20  * ATA controllers have three byte-wide registers for specifying the
21  * block address: LBA Low, LBA Mid and LBA High.  This allows for a
22  * 24-bit address.  Some devices support the "48-bit address feature
23  * set" (LBA48), in which case each of these byte-wide registers is
24  * actually a two-entry FIFO, and the "previous" byte pushed into the
25  * FIFO is used as the corresponding high-order byte.  So, to set up
26  * the 48-bit address 0x123456abcdef, you would issue
27  *
28  *     0x56 -> LBA Low register
29  *     0xef -> LBA Low register
30  *     0x34 -> LBA Mid register
31  *     0xcd -> LBA Mid register
32  *     0x12 -> LBA High register
33  *     0xab -> LBA High register
34  *
35  * This structure encapsulates this information by providing a single
36  * 64-bit integer in native byte order, unioned with bytes named so
37  * that the sequence becomes
38  *
39  *     low_prev  -> LBA Low register
40  *     low_cur   -> LBA Low register
41  *     mid_prev  -> LBA Mid register
42  *     mid_cur   -> LBA Mid register
43  *     high_prev -> LBA High register
44  *     high_cur  -> LBA High register
45  *
46  * Just to complicate matters further, in non-LBA48 mode it is
47  * possible to have a 28-bit address, in which case bits 27:24 must be
48  * written into the low four bits of the Device register.
49  */
50 union ata_lba {
51 	/** LBA as a 64-bit integer in native-endian order */
52 	uint64_t native;
53 	/** ATA registers */
54 	struct {
55 #if __BYTE_ORDER == __LITTLE_ENDIAN
56 		uint8_t low_cur;
57 		uint8_t mid_cur;
58 		uint8_t high_cur;
59 		uint8_t low_prev;
60 		uint8_t mid_prev;
61 		uint8_t high_prev;
62 		uint16_t pad;
63 #elif __BYTE_ORDER == __BIG_ENDIAN
64 		uint16_t pad;
65 		uint8_t high_prev;
66 		uint8_t mid_prev;
67 		uint8_t low_prev;
68 		uint8_t high_cur;
69 		uint8_t mid_cur;
70 		uint8_t low_cur;
71 #else
72 #error "I need a byte order"
73 #endif
74 	} bytes;
75 };
76 
77 /** An ATA 2-byte FIFO register */
78 union ata_fifo {
79 	/** Value in native-endian order */
80 	uint16_t native;
81 	/** ATA registers */
82 	struct {
83 #if __BYTE_ORDER == __LITTLE_ENDIAN
84 		uint8_t cur;
85 		uint8_t prev;
86 #elif __BYTE_ORDER == __BIG_ENDIAN
87 		uint8_t prev;
88 		uint8_t cur;
89 #else
90 #error "I need a byte order"
91 #endif
92 	} bytes;
93 };
94 
95 /** ATA command block */
96 struct ata_cb {
97 	/** Logical block address */
98 	union ata_lba lba;
99 	/** Sector count */
100 	union ata_fifo count;
101 	/** Error/feature register */
102 	union ata_fifo err_feat;
103 	/** Device register */
104 	uint8_t device;
105 	/** Command/status register */
106 	uint8_t cmd_stat;
107 	/** LBA48 addressing flag */
108 	int lba48;
109 };
110 
111 /** Obsolete bits in the ATA device register */
112 #define ATA_DEV_OBSOLETE 0xa0
113 
114 /** LBA flag in the ATA device register */
115 #define ATA_DEV_LBA 0x40
116 
117 /** Slave ("device 1") flag in the ATA device register */
118 #define ATA_DEV_SLAVE 0x10
119 
120 /** Master ("device 0") flag in the ATA device register */
121 #define ATA_DEV_MASTER 0x00
122 
123 /** Mask of non-LBA portion of device register */
124 #define ATA_DEV_MASK 0xf0
125 
126 /** "Read sectors" command */
127 #define ATA_CMD_READ 0x20
128 
129 /** "Read sectors (ext)" command */
130 #define ATA_CMD_READ_EXT 0x24
131 
132 /** "Write sectors" command */
133 #define ATA_CMD_WRITE 0x30
134 
135 /** "Write sectors (ext)" command */
136 #define ATA_CMD_WRITE_EXT 0x34
137 
138 /** "Identify" command */
139 #define ATA_CMD_IDENTIFY 0xec
140 
141 /** An ATA command */
142 struct ata_command {
143 	/** ATA command block */
144 	struct ata_cb cb;
145 	/** Data-out buffer (may be NULL)
146 	 *
147 	 * If non-NULL, this buffer must be ata_command::cb::count
148 	 * sectors in size.
149 	 */
150 	userptr_t data_out;
151 	/** Data-in buffer (may be NULL)
152 	 *
153 	 * If non-NULL, this buffer must be ata_command::cb::count
154 	 * sectors in size.
155 	 */
156 	userptr_t data_in;
157 	/** Command status code */
158 	int rc;
159 };
160 
161 /**
162  * Structure returned by ATA IDENTIFY command
163  *
164  * This is a huge structure with many fields that we don't care about,
165  * so we implement only a few fields.
166  */
167 struct ata_identity {
168 	uint16_t ignore_a[60]; /* words 0-59 */
169 	uint32_t lba_sectors; /* words 60-61 */
170 	uint16_t ignore_b[21]; /* words 62-82 */
171 	uint16_t supports_lba48; /* word 83 */
172 	uint16_t ignore_c[16]; /* words 84-99 */
173 	uint64_t lba48_sectors; /* words 100-103 */
174 	uint16_t ignore_d[152]; /* words 104-255 */
175 };
176 
177 /** Supports LBA48 flag */
178 #define ATA_SUPPORTS_LBA48 ( 1 << 10 )
179 
180 /** ATA sector size */
181 #define ATA_SECTOR_SIZE 512
182 
183 /** An ATA device */
184 struct ata_device {
185 	/** Block device interface */
186 	struct block_device blockdev;
187 	/** Device number
188 	 *
189 	 * Must be ATA_DEV_MASTER or ATA_DEV_SLAVE.
190 	 */
191 	int device;
192 	/** LBA48 extended addressing */
193 	int lba48;
194 	/**
195 	 * Issue ATA command
196 	 *
197 	 * @v ata		ATA device
198 	 * @v command		ATA command
199 	 * @ret rc		Return status code
200 	 */
201 	int ( * command ) ( struct ata_device *ata,
202 			    struct ata_command *command );
203 	/** Backing device */
204 	struct refcnt *backend;
205 };
206 
207 extern int init_atadev ( struct ata_device *ata );
208 
209 #endif /* _GPXE_ATA_H */
210