| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGTargetInfo.h | 49 virtual SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, in EmitTargetCodeForMemcpy()
66 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, in EmitTargetCodeForMemmove()
78 virtual SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, in EmitTargetCodeForMemset()
91 EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, in EmitTargetCodeForMemcmp()
103 EmitTargetCodeForMemchr(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, in EmitTargetCodeForMemchr()
116 EmitTargetCodeForStrcpy(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in EmitTargetCodeForStrcpy()
128 EmitTargetCodeForStrcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, in EmitTargetCodeForStrcmp()
136 EmitTargetCodeForStrlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in EmitTargetCodeForStrlen()
142 EmitTargetCodeForStrnlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in EmitTargetCodeForStrnlen()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZSelectionDAGInfo.cpp | 26 static SDValue emitMemMem(SelectionDAG &DAG, const SDLoc &DL, unsigned Sequence, in emitMemMem()
50 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy()
65 static SDValue memsetStore(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in memsetStore()
78 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, in EmitTargetCodeForMemset()
149 static SDValue emitCLC(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in emitCLC()
174 SelectionDAG &DAG) { in addIPMSequence()
184 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, in EmitTargetCodeForMemcmp()
198 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, in EmitTargetCodeForMemchr()
225 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest, in EmitTargetCodeForStrcpy()
235 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, in EmitTargetCodeForStrcmp()
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| D | SystemZISelLowering.cpp | 809 static SDValue convertLocVTToValVT(SelectionDAG &DAG, const SDLoc &DL, in convertLocVTToValVT()
838 static SDValue convertValVTToLocVT(SelectionDAG &DAG, const SDLoc &DL, in convertValVTToLocVT()
865 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments()
1034 SelectionDAG &DAG = CLI.DAG; in LowerCall() local
1458 static SDValue emitIntrinsicWithChainAndGlue(SelectionDAG &DAG, SDValue Op, in emitIntrinsicWithChainAndGlue()
1478 static SDValue emitIntrinsicWithGlue(SelectionDAG &DAG, SDValue Op, in emitIntrinsicWithGlue()
1591 static void adjustZeroCmp(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) { in adjustZeroCmp()
1611 static void adjustSubwordCmp(SelectionDAG &DAG, const SDLoc &DL, in adjustSubwordCmp()
1773 static void adjustForSubtraction(SelectionDAG &DAG, const SDLoc &DL, in adjustForSubtraction()
1839 static void adjustICmpTruncate(SelectionDAG &DAG, const SDLoc &DL, in adjustICmpTruncate()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.h | 27 const ScheduleDAG *DAG; variable
57 const ScheduleDAG &DAG; variable
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 528 static SDValue performADDECombine(SDNode *N, SelectionDAG &DAG, in performADDECombine()
548 static SDValue performANDCombine(SDNode *N, SelectionDAG &DAG, in performANDCombine()
663 static SDValue performORCombine(SDNode *N, SelectionDAG &DAG, in performORCombine()
783 static SDValue performSUBECombine(SDNode *N, SelectionDAG &DAG, in performSUBECombine()
797 EVT ShiftTy, SelectionDAG &DAG) { in genConstMult()
834 static SDValue performMULCombine(SDNode *N, SelectionDAG &DAG, in performMULCombine()
849 SelectionDAG &DAG, in performDSPShiftCombine()
873 static SDValue performSHLCombine(SDNode *N, SelectionDAG &DAG, in performSHLCombine()
896 static SDValue performSRACombine(SDNode *N, SelectionDAG &DAG, in performSRACombine()
942 static SDValue performSRLCombine(SDNode *N, SelectionDAG &DAG, in performSRLCombine()
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| D | MipsISelLowering.cpp | 74 SDValue MipsTargetLowering::getGlobalReg(SelectionDAG &DAG, EVT Ty) const { in getGlobalReg()
80 SelectionDAG &DAG, in getTargetNode()
86 SelectionDAG &DAG, in getTargetNode()
92 SelectionDAG &DAG, in getTargetNode()
98 SelectionDAG &DAG, in getTargetNode()
104 SelectionDAG &DAG, in getTargetNode()
466 static SDValue performDivRemCombine(SDNode *N, SelectionDAG &DAG, in performDivRemCombine()
544 static SDValue createFPCmp(SelectionDAG &DAG, const SDValue &Op) { in createFPCmp()
566 static SDValue createCMovFP(SelectionDAG &DAG, SDValue Cond, SDValue True, in createCMovFP()
576 static SDValue performSELECTCombine(SDNode *N, SelectionDAG &DAG, in performSELECTCombine()
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 61 ExpandLibCall(RTLIB::Libcall LC, SDValue Op, SelectionDAG &DAG, in ExpandLibCall()
549 LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { in LowerLOAD()
757 LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { in LowerSTORE()
997 LowerConstantPool(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { in LowerConstantPool()
1025 SPU::LowerConstantPool(SDValue Op, SelectionDAG &DAG, const SPUTargetMachine &TM) { in LowerConstantPool()
1030 LowerJumpTable(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { in LowerJumpTable()
1055 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { in LowerGlobalAddress()
1085 LowerConstantFP(SDValue Op, SelectionDAG &DAG) { in LowerConstantFP()
1111 DebugLoc dl, SelectionDAG &DAG, in LowerFormalArguments()
1245 static SDNode *isLSAAddress(SDValue Op, SelectionDAG &DAG) { in isLSAAddress()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSelectionDAGInfo.h | 57 EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, in EmitTargetCodeForMemcpy()
74 EmitTargetCodeForMemmove(SelectionDAG &DAG, DebugLoc dl, in EmitTargetCodeForMemmove()
90 EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, in EmitTargetCodeForMemset()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 370 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments()
384 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments_32()
588 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments_64()
701 static bool hasReturnsTwiceAttr(SelectionDAG &DAG, SDValue Callee, in hasReturnsTwiceAttr()
726 SelectionDAG &DAG = CLI.DAG; in LowerCall_32() local
1067 SparcTargetLowering::getSRetArgSize(SelectionDAG &DAG, SDValue Callee) const in getSRetArgSize()
1151 SelectionDAG &DAG = CLI.DAG; in LowerCall_64() local
1888 const SelectionDAG &DAG, in computeKnownBitsForTargetNode()
2172 SparcTargetLowering::LowerF128Op(SDValue Op, SelectionDAG &DAG, in LowerF128Op()
2326 LowerF128_FPEXTEND(SDValue Op, SelectionDAG &DAG, in LowerF128_FPEXTEND()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMSelectionDAGInfo.cpp | 25 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitSpecializedLibcall()
129 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy()
249 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemmove()
257 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemset()
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| D | ARMISelLowering.cpp | 1448 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, bool isThisReturn, in LowerCallResult()
1531 SelectionDAG &DAG, in LowerMemOpCallTo()
1544 void ARMTargetLowering::PassF64ArgInRegs(const SDLoc &dl, SelectionDAG &DAG, in PassF64ArgInRegs()
1577 SelectionDAG &DAG = CLI.DAG; in LowerCall() local
2224 const SDLoc &DL, SelectionDAG &DAG) { in LowerInterruptReturn()
2470 static SDValue LowerWRITE_REGISTER(SDValue Op, SelectionDAG &DAG) { in LowerWRITE_REGISTER()
2492 static SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) { in LowerConstantPool()
2712 SelectionDAG &DAG, in LowerToTLSExecModels()
2920 ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG, in LowerINTRINSIC_WO_CHAIN()
2999 static SDValue LowerATOMIC_FENCE(SDValue Op, SelectionDAG &DAG, in LowerATOMIC_FENCE()
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| D | ARMHazardRecognizer.h | 36 const ScheduleDAG *DAG) in ARMHazardRecognizer()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 2283 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerCallResult()
2382 SelectionDAG &DAG, const SDLoc &dl) { in CreateCopyOfByValArgument()
2438 const SDLoc &dl, SelectionDAG &DAG, in LowerMemArgument()
2561 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments()
2896 SelectionDAG &DAG, in LowerMemOpCallTo()
2915 SelectionDAG &DAG, SDValue &OutRetAddr, SDValue Chain, bool IsTailCall, in EmitTailCallLoadRetAddr()
2929 static SDValue EmitTailCallStoreRetAddr(SelectionDAG &DAG, MachineFunction &MF, in EmitTailCallStoreRetAddr()
2949 static SDValue getMOVL(SelectionDAG &DAG, const SDLoc &dl, MVT VT, SDValue V1, in getMOVL()
2962 SelectionDAG &DAG = CLI.DAG; in LowerCall() local
3839 SelectionDAG &DAG) { in getTargetShuffleNode()
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| D | X86SelectionDAGInfo.cpp | 28 SelectionDAG &DAG, ArrayRef<MCPhysReg> ClobberSet) const { in isBaseRegConflictPossible()
48 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemset()
197 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy()
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| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 153 DebugLoc dl, SelectionDAG &DAG, in LowerFormalArguments()
355 DebugLoc dl, SelectionDAG &DAG, in LowerCall()
616 SparcTargetLowering::getSRetArgSize(SelectionDAG &DAG, SDValue Callee) const in getSRetArgSize()
837 const SelectionDAG &DAG, in computeMaskedBitsForTargetNode()
924 static SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) { in LowerFP_TO_SINT()
932 static SDValue LowerSINT_TO_FP(SDValue Op, SelectionDAG &DAG) { in LowerSINT_TO_FP()
940 static SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) { in LowerBR_CC()
972 static SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) { in LowerSELECT_CC()
1003 static SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG, in LowerVASTART()
1021 static SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) { in LowerVAARG()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1105 DebugLoc dl, SelectionDAG &DAG, in LowerCallResult()
1176 DebugLoc dl, SelectionDAG &DAG, in LowerMemOpCallTo()
1187 void ARMTargetLowering::PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG, in PassF64ArgInRegs()
1222 DebugLoc dl, SelectionDAG &DAG, in LowerCall()
1926 static SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) { in LowerConstantPool()
2228 ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG, in LowerINTRINSIC_WO_CHAIN()
2274 static SDValue LowerMEMBARRIER(SDValue Op, SelectionDAG &DAG, in LowerMEMBARRIER()
2303 static SDValue LowerATOMIC_FENCE(SDValue Op, SelectionDAG &DAG, in LowerATOMIC_FENCE()
2321 static SDValue LowerPREFETCH(SDValue Op, SelectionDAG &DAG, in LowerPREFETCH()
2348 static SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) { in LowerVASTART()
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| D | ARMSelectionDAGInfo.cpp | 29 ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, in EmitTargetCodeForMemcpy()
142 EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, in EmitTargetCodeForMemset()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 739 const SelectionDAG &DAG, unsigned Depth) const { in computeKnownBitsForTargetNode() argument
1206 const SDLoc &dl, SelectionDAG &DAG) { in emitComparison()
1299 const SDLoc &DL, SelectionDAG &DAG) { in emitConditionalComparison()
1390 static SDValue emitConjunctionDisjunctionTreeRec(SelectionDAG &DAG, SDValue Val, in emitConjunctionDisjunctionTreeRec()
1493 static SDValue emitConjunctionDisjunctionTree(SelectionDAG &DAG, SDValue Val, in emitConjunctionDisjunctionTree()
1506 SDValue &AArch64cc, SelectionDAG &DAG, in getAArch64Cmp()
1616 getAArch64XALUOOp(AArch64CC::CondCode &CC, SDValue Op, SelectionDAG &DAG) { in getAArch64XALUOOp()
1730 SDValue AArch64TargetLowering::LowerF128Call(SDValue Op, SelectionDAG &DAG, in LowerF128Call()
1736 static SDValue LowerXOR(SDValue Op, SelectionDAG &DAG) { in LowerXOR()
1795 static SDValue LowerADDC_ADDE_SUBC_SUBE(SDValue Op, SelectionDAG &DAG) { in LowerADDC_ADDE_SUBC_SUBE()
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| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXSelectionDAGInfo.cpp | 29 PTXSelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, in EmitTargetCodeForMemcpy()
142 EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, in EmitTargetCodeForMemset()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 666 SelectionDAG &DAG = CLI.DAG; in LowerCall() local
962 SelectionDAG &DAG = DCI.DAG; in CombineFMinMaxLegacy() local
1231 SDValue AMDGPUTargetLowering::LowerDIVREM24(SDValue Op, SelectionDAG &DAG, in LowerDIVREM24()
1335 SelectionDAG &DAG, in LowerUDIVREM64()
1629 SelectionDAG &DAG) { in extractF64Exponent()
1903 SDValue AMDGPUTargetLowering::LowerINT_TO_FP32(SDValue Op, SelectionDAG &DAG, in LowerINT_TO_FP32()
1988 SDValue AMDGPUTargetLowering::LowerINT_TO_FP64(SDValue Op, SelectionDAG &DAG, in LowerINT_TO_FP64()
2041 SDValue AMDGPUTargetLowering::LowerFP64_TO_INT(SDValue Op, SelectionDAG &DAG, in LowerFP64_TO_INT()
2118 static bool isU24(SDValue Op, SelectionDAG &DAG) { in isU24()
2126 static bool isI24(SDValue Op, SelectionDAG &DAG) { in isI24()
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| D | SIISelLowering.cpp | 548 SDValue SITargetLowering::LowerParameterPtr(SelectionDAG &DAG, in LowerParameterPtr()
563 SDValue SITargetLowering::LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, in LowerParameter()
591 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments()
1535 static SDValue buildPCRelGlobalAddress(SelectionDAG &DAG, const GlobalValue *GV, in buildPCRelGlobalAddress()
1607 SDValue SITargetLowering::copyToM0(SelectionDAG &DAG, SDValue Chain, in copyToM0()
1623 SDValue SITargetLowering::lowerImplicitZextParam(SelectionDAG &DAG, in lowerImplicitZextParam()
1635 static SDValue emitNonHSAIntrinsicError(SelectionDAG& DAG, SDLoc DL, EVT VT) { in emitNonHSAIntrinsicError()
1643 static SDValue emitRemovedIntrinsicError(SelectionDAG& DAG, SDLoc DL, EVT VT) { in emitRemovedIntrinsicError()
2420 SelectionDAG &DAG = DCI.DAG; in performUCharToFloatCombine() local
2507 SelectionDAG &DAG = DCI.DAG; in performSHLPtrCombine() local
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| D | SIMachineScheduler.h | 53 SIScheduleDAGMI *DAG; variable
94 SIScheduleBlock(SIScheduleDAGMI *DAG, SIScheduleBlockCreator *BC, in SIScheduleBlock()
220 SIScheduleDAGMI *DAG; variable
314 SIScheduleDAGMI *DAG; variable
408 SIScheduleDAGMI *DAG; variable
412 SIScheduler(SIScheduleDAGMI *DAG) : DAG(DAG), BlockCreator(DAG) {}; in SIScheduler()
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| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinISelDAGToDAG.cpp | 127 static void UpdateNodeOperand(SelectionDAG &DAG, in UpdateNodeOperand()
139 void BlackfinDAGToDAGISel::FixRegisterClasses(SelectionDAG &DAG) { in FixRegisterClasses()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 36 static void fail(const SDLoc &DL, SelectionDAG &DAG, const char *Msg) { in fail()
42 static void fail(const SDLoc &DL, SelectionDAG &DAG, const char *Msg, in fail()
154 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments()
218 SelectionDAG &DAG = CLI.DAG; in LowerCall() local
395 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerCallResult()
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiSelectionDAGInfo.cpp | 23 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy()
|