| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFixSGPRCopies.cpp | 143 const TargetRegisterClass *DstRC = in getCopyRegClasses() local
152 const TargetRegisterClass *DstRC, in isVGPRToSGPRCopy()
158 const TargetRegisterClass *DstRC, in isSGPRToVGPRCopy()
193 const TargetRegisterClass *SrcRC, *DstRC; in foldVGPRCopyIntoRegSequence() local
264 const TargetRegisterClass *SrcRC, *DstRC; in runOnMachineFunction() local
356 const TargetRegisterClass *DstRC, *Src0RC, *Src1RC; in runOnMachineFunction() local
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| D | SILowerI1Copies.cpp | 102 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst.getReg()); in runOnMachineFunction() local
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| D | SIInstrInfo.cpp | 336 const TargetRegisterClass *DstRC = MRI.getRegClass(FirstDst->getReg()); in shouldClusterMemOps() local
2280 const TargetRegisterClass *DstRC = getOpRegClass(MI, 0); in legalizeOperands() local
2313 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst); in legalizeOperands() local
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| /external/llvm/lib/CodeGen/ |
| D | DetectDeadLanes.cpp | 157 const TargetRegisterClass *DstRC, in isCrossCopy()
441 const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg); in determineInitialUsedLanes() local
490 const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg); in isUndefInput() local
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| D | RegisterCoalescer.cpp | 353 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst); in setRegisters() local
971 const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg); in reMaterializeTrivialDef() local
1354 auto DstRC = MRI->getRegClass(CP.getDstReg()); in joinCopy() local
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| D | PeepholeOptimizer.cpp | 428 const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg); in INITIALIZE_PASS_DEPENDENCY() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXCopy.cpp | 131 const TargetRegisterClass *DstRC = in processBlock() local
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| D | PPCVSXSwapRemoval.cpp | 886 const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg); in handleSpecialSwappables() local
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 137 const TargetRegisterClass *SrcRC = 0, *DstRC = 0; in EmitCopyFromReg() local
294 const TargetRegisterClass *DstRC = 0; in AddRegisterOperand() local
549 const TargetRegisterClass *DstRC = TRI->getRegClass(DstRCIdx); in EmitCopyToRegClassNode() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 157 const TargetRegisterClass *SrcRC = nullptr, *DstRC = nullptr; in EmitCopyFromReg() local
333 const TargetRegisterClass *DstRC = nullptr; in AddRegisterOperand() local
594 const TargetRegisterClass *DstRC = in EmitCopyToRegClassNode() local
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| /external/llvm/utils/TableGen/ |
| D | FastISelEmitter.cpp | 193 const CodeGenRegisterClass *DstRC = nullptr; in initialize() local
479 const CodeGenRegisterClass *DstRC = nullptr; in collectPatterns() local
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| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | FastISelEmitter.cpp | 186 const CodeGenRegisterClass *DstRC = 0; in initialize() local
455 const CodeGenRegisterClass *DstRC = 0; in collectPatterns() local
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | RegisterCoalescer.cpp | 290 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst); in setRegisters() local
307 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst); in setRegisters() local
1104 const TargetRegisterClass *DstRC, in isWinToJoinCrossClass()
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| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXInstrInfo.cpp | 72 const TargetRegisterClass *DstRC, in copyRegToReg()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 786 const TargetRegisterClass *DstRC, in shouldCoalesce()
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| D | ARMFastISel.cpp | 2036 const TargetRegisterClass* DstRC = TLI.getRegClassFor(DestVT); in FinishCall() local
2056 const TargetRegisterClass* DstRC = TLI.getRegClassFor(CopyVT); in FinishCall() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1688 TargetRegisterClass* DstRC = TLI.getRegClassFor(DestVT); in FinishCall() local
1703 TargetRegisterClass* DstRC = TLI.getRegClassFor(CopyVT); in FinishCall() local
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 922 const TargetRegisterClass *DstRC, in shouldCoalesce()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 2994 const TargetRegisterClass *DstRC = getRegClass(MCID, 0, &RI); in unfoldMemoryOperand() local
3066 const TargetRegisterClass *DstRC = 0; in unfoldMemoryOperand() local
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 6474 const TargetRegisterClass *DstRC = getRegClass(MCID, 0, &RI, MF); in unfoldMemoryOperand() local
6545 const TargetRegisterClass *DstRC = nullptr; in unfoldMemoryOperand() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonGenInsert.cpp | 639 const TargetRegisterClass *DstRC = MRI->getRegClass(DstR); in isValidInsertForm() local
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