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1 #ifndef GEN_RENDER_XML
2 #define GEN_RENDER_XML
3 
4 /* Autogenerated file, DO NOT EDIT manually!
5 
6 This file was generated by the rules-ng-ng headergen tool in this git repository:
7 https://github.com/olvaffe/envytools/
8 git clone https://github.com/olvaffe/envytools.git
9 
10 Copyright (C) 2014-2015 by the following authors:
11 - Chia-I Wu <olvaffe@gmail.com> (olv)
12 
13 Permission is hereby granted, free of charge, to any person obtaining
14 a copy of this software and associated documentation files (the
15 "Software"), to deal in the Software without restriction, including
16 without limitation the rights to use, copy, modify, merge, publish,
17 distribute, sublicense, and/or sell copies of the Software, and to
18 permit persons to whom the Software is furnished to do so, subject to
19 the following conditions:
20 
21 The above copyright notice and this permission notice (including the
22 next paragraph) shall be included in all copies or substantial
23 portions of the Software.
24 
25 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
28 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
29 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
30 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
31 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
32 */
33 
34 
35 #define GEN6_RENDER_TYPE__MASK					0xe0000000
36 #define GEN6_RENDER_TYPE__SHIFT					29
37 #define GEN6_RENDER_TYPE_RENDER					(0x3 << 29)
38 #define GEN6_RENDER_SUBTYPE__MASK				0x18000000
39 #define GEN6_RENDER_SUBTYPE__SHIFT				27
40 #define GEN6_RENDER_SUBTYPE_COMMON				(0x0 << 27)
41 #define GEN6_RENDER_SUBTYPE_SINGLE_DW				(0x1 << 27)
42 #define GEN6_RENDER_SUBTYPE_MEDIA				(0x2 << 27)
43 #define GEN6_RENDER_SUBTYPE_3D					(0x3 << 27)
44 #define GEN6_RENDER_OPCODE__MASK				0x07ff0000
45 #define GEN6_RENDER_OPCODE__SHIFT				16
46 #define GEN6_RENDER_OPCODE_STATE_BASE_ADDRESS			(0x101 << 16)
47 #define GEN6_RENDER_OPCODE_STATE_SIP				(0x102 << 16)
48 #define GEN6_RENDER_OPCODE_3DSTATE_VF_STATISTICS		(0xb << 16)
49 #define GEN6_RENDER_OPCODE_PIPELINE_SELECT			(0x104 << 16)
50 #define GEN6_RENDER_OPCODE_MEDIA_VFE_STATE			(0x0 << 16)
51 #define GEN6_RENDER_OPCODE_MEDIA_CURBE_LOAD			(0x1 << 16)
52 #define GEN6_RENDER_OPCODE_MEDIA_INTERFACE_DESCRIPTOR_LOAD	(0x2 << 16)
53 #define GEN6_RENDER_OPCODE_MEDIA_STATE_FLUSH			(0x4 << 16)
54 #define GEN7_RENDER_OPCODE_GPGPU_WALKER				(0x105 << 16)
55 #define GEN6_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS	(0x1 << 16)
56 #define GEN6_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS	(0x2 << 16)
57 #define GEN7_RENDER_OPCODE_3DSTATE_CLEAR_PARAMS			(0x4 << 16)
58 #define GEN6_RENDER_OPCODE_3DSTATE_URB				(0x5 << 16)
59 #define GEN7_RENDER_OPCODE_3DSTATE_DEPTH_BUFFER			(0x5 << 16)
60 #define GEN7_RENDER_OPCODE_3DSTATE_STENCIL_BUFFER		(0x6 << 16)
61 #define GEN7_RENDER_OPCODE_3DSTATE_HIER_DEPTH_BUFFER		(0x7 << 16)
62 #define GEN6_RENDER_OPCODE_3DSTATE_VERTEX_BUFFERS		(0x8 << 16)
63 #define GEN6_RENDER_OPCODE_3DSTATE_VERTEX_ELEMENTS		(0x9 << 16)
64 #define GEN6_RENDER_OPCODE_3DSTATE_INDEX_BUFFER			(0xa << 16)
65 #define GEN75_RENDER_OPCODE_3DSTATE_VF				(0xc << 16)
66 #define GEN6_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS	(0xd << 16)
67 #define GEN8_RENDER_OPCODE_3DSTATE_MULTISAMPLE			(0xd << 16)
68 #define GEN6_RENDER_OPCODE_3DSTATE_CC_STATE_POINTERS		(0xe << 16)
69 #define GEN6_RENDER_OPCODE_3DSTATE_SCISSOR_STATE_POINTERS	(0xf << 16)
70 #define GEN6_RENDER_OPCODE_3DSTATE_VS				(0x10 << 16)
71 #define GEN6_RENDER_OPCODE_3DSTATE_GS				(0x11 << 16)
72 #define GEN6_RENDER_OPCODE_3DSTATE_CLIP				(0x12 << 16)
73 #define GEN6_RENDER_OPCODE_3DSTATE_SF				(0x13 << 16)
74 #define GEN6_RENDER_OPCODE_3DSTATE_WM				(0x14 << 16)
75 #define GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_VS			(0x15 << 16)
76 #define GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_GS			(0x16 << 16)
77 #define GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS			(0x17 << 16)
78 #define GEN6_RENDER_OPCODE_3DSTATE_SAMPLE_MASK			(0x18 << 16)
79 #define GEN7_RENDER_OPCODE_3DSTATE_CONSTANT_HS			(0x19 << 16)
80 #define GEN7_RENDER_OPCODE_3DSTATE_CONSTANT_DS			(0x1a << 16)
81 #define GEN7_RENDER_OPCODE_3DSTATE_HS				(0x1b << 16)
82 #define GEN7_RENDER_OPCODE_3DSTATE_TE				(0x1c << 16)
83 #define GEN7_RENDER_OPCODE_3DSTATE_DS				(0x1d << 16)
84 #define GEN7_RENDER_OPCODE_3DSTATE_STREAMOUT			(0x1e << 16)
85 #define GEN7_RENDER_OPCODE_3DSTATE_SBE				(0x1f << 16)
86 #define GEN7_RENDER_OPCODE_3DSTATE_PS				(0x20 << 16)
87 #define GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP	(0x21 << 16)
88 #define GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_CC	(0x23 << 16)
89 #define GEN7_RENDER_OPCODE_3DSTATE_BLEND_STATE_POINTERS		(0x24 << 16)
90 #define GEN7_RENDER_OPCODE_3DSTATE_DEPTH_STENCIL_STATE_POINTERS	(0x25 << 16)
91 #define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_VS	(0x26 << 16)
92 #define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_HS	(0x27 << 16)
93 #define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_DS	(0x28 << 16)
94 #define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_GS	(0x29 << 16)
95 #define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_PS	(0x2a << 16)
96 #define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_VS	(0x2b << 16)
97 #define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_HS	(0x2c << 16)
98 #define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_DS	(0x2d << 16)
99 #define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_GS	(0x2e << 16)
100 #define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_PS	(0x2f << 16)
101 #define GEN7_RENDER_OPCODE_3DSTATE_URB_VS			(0x30 << 16)
102 #define GEN7_RENDER_OPCODE_3DSTATE_URB_HS			(0x31 << 16)
103 #define GEN7_RENDER_OPCODE_3DSTATE_URB_DS			(0x32 << 16)
104 #define GEN7_RENDER_OPCODE_3DSTATE_URB_GS			(0x33 << 16)
105 #define GEN75_RENDER_OPCODE_3DSTATE_GATHER_CONSTANT_VS		(0x34 << 16)
106 #define GEN75_RENDER_OPCODE_3DSTATE_GATHER_CONSTANT_GS		(0x35 << 16)
107 #define GEN75_RENDER_OPCODE_3DSTATE_GATHER_CONSTANT_HS		(0x36 << 16)
108 #define GEN75_RENDER_OPCODE_3DSTATE_GATHER_CONSTANT_DS		(0x37 << 16)
109 #define GEN75_RENDER_OPCODE_3DSTATE_GATHER_CONSTANT_PS		(0x38 << 16)
110 #define GEN75_RENDER_OPCODE_3DSTATE_BINDING_TABLE_EDIT_VS	(0x43 << 16)
111 #define GEN75_RENDER_OPCODE_3DSTATE_BINDING_TABLE_EDIT_GS	(0x44 << 16)
112 #define GEN75_RENDER_OPCODE_3DSTATE_BINDING_TABLE_EDIT_HS	(0x45 << 16)
113 #define GEN75_RENDER_OPCODE_3DSTATE_BINDING_TABLE_EDIT_DS	(0x45 << 16)
114 #define GEN75_RENDER_OPCODE_3DSTATE_BINDING_TABLE_EDIT_PS	(0x46 << 16)
115 #define GEN8_RENDER_OPCODE_3DSTATE_VF_INSTANCING		(0x49 << 16)
116 #define GEN8_RENDER_OPCODE_3DSTATE_VF_SGVS			(0x4a << 16)
117 #define GEN8_RENDER_OPCODE_3DSTATE_VF_TOPOLOGY			(0x4b << 16)
118 #define GEN8_RENDER_OPCODE_3DSTATE_WM_CHROMAKEY			(0x4c << 16)
119 #define GEN8_RENDER_OPCODE_3DSTATE_PS_BLEND			(0x4d << 16)
120 #define GEN8_RENDER_OPCODE_3DSTATE_WM_DEPTH_STENCIL		(0x4e << 16)
121 #define GEN8_RENDER_OPCODE_3DSTATE_PS_EXTRA			(0x4f << 16)
122 #define GEN8_RENDER_OPCODE_3DSTATE_RASTER			(0x50 << 16)
123 #define GEN8_RENDER_OPCODE_3DSTATE_SBE_SWIZ			(0x51 << 16)
124 #define GEN8_RENDER_OPCODE_3DSTATE_WM_HZ_OP			(0x52 << 16)
125 #define GEN6_RENDER_OPCODE_3DSTATE_DRAWING_RECTANGLE		(0x100 << 16)
126 #define GEN6_RENDER_OPCODE_3DSTATE_DEPTH_BUFFER			(0x105 << 16)
127 #define GEN6_RENDER_OPCODE_3DSTATE_POLY_STIPPLE_OFFSET		(0x106 << 16)
128 #define GEN6_RENDER_OPCODE_3DSTATE_POLY_STIPPLE_PATTERN		(0x107 << 16)
129 #define GEN6_RENDER_OPCODE_3DSTATE_LINE_STIPPLE			(0x108 << 16)
130 #define GEN6_RENDER_OPCODE_3DSTATE_AA_LINE_PARAMETERS		(0x10a << 16)
131 #define GEN6_RENDER_OPCODE_3DSTATE_GS_SVB_INDEX			(0x10b << 16)
132 #define GEN6_RENDER_OPCODE_3DSTATE_MULTISAMPLE			(0x10d << 16)
133 #define GEN6_RENDER_OPCODE_3DSTATE_STENCIL_BUFFER		(0x10e << 16)
134 #define GEN6_RENDER_OPCODE_3DSTATE_HIER_DEPTH_BUFFER		(0x10f << 16)
135 #define GEN6_RENDER_OPCODE_3DSTATE_CLEAR_PARAMS			(0x110 << 16)
136 #define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_VS	(0x112 << 16)
137 #define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_HS	(0x113 << 16)
138 #define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_DS	(0x114 << 16)
139 #define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_GS	(0x115 << 16)
140 #define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_PS	(0x116 << 16)
141 #define GEN7_RENDER_OPCODE_3DSTATE_SO_DECL_LIST			(0x117 << 16)
142 #define GEN7_RENDER_OPCODE_3DSTATE_SO_BUFFER			(0x118 << 16)
143 #define GEN75_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POOL_ALLOC	(0x119 << 16)
144 #define GEN75_RENDER_OPCODE_3DSTATE_GATHER_POOL_ALLOC		(0x11a << 16)
145 #define GEN8_RENDER_OPCODE_3DSTATE_SAMPLE_PATTERN		(0x11c << 16)
146 #define GEN6_RENDER_OPCODE_PIPE_CONTROL				(0x200 << 16)
147 #define GEN6_RENDER_OPCODE_3DPRIMITIVE				(0x300 << 16)
148 #define GEN6_RENDER_LENGTH__MASK				0x000000ff
149 #define GEN6_RENDER_LENGTH__SHIFT				0
150 #define GEN6_MOCS_LLC__MASK					0x00000003
151 #define GEN6_MOCS_LLC__SHIFT					0
152 #define GEN6_MOCS_LLC_PTE					0x0
153 #define GEN6_MOCS_LLC_UC					0x1
154 #define GEN6_MOCS_LLC_WB					0x2
155 #define GEN7_MOCS_LLC__MASK					0x00000002
156 #define GEN7_MOCS_LLC__SHIFT					1
157 #define GEN7_MOCS_LLC_PTE					(0x0 << 1)
158 #define GEN7_MOCS_LLC_WB					(0x1 << 1)
159 #define GEN75_MOCS_LLC__MASK					0x00000006
160 #define GEN75_MOCS_LLC__SHIFT					1
161 #define GEN75_MOCS_LLC_PTE					(0x0 << 1)
162 #define GEN75_MOCS_LLC_UC					(0x1 << 1)
163 #define GEN75_MOCS_LLC_WB					(0x2 << 1)
164 #define GEN75_MOCS_LLC_ELLC					(0x3 << 1)
165 #define GEN7_MOCS_L3__MASK					0x00000001
166 #define GEN7_MOCS_L3__SHIFT					0
167 #define GEN7_MOCS_L3_UC						0x0
168 #define GEN7_MOCS_L3_WB						0x1
169 #define GEN8_MOCS_MT__MASK					0x00000060
170 #define GEN8_MOCS_MT__SHIFT					5
171 #define GEN8_MOCS_MT_PTE					(0x0 << 5)
172 #define GEN8_MOCS_MT_UC						(0x1 << 5)
173 #define GEN8_MOCS_MT_WT						(0x2 << 5)
174 #define GEN8_MOCS_MT_WB						(0x3 << 5)
175 #define GEN8_MOCS_CT__MASK					0x00000018
176 #define GEN8_MOCS_CT__SHIFT					3
177 #define GEN8_MOCS_CT_ELLC					(0x0 << 3)
178 #define GEN8_MOCS_CT_LLC_ONLY					(0x1 << 3)
179 #define GEN8_MOCS_CT_LLC					(0x2 << 3)
180 #define GEN8_MOCS_CT_L3						(0x3 << 3)
181 #define GEN9_MOCS__MASK						0x0000007f
182 #define GEN9_MOCS__SHIFT					0
183 #define GEN9_MOCS_MT_WT_CT_L3					0x5
184 #define GEN9_MOCS_MT_WB_CT_L3					0x9
185 #define GEN6_SBA_ADDR__MASK					0xfffff000
186 #define GEN6_SBA_ADDR__SHIFT					12
187 #define GEN6_SBA_ADDR__SHR					12
188 #define GEN6_SBA_MOCS__MASK					0x00000f00
189 #define GEN6_SBA_MOCS__SHIFT					8
190 #define GEN8_SBA_MOCS__MASK					0x000007f0
191 #define GEN8_SBA_MOCS__SHIFT					4
192 #define GEN6_SBA_ADDR_MODIFIED					(0x1 << 0)
193 #define GEN8_SBA_SIZE__MASK					0xfffff000
194 #define GEN8_SBA_SIZE__SHIFT					12
195 #define GEN8_SBA_SIZE__SHR					12
196 #define GEN8_SBA_SIZE_MODIFIED					(0x1 << 0)
197 #define GEN6_BINDING_TABLE_ADDR__MASK				0x0000ffe0
198 #define GEN6_BINDING_TABLE_ADDR__SHIFT				5
199 #define GEN6_BINDING_TABLE_ADDR__SHR				5
200 #define GEN6_STATE_BASE_ADDRESS__SIZE				19
201 
202 
203 #define GEN6_SBA_DW1_GENERAL_STATELESS_MOCS__MASK		0x000000f0
204 #define GEN6_SBA_DW1_GENERAL_STATELESS_MOCS__SHIFT		4
205 #define GEN6_SBA_DW1_GENERAL_STATELESS_FORCE_WRITE_THRU		(0x1 << 3)
206 
207 
208 
209 
210 
211 
212 
213 
214 
215 
216 
217 
218 
219 #define GEN8_SBA_DW3_STATELESS_MOCS__MASK			0x007f0000
220 #define GEN8_SBA_DW3_STATELESS_MOCS__SHIFT			16
221 
222 
223 
224 
225 
226 
227 
228 
229 
230 
231 
232 
233 
234 
235 
236 
237 #define GEN6_STATE_SIP__SIZE					3
238 
239 
240 #define GEN6_SIP_DW1_KERNEL_ADDR__MASK				0xfffffff0
241 #define GEN6_SIP_DW1_KERNEL_ADDR__SHIFT				4
242 #define GEN6_SIP_DW1_KERNEL_ADDR__SHR				4
243 
244 
245 #define GEN6_PIPELINE_SELECT__SIZE				1
246 
247 #define GEN6_PIPELINE_SELECT_DW0_SELECT__MASK			0x00000003
248 #define GEN6_PIPELINE_SELECT_DW0_SELECT__SHIFT			0
249 #define GEN6_PIPELINE_SELECT_DW0_SELECT_3D			0x0
250 #define GEN6_PIPELINE_SELECT_DW0_SELECT_MEDIA			0x1
251 #define GEN7_PIPELINE_SELECT_DW0_SELECT_GPGPU			0x2
252 #define GEN9_PIPELINE_SELECT_DW0_SELECT__MASK			0x00000700
253 #define GEN9_PIPELINE_SELECT_DW0_SELECT__SHIFT			8
254 #define GEN9_PIPELINE_SELECT_DW0_SELECT_3D			(0x3 << 8)
255 
256 #define GEN6_PIPE_CONTROL__SIZE					6
257 
258 
259 #define GEN7_PIPE_CONTROL_USE_GGTT				(0x1 << 24)
260 #define GEN7_PIPE_CONTROL_LRI_WRITE__MASK			0x00800000
261 #define GEN7_PIPE_CONTROL_LRI_WRITE__SHIFT			23
262 #define GEN7_PIPE_CONTROL_LRI_WRITE_NONE			(0x0 << 23)
263 #define GEN7_PIPE_CONTROL_LRI_WRITE_IMM				(0x1 << 23)
264 #define GEN6_PIPE_CONTROL_PROTECTED_MEMORY_ENABLE		(0x1 << 22)
265 #define GEN6_PIPE_CONTROL_STORE_DATA_INDEX			(0x1 << 21)
266 #define GEN6_PIPE_CONTROL_CS_STALL				(0x1 << 20)
267 #define GEN6_PIPE_CONTROL_GLOBAL_SNAPSHOT_COUNT_RESET		(0x1 << 19)
268 #define GEN6_PIPE_CONTROL_TLB_INVALIDATE			(0x1 << 18)
269 #define GEN6_PIPE_CONTROL_SYNC_GFDT_SURFACE			(0x1 << 17)
270 #define GEN6_PIPE_CONTROL_GENERIC_MEDIA_STATE_CLEAR		(0x1 << 16)
271 #define GEN6_PIPE_CONTROL_WRITE__MASK				0x0000c000
272 #define GEN6_PIPE_CONTROL_WRITE__SHIFT				14
273 #define GEN6_PIPE_CONTROL_WRITE_NONE				(0x0 << 14)
274 #define GEN6_PIPE_CONTROL_WRITE_IMM				(0x1 << 14)
275 #define GEN6_PIPE_CONTROL_WRITE_PS_DEPTH_COUNT			(0x2 << 14)
276 #define GEN6_PIPE_CONTROL_WRITE_TIMESTAMP			(0x3 << 14)
277 #define GEN6_PIPE_CONTROL_DEPTH_STALL				(0x1 << 13)
278 #define GEN6_PIPE_CONTROL_RENDER_CACHE_FLUSH			(0x1 << 12)
279 #define GEN6_PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE		(0x1 << 11)
280 #define GEN6_PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE		(0x1 << 10)
281 #define GEN6_PIPE_CONTROL_INDIRECT_STATE_POINTERS_DISABLE	(0x1 << 9)
282 #define GEN6_PIPE_CONTROL_NOTIFY_ENABLE				(0x1 << 8)
283 #define GEN7_PIPE_CONTROL_WRITE_IMM_FLUSH			(0x1 << 7)
284 #define GEN6_PIPE_CONTROL_PROTECTED_MEMORY_APP_ID__MASK		0x00000040
285 #define GEN6_PIPE_CONTROL_PROTECTED_MEMORY_APP_ID__SHIFT	6
286 #define GEN7_PIPE_CONTROL_DC_FLUSH				(0x1 << 5)
287 #define GEN6_PIPE_CONTROL_VF_CACHE_INVALIDATE			(0x1 << 4)
288 #define GEN6_PIPE_CONTROL_CONSTANT_CACHE_INVALIDATE		(0x1 << 3)
289 #define GEN6_PIPE_CONTROL_STATE_CACHE_INVALIDATE		(0x1 << 2)
290 #define GEN6_PIPE_CONTROL_PIXEL_SCOREBOARD_STALL		(0x1 << 1)
291 #define GEN6_PIPE_CONTROL_DEPTH_CACHE_FLUSH			(0x1 << 0)
292 
293 #define GEN6_PIPE_CONTROL_DW2_USE_GGTT				(0x1 << 2)
294 #define GEN6_PIPE_CONTROL_DW2_ADDR__MASK			0xfffffff8
295 #define GEN6_PIPE_CONTROL_DW2_ADDR__SHIFT			3
296 #define GEN6_PIPE_CONTROL_DW2_ADDR__SHR				3
297 
298 #define GEN7_PIPE_CONTROL_DW2_ADDR__MASK			0xfffffffc
299 #define GEN7_PIPE_CONTROL_DW2_ADDR__SHIFT			2
300 #define GEN7_PIPE_CONTROL_DW2_ADDR__SHR				2
301 
302 #define GEN8_PIPE_CONTROL_DW2_ADDR__MASK			0xfffffffc
303 #define GEN8_PIPE_CONTROL_DW2_ADDR__SHIFT			2
304 #define GEN8_PIPE_CONTROL_DW2_ADDR__SHR				2
305 
306 
307 
308 
309 
310 #endif /* GEN_RENDER_XML */
311