1 /*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #ifndef ART_RUNTIME_ARCH_INSTRUCTION_SET_H_
18 #define ART_RUNTIME_ARCH_INSTRUCTION_SET_H_
19
20 #include <iosfwd>
21 #include <string>
22
23 #include "base/enums.h"
24 #include "base/macros.h"
25
26 namespace art {
27
28 enum InstructionSet {
29 kNone,
30 kArm,
31 kArm64,
32 kThumb2,
33 kX86,
34 kX86_64,
35 kMips,
36 kMips64
37 };
38 std::ostream& operator<<(std::ostream& os, const InstructionSet& rhs);
39
40 #if defined(__arm__)
41 static constexpr InstructionSet kRuntimeISA = kArm;
42 #elif defined(__aarch64__)
43 static constexpr InstructionSet kRuntimeISA = kArm64;
44 #elif defined(__mips__) && !defined(__LP64__)
45 static constexpr InstructionSet kRuntimeISA = kMips;
46 #elif defined(__mips__) && defined(__LP64__)
47 static constexpr InstructionSet kRuntimeISA = kMips64;
48 #elif defined(__i386__)
49 static constexpr InstructionSet kRuntimeISA = kX86;
50 #elif defined(__x86_64__)
51 static constexpr InstructionSet kRuntimeISA = kX86_64;
52 #else
53 static constexpr InstructionSet kRuntimeISA = kNone;
54 #endif
55
56 // Architecture-specific pointer sizes
57 static constexpr PointerSize kArmPointerSize = PointerSize::k32;
58 static constexpr PointerSize kArm64PointerSize = PointerSize::k64;
59 static constexpr PointerSize kMipsPointerSize = PointerSize::k32;
60 static constexpr PointerSize kMips64PointerSize = PointerSize::k64;
61 static constexpr PointerSize kX86PointerSize = PointerSize::k32;
62 static constexpr PointerSize kX86_64PointerSize = PointerSize::k64;
63
64 // ARM instruction alignment. ARM processors require code to be 4-byte aligned,
65 // but ARM ELF requires 8..
66 static constexpr size_t kArmAlignment = 8;
67
68 // ARM64 instruction alignment. This is the recommended alignment for maximum performance.
69 static constexpr size_t kArm64Alignment = 16;
70
71 // MIPS instruction alignment. MIPS processors require code to be 4-byte aligned,
72 // but 64-bit literals must be 8-byte aligned.
73 static constexpr size_t kMipsAlignment = 8;
74
75 // X86 instruction alignment. This is the recommended alignment for maximum performance.
76 static constexpr size_t kX86Alignment = 16;
77
78 // Different than code alignment since code alignment is only first instruction of method.
79 static constexpr size_t kThumb2InstructionAlignment = 2;
80 static constexpr size_t kArm64InstructionAlignment = 4;
81 static constexpr size_t kX86InstructionAlignment = 1;
82 static constexpr size_t kX86_64InstructionAlignment = 1;
83 static constexpr size_t kMipsInstructionAlignment = 4;
84 static constexpr size_t kMips64InstructionAlignment = 4;
85
86 const char* GetInstructionSetString(InstructionSet isa);
87
88 // Note: Returns kNone when the string cannot be parsed to a known value.
89 InstructionSet GetInstructionSetFromString(const char* instruction_set);
90
91 InstructionSet GetInstructionSetFromELF(uint16_t e_machine, uint32_t e_flags);
92
93 // Fatal logging out of line to keep the header clean of logging.h.
94 NO_RETURN void InstructionSetAbort(InstructionSet isa);
95
GetInstructionSetPointerSize(InstructionSet isa)96 constexpr PointerSize GetInstructionSetPointerSize(InstructionSet isa) {
97 switch (isa) {
98 case kArm:
99 // Fall-through.
100 case kThumb2:
101 return kArmPointerSize;
102 case kArm64:
103 return kArm64PointerSize;
104 case kX86:
105 return kX86PointerSize;
106 case kX86_64:
107 return kX86_64PointerSize;
108 case kMips:
109 return kMipsPointerSize;
110 case kMips64:
111 return kMips64PointerSize;
112
113 case kNone:
114 break;
115 }
116 InstructionSetAbort(isa);
117 }
118
GetInstructionSetInstructionAlignment(InstructionSet isa)119 constexpr size_t GetInstructionSetInstructionAlignment(InstructionSet isa) {
120 switch (isa) {
121 case kArm:
122 // Fall-through.
123 case kThumb2:
124 return kThumb2InstructionAlignment;
125 case kArm64:
126 return kArm64InstructionAlignment;
127 case kX86:
128 return kX86InstructionAlignment;
129 case kX86_64:
130 return kX86_64InstructionAlignment;
131 case kMips:
132 return kMipsInstructionAlignment;
133 case kMips64:
134 return kMips64InstructionAlignment;
135
136 case kNone:
137 break;
138 }
139 InstructionSetAbort(isa);
140 }
141
IsValidInstructionSet(InstructionSet isa)142 constexpr bool IsValidInstructionSet(InstructionSet isa) {
143 switch (isa) {
144 case kArm:
145 case kThumb2:
146 case kArm64:
147 case kX86:
148 case kX86_64:
149 case kMips:
150 case kMips64:
151 return true;
152
153 case kNone:
154 return false;
155 }
156 return false;
157 }
158
159 size_t GetInstructionSetAlignment(InstructionSet isa);
160
Is64BitInstructionSet(InstructionSet isa)161 constexpr bool Is64BitInstructionSet(InstructionSet isa) {
162 switch (isa) {
163 case kArm:
164 case kThumb2:
165 case kX86:
166 case kMips:
167 return false;
168
169 case kArm64:
170 case kX86_64:
171 case kMips64:
172 return true;
173
174 case kNone:
175 break;
176 }
177 InstructionSetAbort(isa);
178 }
179
InstructionSetPointerSize(InstructionSet isa)180 constexpr PointerSize InstructionSetPointerSize(InstructionSet isa) {
181 return Is64BitInstructionSet(isa) ? PointerSize::k64 : PointerSize::k32;
182 }
183
GetBytesPerGprSpillLocation(InstructionSet isa)184 constexpr size_t GetBytesPerGprSpillLocation(InstructionSet isa) {
185 switch (isa) {
186 case kArm:
187 // Fall-through.
188 case kThumb2:
189 return 4;
190 case kArm64:
191 return 8;
192 case kX86:
193 return 4;
194 case kX86_64:
195 return 8;
196 case kMips:
197 return 4;
198 case kMips64:
199 return 8;
200
201 case kNone:
202 break;
203 }
204 InstructionSetAbort(isa);
205 }
206
GetBytesPerFprSpillLocation(InstructionSet isa)207 constexpr size_t GetBytesPerFprSpillLocation(InstructionSet isa) {
208 switch (isa) {
209 case kArm:
210 // Fall-through.
211 case kThumb2:
212 return 4;
213 case kArm64:
214 return 8;
215 case kX86:
216 return 8;
217 case kX86_64:
218 return 8;
219 case kMips:
220 return 4;
221 case kMips64:
222 return 8;
223
224 case kNone:
225 break;
226 }
227 InstructionSetAbort(isa);
228 }
229
230 size_t GetStackOverflowReservedBytes(InstructionSet isa);
231
232 // The following definitions create return types for two word-sized entities that will be passed
233 // in registers so that memory operations for the interface trampolines can be avoided. The entities
234 // are the resolved method and the pointer to the code to be invoked.
235 //
236 // On x86, ARM32 and MIPS, this is given for a *scalar* 64bit value. The definition thus *must* be
237 // uint64_t or long long int.
238 //
239 // On x86_64, ARM64 and MIPS64, structs are decomposed for allocation, so we can create a structs of
240 // two size_t-sized values.
241 //
242 // We need two operations:
243 //
244 // 1) A flag value that signals failure. The assembly stubs expect the lower part to be "0".
245 // GetTwoWordFailureValue() will return a value that has lower part == 0.
246 //
247 // 2) A value that combines two word-sized values.
248 // GetTwoWordSuccessValue() constructs this.
249 //
250 // IMPORTANT: If you use this to transfer object pointers, it is your responsibility to ensure
251 // that the object does not move or the value is updated. Simple use of this is NOT SAFE
252 // when the garbage collector can move objects concurrently. Ensure that required locks
253 // are held when using!
254
255 #if defined(__i386__) || defined(__arm__) || (defined(__mips__) && !defined(__LP64__))
256 typedef uint64_t TwoWordReturn;
257
258 // Encodes method_ptr==nullptr and code_ptr==nullptr
GetTwoWordFailureValue()259 static inline constexpr TwoWordReturn GetTwoWordFailureValue() {
260 return 0;
261 }
262
263 // Use the lower 32b for the method pointer and the upper 32b for the code pointer.
GetTwoWordSuccessValue(uintptr_t hi,uintptr_t lo)264 static inline constexpr TwoWordReturn GetTwoWordSuccessValue(uintptr_t hi, uintptr_t lo) {
265 static_assert(sizeof(uint32_t) == sizeof(uintptr_t), "Unexpected size difference");
266 uint32_t lo32 = lo;
267 uint64_t hi64 = static_cast<uint64_t>(hi);
268 return ((hi64 << 32) | lo32);
269 }
270
271 #elif defined(__x86_64__) || defined(__aarch64__) || (defined(__mips__) && defined(__LP64__))
272
273 // Note: TwoWordReturn can't be constexpr for 64-bit targets. We'd need a constexpr constructor,
274 // which would violate C-linkage in the entrypoint functions.
275
276 struct TwoWordReturn {
277 uintptr_t lo;
278 uintptr_t hi;
279 };
280
281 // Encodes method_ptr==nullptr. Leaves random value in code pointer.
GetTwoWordFailureValue()282 static inline TwoWordReturn GetTwoWordFailureValue() {
283 TwoWordReturn ret;
284 ret.lo = 0;
285 return ret;
286 }
287
288 // Write values into their respective members.
GetTwoWordSuccessValue(uintptr_t hi,uintptr_t lo)289 static inline TwoWordReturn GetTwoWordSuccessValue(uintptr_t hi, uintptr_t lo) {
290 TwoWordReturn ret;
291 ret.lo = lo;
292 ret.hi = hi;
293 return ret;
294 }
295 #else
296 #error "Unsupported architecture"
297 #endif
298
299 } // namespace art
300
301 #endif // ART_RUNTIME_ARCH_INSTRUCTION_SET_H_
302