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1 #ifndef HEXAGONVLIWPACKETIZER_H
2 #define HEXAGONVLIWPACKETIZER_H
3 
4 #include "llvm/CodeGen/DFAPacketizer.h"
5 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
6 #include "llvm/CodeGen/ScheduleDAG.h"
7 #include "llvm/CodeGen/ScheduleDAGInstrs.h"
8 
9 namespace llvm {
10 class HexagonPacketizerList : public VLIWPacketizerList {
11   // Vector of instructions assigned to the packet that has just been created.
12   std::vector<MachineInstr*> OldPacketMIs;
13 
14   // Has the instruction been promoted to a dot-new instruction.
15   bool PromotedToDotNew;
16 
17   // Has the instruction been glued to allocframe.
18   bool GlueAllocframeStore;
19 
20   // Has the feeder instruction been glued to new value jump.
21   bool GlueToNewValueJump;
22 
23   // Check if there is a dependence between some instruction already in this
24   // packet and this instruction.
25   bool Dependence;
26 
27   // Only check for dependence if there are resources available to
28   // schedule this instruction.
29   bool FoundSequentialDependence;
30 
31   // Track MIs with ignored dependence.
32   std::vector<MachineInstr*> IgnoreDepMIs;
33 
34 protected:
35   /// \brief A handle to the branch probability pass.
36   const MachineBranchProbabilityInfo *MBPI;
37   const MachineLoopInfo *MLI;
38 
39 private:
40   const HexagonInstrInfo *HII;
41   const HexagonRegisterInfo *HRI;
42 
43 public:
44   // Ctor.
45   HexagonPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI,
46                         AliasAnalysis *AA,
47                         const MachineBranchProbabilityInfo *MBPI);
48 
49   // initPacketizerState - initialize some internal flags.
50   void initPacketizerState() override;
51 
52   // ignorePseudoInstruction - Ignore bundling of pseudo instructions.
53   bool ignorePseudoInstruction(const MachineInstr &MI,
54                                const MachineBasicBlock *MBB) override;
55 
56   // isSoloInstruction - return true if instruction MI can not be packetized
57   // with any other instruction, which means that MI itself is a packet.
58   bool isSoloInstruction(const MachineInstr &MI) override;
59 
60   // isLegalToPacketizeTogether - Is it legal to packetize SUI and SUJ
61   // together.
62   bool isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ) override;
63 
64   // isLegalToPruneDependencies - Is it legal to prune dependece between SUI
65   // and SUJ.
66   bool isLegalToPruneDependencies(SUnit *SUI, SUnit *SUJ) override;
67 
68   MachineBasicBlock::iterator addToPacket(MachineInstr &MI) override;
69   void endPacket(MachineBasicBlock *MBB,
70                  MachineBasicBlock::iterator MI) override;
71   bool shouldAddToPacket(const MachineInstr &MI) override;
72 
73   void unpacketizeSoloInstrs(MachineFunction &MF);
74 
75 protected:
76   bool isCallDependent(const MachineInstr* MI, SDep::Kind DepType,
77                        unsigned DepReg);
78   bool promoteToDotCur(MachineInstr* MI, SDep::Kind DepType,
79                        MachineBasicBlock::iterator &MII,
80                        const TargetRegisterClass* RC);
81   bool canPromoteToDotCur(const MachineInstr* MI, const SUnit* PacketSU,
82                           unsigned DepReg, MachineBasicBlock::iterator &MII,
83                           const TargetRegisterClass* RC);
84   void cleanUpDotCur();
85 
86   bool promoteToDotNew(MachineInstr* MI, SDep::Kind DepType,
87                        MachineBasicBlock::iterator &MII,
88                        const TargetRegisterClass* RC);
89   bool canPromoteToDotNew(const MachineInstr* MI, const SUnit* PacketSU,
90                           unsigned DepReg, MachineBasicBlock::iterator &MII,
91                           const TargetRegisterClass* RC);
92   bool canPromoteToNewValue(const MachineInstr* MI, const SUnit* PacketSU,
93                             unsigned DepReg, MachineBasicBlock::iterator &MII);
94   bool canPromoteToNewValueStore(const MachineInstr* MI,
95                                  const MachineInstr* PacketMI, unsigned DepReg);
96   bool demoteToDotOld(MachineInstr* MI);
97   bool arePredicatesComplements(MachineInstr &MI1, MachineInstr &MI2);
98   bool restrictingDepExistInPacket(MachineInstr*, unsigned);
99   bool isNewifiable(const MachineInstr *MI);
100   bool isCurifiable(MachineInstr* MI);
101   bool cannotCoexist(const MachineInstr *MI, const MachineInstr *MJ);
isPromotedToDotNew()102   inline bool isPromotedToDotNew() const {
103     return PromotedToDotNew;
104   }
105   bool tryAllocateResourcesForConstExt(bool Reserve);
106   bool canReserveResourcesForConstExt();
107   void reserveResourcesForConstExt();
108   bool hasDeadDependence(const MachineInstr *I, const MachineInstr *J);
109   bool hasControlDependence(const MachineInstr *I, const MachineInstr *J);
110   bool hasV4SpecificDependence(const MachineInstr *I, const MachineInstr *J);
111   bool producesStall(const MachineInstr *MI);
112 };
113 } // namespace llvm
114 #endif // HEXAGONVLIWPACKETIZER_H
115 
116