1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines interfaces to access the target independent code generation 11 // passes provided by the LLVM backend. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_CODEGEN_PASSES_H 16 #define LLVM_CODEGEN_PASSES_H 17 18 #include <functional> 19 #include <string> 20 21 namespace llvm { 22 23 class Function; 24 class FunctionPass; 25 class MachineFunctionPass; 26 class ModulePass; 27 class Pass; 28 class TargetMachine; 29 class TargetRegisterClass; 30 class raw_ostream; 31 32 } // End llvm namespace 33 34 /// List of target independent CodeGen pass IDs. 35 namespace llvm { 36 FunctionPass *createAtomicExpandPass(const TargetMachine *TM); 37 38 /// createUnreachableBlockEliminationPass - The LLVM code generator does not 39 /// work well with unreachable basic blocks (what live ranges make sense for a 40 /// block that cannot be reached?). As such, a code generator should either 41 /// not instruction select unreachable blocks, or run this pass as its 42 /// last LLVM modifying pass to clean up blocks that are not reachable from 43 /// the entry block. 44 FunctionPass *createUnreachableBlockEliminationPass(); 45 46 /// MachineFunctionPrinter pass - This pass prints out the machine function to 47 /// the given stream as a debugging tool. 48 MachineFunctionPass * 49 createMachineFunctionPrinterPass(raw_ostream &OS, 50 const std::string &Banner =""); 51 52 /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream 53 /// using the MIR serialization format. 54 MachineFunctionPass *createPrintMIRPass(raw_ostream &OS); 55 56 /// createCodeGenPreparePass - Transform the code to expose more pattern 57 /// matching during instruction selection. 58 FunctionPass *createCodeGenPreparePass(const TargetMachine *TM = nullptr); 59 60 /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg 61 /// load-linked/store-conditional loops. 62 extern char &AtomicExpandID; 63 64 /// MachineLoopInfo - This pass is a loop analysis pass. 65 extern char &MachineLoopInfoID; 66 67 /// MachineDominators - This pass is a machine dominators analysis pass. 68 extern char &MachineDominatorsID; 69 70 /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass. 71 extern char &MachineDominanceFrontierID; 72 73 /// EdgeBundles analysis - Bundle machine CFG edges. 74 extern char &EdgeBundlesID; 75 76 /// LiveVariables pass - This pass computes the set of blocks in which each 77 /// variable is life and sets machine operand kill flags. 78 extern char &LiveVariablesID; 79 80 /// PHIElimination - This pass eliminates machine instruction PHI nodes 81 /// by inserting copy instructions. This destroys SSA information, but is the 82 /// desired input for some register allocators. This pass is "required" by 83 /// these register allocator like this: AU.addRequiredID(PHIEliminationID); 84 extern char &PHIEliminationID; 85 86 /// LiveIntervals - This analysis keeps track of the live ranges of virtual 87 /// and physical registers. 88 extern char &LiveIntervalsID; 89 90 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots. 91 extern char &LiveStacksID; 92 93 /// TwoAddressInstruction - This pass reduces two-address instructions to 94 /// use two operands. This destroys SSA information but it is desired by 95 /// register allocators. 96 extern char &TwoAddressInstructionPassID; 97 98 /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs. 99 extern char &ProcessImplicitDefsID; 100 101 /// RegisterCoalescer - This pass merges live ranges to eliminate copies. 102 extern char &RegisterCoalescerID; 103 104 /// MachineScheduler - This pass schedules machine instructions. 105 extern char &MachineSchedulerID; 106 107 /// PostMachineScheduler - This pass schedules machine instructions postRA. 108 extern char &PostMachineSchedulerID; 109 110 /// SpillPlacement analysis. Suggest optimal placement of spill code between 111 /// basic blocks. 112 extern char &SpillPlacementID; 113 114 /// ShrinkWrap pass. Look for the best place to insert save and restore 115 // instruction and update the MachineFunctionInfo with that information. 116 extern char &ShrinkWrapID; 117 118 /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as 119 /// assigned in VirtRegMap. 120 extern char &VirtRegRewriterID; 121 122 /// UnreachableMachineBlockElimination - This pass removes unreachable 123 /// machine basic blocks. 124 extern char &UnreachableMachineBlockElimID; 125 126 /// DeadMachineInstructionElim - This pass removes dead machine instructions. 127 extern char &DeadMachineInstructionElimID; 128 129 /// This pass adds dead/undef flags after analyzing subregister lanes. 130 extern char &DetectDeadLanesID; 131 132 /// FastRegisterAllocation Pass - This pass register allocates as fast as 133 /// possible. It is best suited for debug code where live ranges are short. 134 /// 135 FunctionPass *createFastRegisterAllocator(); 136 137 /// BasicRegisterAllocation Pass - This pass implements a degenerate global 138 /// register allocator using the basic regalloc framework. 139 /// 140 FunctionPass *createBasicRegisterAllocator(); 141 142 /// Greedy register allocation pass - This pass implements a global register 143 /// allocator for optimized builds. 144 /// 145 FunctionPass *createGreedyRegisterAllocator(); 146 147 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean 148 /// Quadratic Prograaming (PBQP) based register allocator. 149 /// 150 FunctionPass *createDefaultPBQPRegisterAllocator(); 151 152 /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code, 153 /// and eliminates abstract frame references. 154 extern char &PrologEpilogCodeInserterID; 155 MachineFunctionPass *createPrologEpilogInserterPass(const TargetMachine *TM); 156 157 /// ExpandPostRAPseudos - This pass expands pseudo instructions after 158 /// register allocation. 159 extern char &ExpandPostRAPseudosID; 160 161 /// createPostRAHazardRecognizer - This pass runs the post-ra hazard 162 /// recognizer. 163 extern char &PostRAHazardRecognizerID; 164 165 /// createPostRAScheduler - This pass performs post register allocation 166 /// scheduling. 167 extern char &PostRASchedulerID; 168 169 /// BranchFolding - This pass performs machine code CFG based 170 /// optimizations to delete branches to branches, eliminate branches to 171 /// successor blocks (creating fall throughs), and eliminating branches over 172 /// branches. 173 extern char &BranchFolderPassID; 174 175 /// MachineFunctionPrinterPass - This pass prints out MachineInstr's. 176 extern char &MachineFunctionPrinterPassID; 177 178 /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR 179 /// serialization format. 180 extern char &MIRPrintingPassID; 181 182 /// TailDuplicate - Duplicate blocks with unconditional branches 183 /// into tails of their predecessors. 184 extern char &TailDuplicateID; 185 186 /// MachineTraceMetrics - This pass computes critical path and CPU resource 187 /// usage in an ensemble of traces. 188 extern char &MachineTraceMetricsID; 189 190 /// EarlyIfConverter - This pass performs if-conversion on SSA form by 191 /// inserting cmov instructions. 192 extern char &EarlyIfConverterID; 193 194 /// This pass performs instruction combining using trace metrics to estimate 195 /// critical-path and resource depth. 196 extern char &MachineCombinerID; 197 198 /// StackSlotColoring - This pass performs stack coloring and merging. 199 /// It merges disjoint allocas to reduce the stack size. 200 extern char &StackColoringID; 201 202 /// IfConverter - This pass performs machine code if conversion. 203 extern char &IfConverterID; 204 205 FunctionPass *createIfConverter(std::function<bool(const Function &)> Ftor); 206 207 /// MachineBlockPlacement - This pass places basic blocks based on branch 208 /// probabilities. 209 extern char &MachineBlockPlacementID; 210 211 /// MachineBlockPlacementStats - This pass collects statistics about the 212 /// basic block placement using branch probabilities and block frequency 213 /// information. 214 extern char &MachineBlockPlacementStatsID; 215 216 /// GCLowering Pass - Used by gc.root to perform its default lowering 217 /// operations. 218 FunctionPass *createGCLoweringPass(); 219 220 /// ShadowStackGCLowering - Implements the custom lowering mechanism 221 /// used by the shadow stack GC. Only runs on functions which opt in to 222 /// the shadow stack collector. 223 FunctionPass *createShadowStackGCLoweringPass(); 224 225 /// GCMachineCodeAnalysis - Target-independent pass to mark safe points 226 /// in machine code. Must be added very late during code generation, just 227 /// prior to output, and importantly after all CFG transformations (such as 228 /// branch folding). 229 extern char &GCMachineCodeAnalysisID; 230 231 /// Creates a pass to print GC metadata. 232 /// 233 FunctionPass *createGCInfoPrinter(raw_ostream &OS); 234 235 /// MachineCSE - This pass performs global CSE on machine instructions. 236 extern char &MachineCSEID; 237 238 /// ImplicitNullChecks - This pass folds null pointer checks into nearby 239 /// memory operations. 240 extern char &ImplicitNullChecksID; 241 242 /// MachineLICM - This pass performs LICM on machine instructions. 243 extern char &MachineLICMID; 244 245 /// MachineSinking - This pass performs sinking on machine instructions. 246 extern char &MachineSinkingID; 247 248 /// MachineCopyPropagation - This pass performs copy propagation on 249 /// machine instructions. 250 extern char &MachineCopyPropagationID; 251 252 /// PeepholeOptimizer - This pass performs peephole optimizations - 253 /// like extension and comparison eliminations. 254 extern char &PeepholeOptimizerID; 255 256 /// OptimizePHIs - This pass optimizes machine instruction PHIs 257 /// to take advantage of opportunities created during DAG legalization. 258 extern char &OptimizePHIsID; 259 260 /// StackSlotColoring - This pass performs stack slot coloring. 261 extern char &StackSlotColoringID; 262 263 /// \brief This pass lays out funclets contiguously. 264 extern char &FuncletLayoutID; 265 266 /// This pass inserts the XRay instrumentation sleds if they are supported by 267 /// the target platform. 268 extern char &XRayInstrumentationID; 269 270 /// \brief This pass implements the "patchable-function" attribute. 271 extern char &PatchableFunctionID; 272 273 /// createStackProtectorPass - This pass adds stack protectors to functions. 274 /// 275 FunctionPass *createStackProtectorPass(const TargetMachine *TM); 276 277 /// createMachineVerifierPass - This pass verifies cenerated machine code 278 /// instructions for correctness. 279 /// 280 FunctionPass *createMachineVerifierPass(const std::string& Banner); 281 282 /// createDwarfEHPass - This pass mulches exception handling code into a form 283 /// adapted to code generation. Required if using dwarf exception handling. 284 FunctionPass *createDwarfEHPass(const TargetMachine *TM); 285 286 /// createWinEHPass - Prepares personality functions used by MSVC on Windows, 287 /// in addition to the Itanium LSDA based personalities. 288 FunctionPass *createWinEHPass(const TargetMachine *TM); 289 290 /// createSjLjEHPreparePass - This pass adapts exception handling code to use 291 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow. 292 /// 293 FunctionPass *createSjLjEHPreparePass(); 294 295 /// LocalStackSlotAllocation - This pass assigns local frame indices to stack 296 /// slots relative to one another and allocates base registers to access them 297 /// when it is estimated by the target to be out of range of normal frame 298 /// pointer or stack pointer index addressing. 299 extern char &LocalStackSlotAllocationID; 300 301 /// ExpandISelPseudos - This pass expands pseudo-instructions. 302 extern char &ExpandISelPseudosID; 303 304 /// createExecutionDependencyFixPass - This pass fixes execution time 305 /// problems with dependent instructions, such as switching execution 306 /// domains to match. 307 /// 308 /// The pass will examine instructions using and defining registers in RC. 309 /// 310 FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC); 311 312 /// UnpackMachineBundles - This pass unpack machine instruction bundles. 313 extern char &UnpackMachineBundlesID; 314 315 FunctionPass * 316 createUnpackMachineBundles(std::function<bool(const Function &)> Ftor); 317 318 /// FinalizeMachineBundles - This pass finalize machine instruction 319 /// bundles (created earlier, e.g. during pre-RA scheduling). 320 extern char &FinalizeMachineBundlesID; 321 322 /// StackMapLiveness - This pass analyses the register live-out set of 323 /// stackmap/patchpoint intrinsics and attaches the calculated information to 324 /// the intrinsic for later emission to the StackMap. 325 extern char &StackMapLivenessID; 326 327 /// LiveDebugValues pass 328 extern char &LiveDebugValuesID; 329 330 /// createJumpInstrTables - This pass creates jump-instruction tables. 331 ModulePass *createJumpInstrTablesPass(); 332 333 /// createForwardControlFlowIntegrityPass - This pass adds control-flow 334 /// integrity. 335 ModulePass *createForwardControlFlowIntegrityPass(); 336 337 /// InterleavedAccess Pass - This pass identifies and matches interleaved 338 /// memory accesses to target specific intrinsics. 339 /// 340 FunctionPass *createInterleavedAccessPass(const TargetMachine *TM); 341 342 /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all 343 /// TLS variables for the emulated TLS model. 344 /// 345 ModulePass *createLowerEmuTLSPass(const TargetMachine *TM); 346 347 /// This pass lowers the @llvm.load.relative intrinsic to instructions. 348 /// This is unsafe to do earlier because a pass may combine the constant 349 /// initializer into the load, which may result in an overflowing evaluation. 350 ModulePass *createPreISelIntrinsicLoweringPass(); 351 352 /// GlobalMerge - This pass merges internal (by default) globals into structs 353 /// to enable reuse of a base pointer by indexed addressing modes. 354 /// It can also be configured to focus on size optimizations only. 355 /// 356 Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset, 357 bool OnlyOptimizeForSize = false, 358 bool MergeExternalByDefault = false); 359 360 /// This pass splits the stack into a safe stack and an unsafe stack to 361 /// protect against stack-based overflow vulnerabilities. 362 FunctionPass *createSafeStackPass(const TargetMachine *TM = nullptr); 363 364 /// This pass detects subregister lanes in a virtual register that are used 365 /// independently of other lanes and splits them into separate virtual 366 /// registers. 367 extern char &RenameIndependentSubregsID; 368 369 /// This pass is executed POST-RA to collect which physical registers are 370 /// preserved by given machine function. 371 FunctionPass *createRegUsageInfoCollector(); 372 373 /// Return a MachineFunction pass that identifies call sites 374 /// and propagates register usage information of callee to caller 375 /// if available with PysicalRegisterUsageInfo pass. 376 FunctionPass *createRegUsageInfoPropPass(); 377 378 /// This pass performs software pipelining on machine instructions. 379 extern char &MachinePipelinerID; 380 } // End llvm namespace 381 382 /// Target machine pass initializer for passes with dependencies. Use with 383 /// INITIALIZE_TM_PASS_END. 384 #define INITIALIZE_TM_PASS_BEGIN INITIALIZE_PASS_BEGIN 385 386 /// Target machine pass initializer for passes with dependencies. Use with 387 /// INITIALIZE_TM_PASS_BEGIN. 388 #define INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) \ 389 PassInfo *PI = new PassInfo( \ 390 name, arg, &passName::ID, \ 391 PassInfo::NormalCtor_t(callDefaultCtor<passName>), cfg, analysis, \ 392 PassInfo::TargetMachineCtor_t(callTargetMachineCtor<passName>)); \ 393 Registry.registerPass(*PI, true); \ 394 return PI; \ 395 } \ 396 LLVM_DEFINE_ONCE_FLAG(Initialize##passName##PassFlag); \ 397 void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ 398 llvm::call_once(Initialize##passName##PassFlag, \ 399 initialize##passName##PassOnce, std::ref(Registry)); \ 400 } 401 402 /// This initializer registers TargetMachine constructor, so the pass being 403 /// initialized can use target dependent interfaces. Please do not move this 404 /// macro to be together with INITIALIZE_PASS, which is a complete target 405 /// independent initializer, and we don't want to make libScalarOpts depend 406 /// on libCodeGen. 407 #define INITIALIZE_TM_PASS(passName, arg, name, cfg, analysis) \ 408 INITIALIZE_TM_PASS_BEGIN(passName, arg, name, cfg, analysis) \ 409 INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) 410 411 #endif 412