/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64AddressingModes.h | 73 static inline AArch64_AM::ShiftExtendType getShiftType(unsigned Imm) { in getShiftType() 85 static inline unsigned getShiftValue(unsigned Imm) { in getShiftValue() 99 unsigned Imm) { in getShifterImm() 118 static inline unsigned getArithShiftValue(unsigned Imm) { in getArithShiftValue() 123 static inline AArch64_AM::ShiftExtendType getExtendType(unsigned Imm) { in getExtendType() 138 static inline AArch64_AM::ShiftExtendType getArithExtendType(unsigned Imm) { in getArithExtendType() 171 unsigned Imm) { in getArithExtendImm() 178 static inline bool getMemDoShift(unsigned Imm) { in getMemDoShift() 184 static inline AArch64_AM::ShiftExtendType getMemExtendType(unsigned Imm) { in getMemExtendType() 213 static inline bool processLogicalImmediate(uint64_t Imm, unsigned RegSize, in processLogicalImmediate() [all …]
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/external/llvm/lib/Target/Mips/ |
D | MipsAnalyzeImmediate.cpp | 29 void MipsAnalyzeImmediate::GetInstSeqLsADDiu(uint64_t Imm, unsigned RemSize, in GetInstSeqLsADDiu() 35 void MipsAnalyzeImmediate::GetInstSeqLsORi(uint64_t Imm, unsigned RemSize, in GetInstSeqLsORi() 41 void MipsAnalyzeImmediate::GetInstSeqLsSLL(uint64_t Imm, unsigned RemSize, in GetInstSeqLsSLL() 48 void MipsAnalyzeImmediate::GetInstSeqLs(uint64_t Imm, unsigned RemSize, in GetInstSeqLs() 94 int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd); in ReplaceADDiuSLLWithLUi() local 126 &MipsAnalyzeImmediate::Analyze(uint64_t Imm, unsigned Size, in Analyze()
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D | MipsISelDAGToDAG.h | 123 inline SDValue getImm(const SDNode *Node, uint64_t Imm) { in getImm()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
D | ARMAddressingModes.h | 111 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc() 123 static inline unsigned getSOImmValImm(unsigned Imm) { in getSOImmValImm() 128 static inline unsigned getSOImmValRot(unsigned Imm) { in getSOImmValRot() 136 static inline unsigned getSOImmValRotate(unsigned Imm) { in getSOImmValRotate() 217 static inline unsigned getThumbImmValShift(unsigned Imm) { in getThumbImmValShift() 236 static inline unsigned getThumbImm16ValShift(unsigned Imm) { in getThumbImm16ValShift() 270 unsigned u, Vs, Imm; in getT2SOImmValSplatVal() local 334 static inline bool isT2SOImmTwoPartVal (unsigned Imm) { in isT2SOImmTwoPartVal() 361 static inline unsigned getT2SOImmTwoPartFirst(unsigned Imm) { in getT2SOImmTwoPartFirst() 378 static inline unsigned getT2SOImmTwoPartSecond(unsigned Imm) { in getT2SOImmTwoPartSecond() [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/X86/Utils/ |
D | X86ShuffleDecode.cpp | 23 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<unsigned> &ShuffleMask) { in DecodeINSERTPSMask() 66 void DecodePSHUFMask(unsigned NElts, unsigned Imm, in DecodePSHUFMask() 74 void DecodePSHUFHWMask(unsigned Imm, in DecodePSHUFHWMask() 86 void DecodePSHUFLWMask(unsigned Imm, in DecodePSHUFLWMask() 131 void DecodeSHUFPSMask(unsigned NElts, unsigned Imm, in DecodeSHUFPSMask() 193 void DecodeVPERMILPSMask(unsigned NumElts, unsigned Imm, in DecodeVPERMILPSMask() 210 void DecodeVPERMILPDMask(unsigned NumElts, unsigned Imm, in DecodeVPERMILPDMask() 223 void DecodeVPERM2F128Mask(EVT VT, unsigned Imm, in DecodeVPERM2F128Mask() 235 void DecodeVPERM2F128Mask(unsigned Imm, in DecodeVPERM2F128Mask()
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMAddressingModes.h | 112 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc() 124 static inline unsigned getSOImmValImm(unsigned Imm) { in getSOImmValImm() 129 static inline unsigned getSOImmValRot(unsigned Imm) { in getSOImmValRot() 137 static inline unsigned getSOImmValRotate(unsigned Imm) { in getSOImmValRotate() 218 static inline unsigned getThumbImmValShift(unsigned Imm) { in getThumbImmValShift() 237 static inline unsigned getThumbImm16ValShift(unsigned Imm) { in getThumbImm16ValShift() 271 unsigned u, Vs, Imm; in getT2SOImmValSplatVal() local 335 static inline bool isT2SOImmTwoPartVal (unsigned Imm) { in isT2SOImmTwoPartVal() 362 static inline unsigned getT2SOImmTwoPartFirst(unsigned Imm) { in getT2SOImmTwoPartFirst() 379 static inline unsigned getT2SOImmTwoPartSecond(unsigned Imm) { in getT2SOImmTwoPartSecond() [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 63 inline SDValue getI32Imm(unsigned Imm) { in getI32Imm() 69 inline SDValue getI64Imm(uint64_t Imm) { in getI64Imm() 74 inline SDValue getSmallIPtrImm(unsigned Imm) { in getSmallIPtrImm() 259 static bool isIntS16Immediate(SDNode *N, short &Imm) { in isIntS16Immediate() 270 static bool isIntS16Immediate(SDValue Op, short &Imm) { in isIntS16Immediate() 277 static bool isInt32Immediate(SDNode *N, unsigned &Imm) { in isInt32Immediate() 287 static bool isInt64Immediate(SDNode *N, uint64_t &Imm) { in isInt64Immediate() 297 static bool isInt32Immediate(SDValue N, unsigned &Imm) { in isInt32Immediate() 305 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) { in isOpcWithIntImmediate() 452 unsigned Imm; in SelectCC() local [all …]
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/external/llvm/lib/Target/SystemZ/Disassembler/ |
D | SystemZDisassembler.cpp | 154 static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm) { in decodeUImmOperand() 162 static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm) { in decodeSImmOperand() 169 static DecodeStatus decodeAccessRegOperand(MCInst &Inst, uint64_t Imm, in decodeAccessRegOperand() 175 static DecodeStatus decodeU1ImmOperand(MCInst &Inst, uint64_t Imm, in decodeU1ImmOperand() 180 static DecodeStatus decodeU2ImmOperand(MCInst &Inst, uint64_t Imm, in decodeU2ImmOperand() 185 static DecodeStatus decodeU3ImmOperand(MCInst &Inst, uint64_t Imm, in decodeU3ImmOperand() 190 static DecodeStatus decodeU4ImmOperand(MCInst &Inst, uint64_t Imm, in decodeU4ImmOperand() 195 static DecodeStatus decodeU6ImmOperand(MCInst &Inst, uint64_t Imm, in decodeU6ImmOperand() 200 static DecodeStatus decodeU8ImmOperand(MCInst &Inst, uint64_t Imm, in decodeU8ImmOperand() 205 static DecodeStatus decodeU12ImmOperand(MCInst &Inst, uint64_t Imm, in decodeU12ImmOperand() [all …]
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZTargetTransformInfo.cpp | 34 int SystemZTTIImpl::getIntImmCost(const APInt &Imm, Type *Ty) { in getIntImmCost() 67 const APInt &Imm, Type *Ty) { in getIntImmCost() 185 const APInt &Imm, Type *Ty) { in getIntImmCost()
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/external/llvm/lib/Target/Lanai/ |
D | LanaiISelDAGToDAG.cpp | 86 inline SDValue getI32Imm(unsigned Imm, const SDLoc &DL) { in getI32Imm() 109 int32_t Imm = CN->getSExtValue(); in selectAddrSls() local 131 int16_t Imm = CN->getSExtValue(); in selectAddrRiSpls() local 144 int16_t Imm = CN->getSExtValue(); in selectAddrRiSpls() local 301 SDValue Imm = CurDAG->getTargetConstant(0, DL, MVT::i32); in selectFrameIndex() local
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/external/llvm/lib/Target/WebAssembly/Disassembler/ |
D | WebAssemblyDisassembler.cpp | 100 uint64_t Imm = support::endian::read64le(Bytes.data() + Pos); in getInstruction() local 121 double Imm; in getInstruction() local 138 uint64_t Imm = support::endian::read64le(Bytes.data() + Pos); in getInstruction() local
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonAsmPrinter.cpp | 191 MCStreamer &OutStreamer, const MCOperand &Imm, in smallData() 281 const MCOperand &Imm = MappedInst.getOperand(1); in HexagonProcessInstruction() local 302 MCOperand &Imm = MappedInst.getOperand(1); in HexagonProcessInstruction() local 377 int64_t Imm; in HexagonProcessInstruction() local 404 int64_t Imm; in HexagonProcessInstruction() local 439 int64_t Imm; in HexagonProcessInstruction() local 485 int64_t Imm; in HexagonProcessInstruction() local 538 MCOperand &Imm = MappedInst.getOperand(2); in HexagonProcessInstruction() local
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
D | MBlazeISelDAGToDAG.cpp | 89 inline SDValue getI32Imm(unsigned Imm) { in getI32Imm() 100 static bool isIntS32Immediate(SDNode *N, int32_t &Imm) { in isIntS32Immediate() 112 static bool isIntS32Immediate(SDValue Op, int32_t &Imm) { in isIntS32Immediate() 166 uint32_t Imm = CN->getZExtValue(); in SelectAddrRegImm() local
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/external/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 590 static DecodeStatus DecodeFixedPointScaleImm32(llvm::MCInst &Inst, unsigned Imm, in DecodeFixedPointScaleImm32() 599 static DecodeStatus DecodeFixedPointScaleImm64(llvm::MCInst &Inst, unsigned Imm, in DecodeFixedPointScaleImm64() 606 static DecodeStatus DecodePCRelLabel19(llvm::MCInst &Inst, unsigned Imm, in DecodePCRelLabel19() 622 static DecodeStatus DecodeMemExtend(llvm::MCInst &Inst, unsigned Imm, in DecodeMemExtend() 629 static DecodeStatus DecodeMRSSystemRegister(llvm::MCInst &Inst, unsigned Imm, in DecodeMRSSystemRegister() 639 static DecodeStatus DecodeMSRSystemRegister(llvm::MCInst &Inst, unsigned Imm, in DecodeMSRSystemRegister() 670 static DecodeStatus DecodeVecShiftRImm(llvm::MCInst &Inst, unsigned Imm, in DecodeVecShiftRImm() 676 static DecodeStatus DecodeVecShiftLImm(llvm::MCInst &Inst, unsigned Imm, in DecodeVecShiftLImm() 682 static DecodeStatus DecodeVecShiftR64Imm(llvm::MCInst &Inst, unsigned Imm, in DecodeVecShiftR64Imm() 687 static DecodeStatus DecodeVecShiftR64ImmNarrow(llvm::MCInst &Inst, unsigned Imm, in DecodeVecShiftR64ImmNarrow() [all …]
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/external/llvm/lib/Target/X86/InstPrinter/ |
D | X86ATTInstPrinter.cpp | 74 int64_t Imm = MI->getOperand(Op).getImm(); in printSSEAVXCC() local 114 int64_t Imm = MI->getOperand(Op).getImm(); in printXOPCC() local 130 int64_t Imm = MI->getOperand(Op).getImm() & 0x3; in printRoundingControl() local 169 int64_t Imm = Op.getImm(); in printOperand() local
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D | X86IntelInstPrinter.cpp | 56 int64_t Imm = MI->getOperand(Op).getImm(); in printSSEAVXCC() local 96 int64_t Imm = MI->getOperand(Op).getImm(); in printXOPCC() local 112 int64_t Imm = MI->getOperand(Op).getImm() & 0x3; in printRoundingControl() local
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/external/llvm/lib/Target/NVPTX/InstPrinter/ |
D | NVPTXInstPrinter.cpp | 95 int64_t Imm = MO.getImm(); in printCvtMode() local 145 int64_t Imm = MO.getImm(); in printCmpMode() local 219 int Imm = (int) MO.getImm(); in printLdStCode() local
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/external/llvm/lib/Target/X86/Utils/ |
D | X86ShuffleDecode.cpp | 25 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodeINSERTPSMask() 107 void DecodePSLLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodePSLLDQMask() 121 void DecodePSRLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodePSRLDQMask() 136 void DecodePALIGNRMask(MVT VT, unsigned Imm, in DecodePALIGNRMask() 157 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodePSHUFMask() 174 void DecodePSHUFHWMask(MVT VT, unsigned Imm, in DecodePSHUFHWMask() 190 void DecodePSHUFLWMask(MVT VT, unsigned Imm, in DecodePSHUFLWMask() 219 void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodeSHUFPMask() 294 void decodeVSHUF64x2FamilyMask(MVT VT, unsigned Imm, in decodeVSHUF64x2FamilyMask() 311 void DecodeVPERM2X128Mask(MVT VT, unsigned Imm, in DecodeVPERM2X128Mask() [all …]
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/external/swiftshader/third_party/LLVM/utils/TableGen/ |
D | PseudoLoweringEmitter.h | 23 enum MapKind { Operand, Imm, Reg }; enumerator 27 uint64_t Imm; // Integer immedate value. member
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/external/swiftshader/third_party/LLVM/lib/MC/ |
D | MCInstrAnalysis.cpp | 19 int64_t Imm = Inst.getOperand(0).getImm(); in evaluateBranch() local
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/external/llvm/lib/MC/ |
D | MCInstrAnalysis.cpp | 19 int64_t Imm = Inst.getOperand(0).getImm(); in evaluateBranch() local
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/external/llvm/lib/Target/PowerPC/Disassembler/ |
D | PPCDisassembler.cpp | 300 static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm, in decodeUImmOperand() 308 static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm, in decodeSImmOperand() 315 static DecodeStatus decodeMemRIOperands(MCInst &Inst, uint64_t Imm, in decodeMemRIOperands() 350 static DecodeStatus decodeMemRIXOperands(MCInst &Inst, uint64_t Imm, in decodeMemRIXOperands() 371 static DecodeStatus decodeMemRIX16Operands(MCInst &Inst, uint64_t Imm, in decodeMemRIX16Operands() 386 static DecodeStatus decodeCRBitMOperand(MCInst &Inst, uint64_t Imm, in decodeCRBitMOperand()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelDAGToDAG.h | 73 inline SDValue getI32Imm(unsigned Imm, const SDLoc &DL) { in getI32Imm()
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
D | SystemZISelDAGToDAG.cpp | 103 inline SDValue getI8Imm(uint64_t Imm) { in getI8Imm() 109 inline SDValue getI16Imm(uint64_t Imm) { in getI16Imm() 115 inline SDValue getI32Imm(uint64_t Imm) { in getI32Imm() 159 static bool isImmSExt20(int64_t Val, int64_t &Imm) { in isImmSExt20() 171 static bool isImmZExt12(int64_t Val, int64_t &Imm) { in isImmZExt12() 197 int64_t Imm = 0; in MatchAddress() local 294 int64_t Imm = 0; in MatchAddress() local
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/external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
D | SIMCCodeEmitter.cpp | 89 static uint32_t getIntInlineImmEncoding(IntTy Imm) { in getIntInlineImmEncoding() 166 int64_t Imm; in getLitEncoding() local 222 int64_t Imm = 0; in encodeInstruction() local
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