1 /**************************************************************************
2 *
3 * Copyright 2007-2008 VMware, Inc.
4 * All Rights Reserved.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29 #ifndef TGSI_EXEC_H
30 #define TGSI_EXEC_H
31
32 #include "pipe/p_compiler.h"
33 #include "pipe/p_state.h"
34 #include "pipe/p_shader_tokens.h"
35
36 #if defined __cplusplus
37 extern "C" {
38 #endif
39
40 #define TGSI_CHAN_X 0
41 #define TGSI_CHAN_Y 1
42 #define TGSI_CHAN_Z 2
43 #define TGSI_CHAN_W 3
44
45 #define TGSI_NUM_CHANNELS 4 /* R,G,B,A */
46 #define TGSI_QUAD_SIZE 4 /* 4 pixel/quad */
47
48 #define TGSI_FOR_EACH_CHANNEL( CHAN )\
49 for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++)
50
51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
53
54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
55 if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
56
57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
58 TGSI_FOR_EACH_CHANNEL( CHAN )\
59 TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
60
61
62 /**
63 * Registers may be treated as float, signed int or unsigned int.
64 */
65 union tgsi_exec_channel
66 {
67 float f[TGSI_QUAD_SIZE];
68 int i[TGSI_QUAD_SIZE];
69 unsigned u[TGSI_QUAD_SIZE];
70 };
71
72 /**
73 * A vector[RGBA] of channels[4 pixels]
74 */
75 struct tgsi_exec_vector
76 {
77 union tgsi_exec_channel xyzw[TGSI_NUM_CHANNELS];
78 };
79
80 /**
81 * For fragment programs, information for computing fragment input
82 * values from plane equation of the triangle/line.
83 */
84 struct tgsi_interp_coef
85 {
86 float a0[TGSI_NUM_CHANNELS]; /* in an xyzw layout */
87 float dadx[TGSI_NUM_CHANNELS];
88 float dady[TGSI_NUM_CHANNELS];
89 };
90
91 enum tgsi_sampler_control
92 {
93 TGSI_SAMPLER_LOD_NONE,
94 TGSI_SAMPLER_LOD_BIAS,
95 TGSI_SAMPLER_LOD_EXPLICIT,
96 TGSI_SAMPLER_LOD_ZERO,
97 TGSI_SAMPLER_DERIVS_EXPLICIT,
98 TGSI_SAMPLER_GATHER,
99 };
100
101 struct tgsi_image_params {
102 unsigned unit;
103 unsigned tgsi_tex_instr;
104 enum pipe_format format;
105 unsigned execmask;
106 };
107
108 struct tgsi_image {
109 /* image interfaces */
110 void (*load)(const struct tgsi_image *image,
111 const struct tgsi_image_params *params,
112 const int s[TGSI_QUAD_SIZE],
113 const int t[TGSI_QUAD_SIZE],
114 const int r[TGSI_QUAD_SIZE],
115 const int sample[TGSI_QUAD_SIZE],
116 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
117
118 void (*store)(const struct tgsi_image *image,
119 const struct tgsi_image_params *params,
120 const int s[TGSI_QUAD_SIZE],
121 const int t[TGSI_QUAD_SIZE],
122 const int r[TGSI_QUAD_SIZE],
123 const int sample[TGSI_QUAD_SIZE],
124 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
125
126 void (*op)(const struct tgsi_image *image,
127 const struct tgsi_image_params *params,
128 unsigned opcode,
129 const int s[TGSI_QUAD_SIZE],
130 const int t[TGSI_QUAD_SIZE],
131 const int r[TGSI_QUAD_SIZE],
132 const int sample[TGSI_QUAD_SIZE],
133 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE],
134 float rgba2[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
135
136 void (*get_dims)(const struct tgsi_image *image,
137 const struct tgsi_image_params *params,
138 int dims[4]);
139 };
140
141 struct tgsi_buffer_params {
142 unsigned unit;
143 unsigned execmask;
144 unsigned writemask;
145 };
146
147 struct tgsi_buffer {
148 /* buffer interfaces */
149 void (*load)(const struct tgsi_buffer *buffer,
150 const struct tgsi_buffer_params *params,
151 const int s[TGSI_QUAD_SIZE],
152 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
153
154 void (*store)(const struct tgsi_buffer *buffer,
155 const struct tgsi_buffer_params *params,
156 const int s[TGSI_QUAD_SIZE],
157 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
158
159 void (*op)(const struct tgsi_buffer *buffer,
160 const struct tgsi_buffer_params *params,
161 unsigned opcode,
162 const int s[TGSI_QUAD_SIZE],
163 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE],
164 float rgba2[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
165
166 void (*get_dims)(const struct tgsi_buffer *buffer,
167 const struct tgsi_buffer_params *params,
168 int *dim);
169 };
170
171 /**
172 * Information for sampling textures, which must be implemented
173 * by code outside the TGSI executor.
174 */
175 struct tgsi_sampler
176 {
177 /** Get samples for four fragments in a quad */
178 /* this interface contains 5 sets of channels that vary
179 * depending on the sampler.
180 * s - the first texture coordinate for sampling.
181 * t - the second texture coordinate for sampling - unused for 1D,
182 layer for 1D arrays.
183 * r - the third coordinate for sampling for 3D, cube, cube arrays,
184 * layer for 2D arrays. Compare value for 1D/2D shadows.
185 * c0 - Compare value for shadow cube and shadow 2d arrays,
186 * layer for cube arrays.
187 * derivs - explicit derivatives.
188 * offset - texel offsets
189 * lod - lod value, except for shadow cube arrays (compare value there).
190 */
191 void (*get_samples)(struct tgsi_sampler *sampler,
192 const unsigned sview_index,
193 const unsigned sampler_index,
194 const float s[TGSI_QUAD_SIZE],
195 const float t[TGSI_QUAD_SIZE],
196 const float r[TGSI_QUAD_SIZE],
197 const float c0[TGSI_QUAD_SIZE],
198 const float c1[TGSI_QUAD_SIZE],
199 float derivs[3][2][TGSI_QUAD_SIZE],
200 const int8_t offset[3],
201 enum tgsi_sampler_control control,
202 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
203 void (*get_dims)(struct tgsi_sampler *sampler,
204 const unsigned sview_index,
205 int level, int dims[4]);
206 void (*get_texel)(struct tgsi_sampler *sampler,
207 const unsigned sview_index,
208 const int i[TGSI_QUAD_SIZE],
209 const int j[TGSI_QUAD_SIZE], const int k[TGSI_QUAD_SIZE],
210 const int lod[TGSI_QUAD_SIZE], const int8_t offset[3],
211 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
212 void (*query_lod)(const struct tgsi_sampler *tgsi_sampler,
213 const unsigned sview_index,
214 const unsigned sampler_index,
215 const float s[TGSI_QUAD_SIZE],
216 const float t[TGSI_QUAD_SIZE],
217 const float p[TGSI_QUAD_SIZE],
218 const float c0[TGSI_QUAD_SIZE],
219 const enum tgsi_sampler_control control,
220 float mipmap[TGSI_QUAD_SIZE],
221 float lod[TGSI_QUAD_SIZE]);
222 };
223
224 #define TGSI_EXEC_NUM_TEMPS 4096
225 #define TGSI_EXEC_NUM_IMMEDIATES 256
226
227 /*
228 * Locations of various utility registers (_I = Index, _C = Channel)
229 */
230 #define TGSI_EXEC_TEMP_00000000_I (TGSI_EXEC_NUM_TEMPS + 0)
231 #define TGSI_EXEC_TEMP_00000000_C 0
232
233 #define TGSI_EXEC_TEMP_7FFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
234 #define TGSI_EXEC_TEMP_7FFFFFFF_C 1
235
236 #define TGSI_EXEC_TEMP_80000000_I (TGSI_EXEC_NUM_TEMPS + 0)
237 #define TGSI_EXEC_TEMP_80000000_C 2
238
239 #define TGSI_EXEC_TEMP_FFFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
240 #define TGSI_EXEC_TEMP_FFFFFFFF_C 3
241
242 #define TGSI_EXEC_TEMP_ONE_I (TGSI_EXEC_NUM_TEMPS + 1)
243 #define TGSI_EXEC_TEMP_ONE_C 0
244
245 #define TGSI_EXEC_TEMP_TWO_I (TGSI_EXEC_NUM_TEMPS + 1)
246 #define TGSI_EXEC_TEMP_TWO_C 1
247
248 #define TGSI_EXEC_TEMP_128_I (TGSI_EXEC_NUM_TEMPS + 1)
249 #define TGSI_EXEC_TEMP_128_C 2
250
251 #define TGSI_EXEC_TEMP_MINUS_128_I (TGSI_EXEC_NUM_TEMPS + 1)
252 #define TGSI_EXEC_TEMP_MINUS_128_C 3
253
254 #define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 2)
255 #define TGSI_EXEC_TEMP_KILMASK_C 0
256
257 #define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 2)
258 #define TGSI_EXEC_TEMP_OUTPUT_C 1
259
260 #define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2)
261 #define TGSI_EXEC_TEMP_PRIMITIVE_C 2
262
263 #define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2)
264 #define TGSI_EXEC_TEMP_THREE_C 3
265
266 #define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3)
267 #define TGSI_EXEC_TEMP_HALF_C 0
268
269 /* 4 register buffer for various purposes */
270 #define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4)
271 #define TGSI_EXEC_NUM_TEMP_R 4
272
273 #define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8)
274 #define TGSI_EXEC_NUM_ADDRS 3
275
276 /* predicate register */
277 #define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 11)
278 #define TGSI_EXEC_NUM_PREDS 1
279
280 #define TGSI_EXEC_NUM_TEMP_EXTRAS 12
281
282
283
284 #define TGSI_EXEC_MAX_NESTING 32
285 #define TGSI_EXEC_MAX_COND_NESTING TGSI_EXEC_MAX_NESTING
286 #define TGSI_EXEC_MAX_LOOP_NESTING TGSI_EXEC_MAX_NESTING
287 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
288 #define TGSI_EXEC_MAX_CALL_NESTING TGSI_EXEC_MAX_NESTING
289
290 /* The maximum number of input attributes per vertex. For 2D
291 * input register files, this is the stride between two 1D
292 * arrays.
293 */
294 #define TGSI_EXEC_MAX_INPUT_ATTRIBS 32
295
296 /* The maximum number of bytes per constant buffer.
297 */
298 #define TGSI_EXEC_MAX_CONST_BUFFER_SIZE (4096 * sizeof(float[4]))
299
300 /* The maximum number of vertices per primitive */
301 #define TGSI_MAX_PRIM_VERTICES 6
302
303 /* The maximum number of primitives to be generated */
304 #define TGSI_MAX_PRIMITIVES 64
305
306 /* The maximum total number of vertices */
307 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
308
309 #define TGSI_MAX_MISC_INPUTS 8
310
311 /** function call/activation record */
312 struct tgsi_call_record
313 {
314 uint CondStackTop;
315 uint LoopStackTop;
316 uint ContStackTop;
317 int SwitchStackTop;
318 int BreakStackTop;
319 uint ReturnAddr;
320 };
321
322
323 /* Switch-case block state. */
324 struct tgsi_switch_record {
325 uint mask; /**< execution mask */
326 union tgsi_exec_channel selector; /**< a value case statements are compared to */
327 uint defaultMask; /**< non-execute mask for default case */
328 };
329
330
331 enum tgsi_break_type {
332 TGSI_EXEC_BREAK_INSIDE_LOOP,
333 TGSI_EXEC_BREAK_INSIDE_SWITCH
334 };
335
336
337 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
338
339
340 /**
341 * Run-time virtual machine state for executing TGSI shader.
342 */
343 struct tgsi_exec_machine
344 {
345 /* Total = program temporaries + internal temporaries
346 */
347 struct tgsi_exec_vector Temps[TGSI_EXEC_NUM_TEMPS +
348 TGSI_EXEC_NUM_TEMP_EXTRAS];
349
350 float Imms[TGSI_EXEC_NUM_IMMEDIATES][4];
351
352 float ImmArray[TGSI_EXEC_NUM_IMMEDIATES][4];
353
354 struct tgsi_exec_vector *Inputs;
355 struct tgsi_exec_vector *Outputs;
356
357 /* System values */
358 unsigned SysSemanticToIndex[TGSI_SEMANTIC_COUNT];
359 struct tgsi_exec_vector SystemValue[TGSI_MAX_MISC_INPUTS];
360
361 struct tgsi_exec_vector *Addrs;
362 struct tgsi_exec_vector *Predicates;
363
364 struct tgsi_sampler *Sampler;
365
366 struct tgsi_image *Image;
367 struct tgsi_buffer *Buffer;
368 unsigned ImmLimit;
369
370 const void *Consts[PIPE_MAX_CONSTANT_BUFFERS];
371 unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS];
372
373 const struct tgsi_token *Tokens; /**< Declarations, instructions */
374 enum pipe_shader_type ShaderType; /**< PIPE_SHADER_x */
375
376 /* GEOMETRY processor only. */
377 unsigned *Primitives;
378 unsigned NumOutputs;
379 unsigned MaxGeometryShaderOutputs;
380 unsigned MaxOutputVertices;
381
382 /* FRAGMENT processor only. */
383 const struct tgsi_interp_coef *InterpCoefs;
384 struct tgsi_exec_vector QuadPos;
385 float Face; /**< +1 if front facing, -1 if back facing */
386 bool flatshade_color;
387
388 /* Compute Only */
389 void *LocalMem;
390 unsigned LocalMemSize;
391
392 /* See GLSL 4.50 specification for definition of helper invocations */
393 uint NonHelperMask; /**< non-helpers */
394 /* Conditional execution masks */
395 uint CondMask; /**< For IF/ELSE/ENDIF */
396 uint LoopMask; /**< For BGNLOOP/ENDLOOP */
397 uint ContMask; /**< For loop CONT statements */
398 uint FuncMask; /**< For function calls */
399 uint ExecMask; /**< = CondMask & LoopMask */
400
401 /* Current switch-case state. */
402 struct tgsi_switch_record Switch;
403
404 /* Current break type. */
405 enum tgsi_break_type BreakType;
406
407 /** Condition mask stack (for nested conditionals) */
408 uint CondStack[TGSI_EXEC_MAX_COND_NESTING];
409 int CondStackTop;
410
411 /** Loop mask stack (for nested loops) */
412 uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING];
413 int LoopStackTop;
414
415 /** Loop label stack */
416 uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING];
417 int LoopLabelStackTop;
418
419 /** Loop continue mask stack (see comments in tgsi_exec.c) */
420 uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING];
421 int ContStackTop;
422
423 /** Switch case stack */
424 struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING];
425 int SwitchStackTop;
426
427 enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK];
428 int BreakStackTop;
429
430 /** Function execution mask stack (for executing subroutine code) */
431 uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING];
432 int FuncStackTop;
433
434 /** Function call stack for saving/restoring the program counter */
435 struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING];
436 int CallStackTop;
437
438 struct tgsi_full_instruction *Instructions;
439 uint NumInstructions;
440
441 struct tgsi_full_declaration *Declarations;
442 uint NumDeclarations;
443
444 struct tgsi_declaration_sampler_view
445 SamplerViews[PIPE_MAX_SHADER_SAMPLER_VIEWS];
446
447 boolean UsedGeometryShader;
448
449 int pc;
450 };
451
452 struct tgsi_exec_machine *
453 tgsi_exec_machine_create(enum pipe_shader_type shader_type);
454
455 void
456 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach);
457
458
459 void
460 tgsi_exec_machine_bind_shader(
461 struct tgsi_exec_machine *mach,
462 const struct tgsi_token *tokens,
463 struct tgsi_sampler *sampler,
464 struct tgsi_image *image,
465 struct tgsi_buffer *buffer);
466
467 uint
468 tgsi_exec_machine_run(
469 struct tgsi_exec_machine *mach, int start_pc );
470
471
472 void
473 tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach);
474
475
476 boolean
477 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst);
478
479
480 extern void
481 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach,
482 unsigned num_bufs,
483 const void **bufs,
484 const unsigned *buf_sizes);
485
486
487 static inline int
tgsi_exec_get_shader_param(enum pipe_shader_cap param)488 tgsi_exec_get_shader_param(enum pipe_shader_cap param)
489 {
490 switch(param) {
491 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
492 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
493 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
494 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
495 return INT_MAX;
496 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
497 return TGSI_EXEC_MAX_NESTING;
498 case PIPE_SHADER_CAP_MAX_INPUTS:
499 return TGSI_EXEC_MAX_INPUT_ATTRIBS;
500 case PIPE_SHADER_CAP_MAX_OUTPUTS:
501 return 32;
502 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
503 return TGSI_EXEC_MAX_CONST_BUFFER_SIZE;
504 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
505 return PIPE_MAX_CONSTANT_BUFFERS;
506 case PIPE_SHADER_CAP_MAX_TEMPS:
507 return TGSI_EXEC_NUM_TEMPS;
508 case PIPE_SHADER_CAP_MAX_PREDS:
509 return TGSI_EXEC_NUM_PREDS;
510 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
511 return 1;
512 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
513 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
514 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
515 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
516 return 1;
517 case PIPE_SHADER_CAP_SUBROUTINES:
518 return 1;
519 case PIPE_SHADER_CAP_INTEGERS:
520 return 1;
521 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
522 return PIPE_MAX_SAMPLERS;
523 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
524 return PIPE_MAX_SHADER_SAMPLER_VIEWS;
525 case PIPE_SHADER_CAP_PREFERRED_IR:
526 return PIPE_SHADER_IR_TGSI;
527 case PIPE_SHADER_CAP_SUPPORTED_IRS:
528 return 1 << PIPE_SHADER_IR_TGSI;
529 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
530 return 1;
531 case PIPE_SHADER_CAP_DOUBLES:
532 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
533 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
534 return 1;
535 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
536 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
537 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
538 return 0;
539 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
540 return PIPE_MAX_SHADER_BUFFERS;
541 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
542 return PIPE_MAX_SHADER_IMAGES;
543
544 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
545 return 32;
546 }
547 /* if we get here, we missed a shader cap above (and should have seen
548 * a compiler warning.)
549 */
550 return 0;
551 }
552
553 #if defined __cplusplus
554 } /* extern "C" */
555 #endif
556
557 #endif /* TGSI_EXEC_H */
558