| /external/llvm/lib/Target/AMDGPU/ |
| D | SILoadStoreOptimizer.cpp | 131 unsigned Offset1, in offsetsCanBeCombined()
182 unsigned Offset1 = MBBI->getOperand(OffsetIdx).getImm() & 0xffff; in findMatchingDSInst() local
207 unsigned Offset1 in mergeRead2Pair() local
303 unsigned Offset1 in mergeWrite2Pair() local
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| D | AMDGPUInstrInfo.cpp | 51 int64_t Offset0, int64_t Offset1, in shouldScheduleLoadsNear()
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| D | SIInstrInfo.cpp | 232 uint8_t Offset1 = Offset1Imm->getImm(); in getMemOpBaseRegImmOfs() local
1344 int64_t Offset0, Offset1; in checkInstOffsetsDoNotOverlap() local
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| /external/llvm/lib/Fuzzer/test/ |
| D | CustomCrossOverTest.cpp | 43 size_t Offset1 = 0; in LLVMFuzzerCustomCrossOver() local
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetInstrInfo.h | 492 int64_t &Offset1, int64_t &Offset2) const { in areLoadsFromSameBasePtr()
505 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 1001 int64_t &Offset1, int64_t &Offset2) const { in areLoadsFromSameBasePtr()
1014 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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| /external/swiftshader/third_party/LLVM/lib/Transforms/IPO/ |
| D | MergeFunctions.cpp | 352 uint64_t Offset1 = TD->getIndexedOffset(GEP1->getPointerOperandType(), in isEquivalentGEP() local
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| /external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/ |
| D | MemCpyOptimizer.cpp | 109 int64_t Offset1 = GetOffsetFromIndex(GEP1, Idx, VariableIdxFound, TD); in IsPointerOffset() local
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGSDNodes.cpp | 191 int64_t Offset1, Offset2; in ClusterNeighboringLoads() local
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| D | DAGCombiner.cpp | 7798 int64_t Offset1, Offset2; in isAlias() local
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| D | SelectionDAG.cpp | 6513 int64_t Offset1 = 0; in isConsecutiveLoad() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGSDNodes.cpp | 225 int64_t Offset1, Offset2; in ClusterNeighboringLoads() local
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| D | DAGCombiner.cpp | 9848 APInt Offset1 = cast<ConstantSDNode>(Offset)->getAPIntValue(); in CombineToPreIndexedLoadStore() local
14765 int64_t Offset1, Offset2; in isAlias() local
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| D | SelectionDAG.cpp | 7008 int64_t Offset1 = 0; in areNonVolatileConsecutiveLoads() local
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| /external/llvm/lib/Transforms/Scalar/ |
| D | SeparateConstOffsetFromGEP.cpp | 1246 Value *Offset1 = First->getOperand(1); in swapGEPOperand() local
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| D | MemCpyOptimizer.cpp | 114 int64_t Offset1 = GetOffsetFromIndex(GEP1, Idx, VariableIdxFound, DL); in IsPointerOffset() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 1254 int64_t &Offset1, in areLoadsFromSameBasePtr()
1329 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 3133 int64_t &Offset1, int64_t &Offset2) const { in areLoadsFromSameBasePtr()
3238 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 1546 int64_t &Offset1, in areLoadsFromSameBasePtr()
1627 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 6611 int64_t &Offset1, int64_t &Offset2) const { in areLoadsFromSameBasePtr()
6716 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 1781 int64_t Offset1 = FirstLdSt.getOperand(2).getImm(); in shouldClusterMemOps() local
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| /external/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 1025 int64_t Offset1, Offset2; in addLoopCarriedDependences() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 9552 int64_t Offset1 = 0, Offset2 = 0; in isConsecutiveLSLoc() local
|