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1 /*
2  * Copyright (C) 2009 Nicolai Haehnle.
3  *
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining
7  * a copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sublicense, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial
16  * portions of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25  *
26  */
27 
28 #ifndef RADEON_PROGRAM_CONSTANTS_H
29 #define RADEON_PROGRAM_CONSTANTS_H
30 
31 typedef enum {
32 	RC_SATURATE_NONE = 0,
33 	RC_SATURATE_ZERO_ONE,
34 	RC_SATURATE_MINUS_PLUS_ONE
35 } rc_saturate_mode;
36 
37 typedef enum {
38 	RC_TEXTURE_2D_ARRAY,
39 	RC_TEXTURE_1D_ARRAY,
40 	RC_TEXTURE_CUBE,
41 	RC_TEXTURE_3D,
42 	RC_TEXTURE_RECT,
43 	RC_TEXTURE_2D,
44 	RC_TEXTURE_1D
45 } rc_texture_target;
46 
47 typedef enum {
48 	/**
49 	 * Used to indicate unused register descriptions and
50 	 * source register that use a constant swizzle.
51 	 */
52 	RC_FILE_NONE = 0,
53 	RC_FILE_TEMPORARY,
54 
55 	/**
56 	 * Input register.
57 	 *
58 	 * \note The compiler attaches no implicit semantics to input registers.
59 	 * Fragment/vertex program specific semantics must be defined explicitly
60 	 * using the appropriate compiler interfaces.
61 	 */
62 	RC_FILE_INPUT,
63 
64 	/**
65 	 * Output register.
66 	 *
67 	 * \note The compiler attaches no implicit semantics to input registers.
68 	 * Fragment/vertex program specific semantics must be defined explicitly
69 	 * using the appropriate compiler interfaces.
70 	 */
71 	RC_FILE_OUTPUT,
72 	RC_FILE_ADDRESS,
73 
74 	/**
75 	 * Indicates a constant from the \ref rc_constant_list .
76 	 */
77 	RC_FILE_CONSTANT,
78 
79 	/**
80 	 * Indicates a special register, see RC_SPECIAL_xxx.
81 	 */
82 	RC_FILE_SPECIAL,
83 
84 	/**
85 	 * Indicates this register should use the result of the presubtract
86 	 * operation.
87 	 */
88 	RC_FILE_PRESUB,
89 
90 	/**
91 	 * Indicates that the source index has been encoded as a 7-bit float.
92 	 */
93 	RC_FILE_INLINE
94 } rc_register_file;
95 
96 enum {
97 	/** R500 fragment program ALU result "register" */
98 	RC_SPECIAL_ALU_RESULT = 0,
99 
100 	/** Must be last */
101 	RC_NUM_SPECIAL_REGISTERS
102 };
103 
104 #define RC_REGISTER_INDEX_BITS 10
105 #define RC_REGISTER_MAX_INDEX (1 << RC_REGISTER_INDEX_BITS)
106 
107 typedef enum {
108 	RC_SWIZZLE_X = 0,
109 	RC_SWIZZLE_Y,
110 	RC_SWIZZLE_Z,
111 	RC_SWIZZLE_W,
112 	RC_SWIZZLE_ZERO,
113 	RC_SWIZZLE_ONE,
114 	RC_SWIZZLE_HALF,
115 	RC_SWIZZLE_UNUSED
116 } rc_swizzle;
117 
118 #define RC_MAKE_SWIZZLE(a,b,c,d) (((a)<<0) | ((b)<<3) | ((c)<<6) | ((d)<<9))
119 #define RC_MAKE_SWIZZLE_SMEAR(a) RC_MAKE_SWIZZLE((a),(a),(a),(a))
120 #define GET_SWZ(swz, idx)      (((swz) >> ((idx)*3)) & 0x7)
121 #define GET_BIT(msk, idx)      (((msk) >> (idx)) & 0x1)
122 #define SET_SWZ(swz, idx, newv) \
123 	do { \
124 		(swz) = ((swz) & ~(7 << ((idx)*3))) | ((newv) << ((idx)*3)); \
125 	} while(0)
126 
127 #define RC_SWIZZLE_XYZW RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_W)
128 #define RC_SWIZZLE_XYZ0 RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_ZERO)
129 #define RC_SWIZZLE_XYZ1 RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_ONE)
130 #define RC_SWIZZLE_XYZZ RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_Z)
131 #define RC_SWIZZLE_XXXX RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_X)
132 #define RC_SWIZZLE_YYYY RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_Y)
133 #define RC_SWIZZLE_ZZZZ RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_Z)
134 #define RC_SWIZZLE_WWWW RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_W)
135 #define RC_SWIZZLE_0000 RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_ZERO)
136 #define RC_SWIZZLE_1111 RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_ONE)
137 #define RC_SWIZZLE_HHHH RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_HALF)
138 #define RC_SWIZZLE_UUUU RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_UNUSED)
139 
140 /**
141  * \name Bitmasks for components of vectors.
142  *
143  * Used for write masks, negation masks, etc.
144  */
145 /*@{*/
146 #define RC_MASK_NONE 0
147 #define RC_MASK_X 1
148 #define RC_MASK_Y 2
149 #define RC_MASK_Z 4
150 #define RC_MASK_W 8
151 #define RC_MASK_XY (RC_MASK_X|RC_MASK_Y)
152 #define RC_MASK_XYZ (RC_MASK_X|RC_MASK_Y|RC_MASK_Z)
153 #define RC_MASK_XYW (RC_MASK_X|RC_MASK_Y|RC_MASK_W)
154 #define RC_MASK_XYZW (RC_MASK_X|RC_MASK_Y|RC_MASK_Z|RC_MASK_W)
155 /*@}*/
156 
157 typedef enum {
158 	RC_ALURESULT_NONE = 0,
159 	RC_ALURESULT_X,
160 	RC_ALURESULT_W
161 } rc_write_aluresult;
162 
163 typedef enum {
164 	RC_PRESUB_NONE = 0,
165 
166 	/** 1 - 2 * src0 */
167 	RC_PRESUB_BIAS,
168 
169 	/** src1 - src0 */
170 	RC_PRESUB_SUB,
171 
172 	/** src1 + src0 */
173 	RC_PRESUB_ADD,
174 
175 	/** 1 - src0 */
176 	RC_PRESUB_INV
177 } rc_presubtract_op;
178 
179 typedef enum {
180 	RC_OMOD_MUL_1,
181 	RC_OMOD_MUL_2,
182 	RC_OMOD_MUL_4,
183 	RC_OMOD_MUL_8,
184 	RC_OMOD_DIV_2,
185 	RC_OMOD_DIV_4,
186 	RC_OMOD_DIV_8,
187 	RC_OMOD_DISABLE
188 } rc_omod_op;
189 
rc_presubtract_src_reg_count(rc_presubtract_op op)190 static inline int rc_presubtract_src_reg_count(rc_presubtract_op op){
191 	switch(op){
192 	case RC_PRESUB_BIAS:
193 	case RC_PRESUB_INV:
194 		return 1;
195 	case RC_PRESUB_ADD:
196 	case RC_PRESUB_SUB:
197 		return 2;
198 	default:
199 		return 0;
200 	}
201 }
202 
203 #define RC_SOURCE_NONE  0x0
204 #define RC_SOURCE_RGB   0x1
205 #define RC_SOURCE_ALPHA 0x2
206 
207 typedef enum {
208 	RC_PRED_DISABLED,
209 	RC_PRED_SET,
210 	RC_PRED_INV
211 } rc_predicate_mode;
212 
213 #endif /* RADEON_PROGRAM_CONSTANTS_H */
214