| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 34 static inline bool isARMArea1Register(unsigned Reg, bool isIOS) { in isARMArea1Register()
49 static inline bool isARMArea2Register(unsigned Reg, bool isIOS) { in isARMArea2Register()
60 static inline bool isARMArea3Register(unsigned Reg, bool isIOS) { in isARMArea3Register()
77 static inline bool isCalleeSavedRegister(unsigned Reg, in isCalleeSavedRegister()
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| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCTargetDesc.h | 62 inline unsigned getRegAsGR64(unsigned Reg) { in getRegAsGR64()
67 inline unsigned getRegAsGR32(unsigned Reg) { in getRegAsGR32()
72 inline unsigned getRegAsGRH32(unsigned Reg) { in getRegAsGRH32()
77 inline unsigned getRegAsVR128(unsigned Reg) { in getRegAsVR128()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 252 inline iterator_range<reg_iterator> reg_operands(unsigned Reg) const { in reg_operands()
268 reg_instructions(unsigned Reg) const { in reg_instructions()
283 inline iterator_range<reg_bundle_iterator> reg_bundles(unsigned Reg) const { in reg_bundles()
303 reg_nodbg_operands(unsigned Reg) const { in reg_nodbg_operands()
320 reg_nodbg_instructions(unsigned Reg) const { in reg_nodbg_instructions()
337 reg_nodbg_bundles(unsigned Reg) const { in reg_nodbg_bundles()
355 inline iterator_range<def_iterator> def_operands(unsigned Reg) const { in def_operands()
371 def_instructions(unsigned Reg) const { in def_instructions()
386 inline iterator_range<def_bundle_iterator> def_bundles(unsigned Reg) const { in def_bundles()
411 inline iterator_range<use_iterator> use_operands(unsigned Reg) const { in use_operands()
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| D | LivePhysRegs.h | 74 void addReg(unsigned Reg) { in addReg()
84 void removeReg(unsigned Reg) { in removeReg()
100 bool contains(unsigned Reg) const { return LiveRegs.count(Reg); } in contains()
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| /external/llvm/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 60 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup()
73 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
95 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) in LeaveGroup()
106 bool AggressiveAntiDepState::IsLive(unsigned Reg) in IsLive()
154 unsigned Reg = *AI; in StartBlock() local
167 unsigned Reg = *I; in StartBlock() local
197 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
222 unsigned Reg = MO.getReg(); in IsImplicitDefUse() local
242 const unsigned Reg = MO.getReg(); in GetPassthruRegs() local
288 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse()
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| D | MachineCopyPropagation.cpp | 88 for (unsigned Reg : Regs) { in removeRegsFromMap() local
104 unsigned Reg = I->first; in removeClobberedRegsFromMap() local
110 void MachineCopyPropagation::ClobberRegister(unsigned Reg) { in ClobberRegister()
262 unsigned Reg = MO.getReg(); in CopyPropagateBlock() local
302 unsigned Reg = MaybeDead->getOperand(0).getReg(); in CopyPropagateBlock() local
334 for (unsigned Reg : Defs) in CopyPropagateBlock() local
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| D | LiveVariables.cpp | 182 void LiveVariables::HandleVirtRegDef(unsigned Reg, MachineInstr &MI) { in HandleVirtRegDef()
192 MachineInstr *LiveVariables::FindLastPartialDef(unsigned Reg, in FindLastPartialDef()
231 void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr &MI) { in HandlePhysRegUse()
281 MachineInstr *LiveVariables::FindLastRefOrPartRef(unsigned Reg) { in FindLastRefOrPartRef()
311 bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) { in HandlePhysRegKill()
426 for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) { in HandleRegMask() local
443 void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI, in HandlePhysRegDef()
489 unsigned Reg = Defs.back(); in UpdatePhysRegDefs() local
658 const unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in runOnMachineFunction() local
683 void LiveVariables::replaceKillInstruction(unsigned Reg, MachineInstr &OldMI, in replaceKillInstruction()
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| D | LivePhysRegs.cpp | 51 unsigned Reg = O->getReg(); in stepBackward() local
63 unsigned Reg = O->getReg(); in stepBackward() local
79 unsigned Reg = O->getReg(); in stepForward() local
97 for (auto Reg : Clobbers) { in stepForward() local
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 61 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup()
74 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
96 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) in LeaveGroup()
107 bool AggressiveAntiDepState::IsLive(unsigned Reg) in IsLive()
190 unsigned Reg = *I; in StartBlock() local
220 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
246 unsigned Reg = MO.getReg(); in IsImplicitDefUse() local
266 const unsigned Reg = MO.getReg(); in GetPassthruRegs() local
283 unsigned Reg = P->getReg(); in AntiDepEdges() local
317 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse()
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| D | DeadMachineInstructionElim.cpp | 72 unsigned Reg = MO.getReg(); in isDead() local
108 unsigned Reg = *LOI; in runOnMachineFunction() local
138 unsigned Reg = MO.getReg(); in runOnMachineFunction() local
166 unsigned Reg = MO.getReg(); in runOnMachineFunction() local
183 unsigned Reg = MO.getReg(); in runOnMachineFunction() local
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| D | CriticalAntiDepBreaker.cpp | 64 unsigned Reg = *I; in StartBlock() local
86 unsigned Reg = *I; in StartBlock() local
106 unsigned Reg = *I; in StartBlock() local
133 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
205 unsigned Reg = MO.getReg(); in PrescanInstruction() local
257 unsigned Reg = MO.getReg(); in ScanInstruction() local
292 unsigned Reg = MO.getReg(); in ScanInstruction() local
446 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies() local
586 unsigned Reg = MO.getReg(); in BreakAntiDependencies() local
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| D | ProcessImplicitDefs.cpp | 49 unsigned Reg, unsigned OpIdx, in CanTurnIntoImplicitDef()
62 static bool isUndefCopy(MachineInstr *MI, unsigned Reg, in isUndefCopy()
110 unsigned Reg = MI->getOperand(0).getReg(); in runOnMachineFunction() local
128 unsigned Reg = MI->getOperand(0).getReg(); in runOnMachineFunction() local
145 unsigned Reg = MO.getReg(); in runOnMachineFunction() local
201 unsigned Reg = MI->getOperand(0).getReg(); in runOnMachineFunction() local
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 211 const TargetRegisterClass *getRegClass(unsigned Reg) const { in getRegClass()
251 void setRegAllocationHint(unsigned Reg, unsigned Type, unsigned PrefReg) { in setRegAllocationHint()
259 getRegAllocationHint(unsigned Reg) const { in getRegAllocationHint()
265 unsigned getSimpleHint(unsigned Reg) const { in getSimpleHint()
277 bool isPhysRegUsed(unsigned Reg) const { return UsedPhysRegs[Reg]; } in isPhysRegUsed()
281 void setPhysRegUsed(unsigned Reg) { UsedPhysRegs[Reg] = true; } in setPhysRegUsed()
289 void setPhysRegUnused(unsigned Reg) { UsedPhysRegs[Reg] = false; } in setPhysRegUnused()
304 void addLiveOut(unsigned Reg) { LiveOuts.push_back(Reg); } in addLiveOut()
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/MCTargetDesc/ |
| D | MBlazeBaseInfo.h | 81 static inline bool isMBlazeRegister(unsigned Reg) { in isMBlazeRegister()
85 static inline bool isSpecialMBlazeRegister(unsigned Reg) { in isSpecialMBlazeRegister()
168 static inline unsigned getMBlazeRegisterFromNumbering(unsigned Reg) { in getMBlazeRegisterFromNumbering()
207 static inline unsigned getSpecialMBlazeRegisterFromNumbering(unsigned Reg) { in getSpecialMBlazeRegisterFromNumbering()
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| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXMachineFunctionInfo.h | 82 void addRetReg(unsigned Reg) { in addRetReg()
93 void addArgReg(unsigned Reg) { in addArgReg()
103 void addVirtualRegister(const TargetRegisterClass *TRC, unsigned Reg) { in addVirtualRegister()
131 const char *getRegisterName(unsigned Reg) const { in getRegisterName()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 38 static inline bool isARMArea1Register(unsigned Reg, bool isDarwin) { in isARMArea1Register()
53 static inline bool isARMArea2Register(unsigned Reg, bool isDarwin) { in isARMArea2Register()
64 static inline bool isARMArea3Register(unsigned Reg, bool isDarwin) { in isARMArea3Register()
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsRegisterInfo.cpp | 205 for (const unsigned *Reg = ReservedCPURegs; *Reg; ++Reg) in getReservedRegs() local
209 for (const unsigned *Reg = ReservedCPU64Regs; *Reg; ++Reg) in getReservedRegs() local
213 for (RegIter Reg = Mips::AFGR64RegisterClass->begin(); in getReservedRegs() local
219 for (RegIter Reg = Mips::CPU64RegsRegisterClass->begin(); in getReservedRegs() local
223 for (RegIter Reg = Mips::FGR64RegisterClass->begin(); in getReservedRegs() local
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyMachineFunctionInfo.h | 58 void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; } in setVarargBufferVreg()
79 unsigned getWAReg(unsigned Reg) const { in getWAReg()
85 static unsigned getWARegStackId(unsigned Reg) { in getWARegStackId()
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1143 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo); in DecodeGPR64RegisterClass() local
1154 unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo); in DecodeGPRMM16RegisterClass() local
1165 unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo); in DecodeGPRMM16ZeroRegisterClass() local
1176 unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo); in DecodeGPRMM16MovePRegisterClass() local
1187 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo); in DecodeGPR32RegisterClass() local
1216 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo); in DecodeFGR64RegisterClass() local
1228 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo); in DecodeFGR32RegisterClass() local
1239 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo); in DecodeCCRRegisterClass() local
1250 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo); in DecodeFCCRegisterClass() local
1261 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo); in DecodeFGRCCRegisterClass() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonAsmPrinter.cpp | 70 inline static unsigned getHexagonRegisterPair(unsigned Reg, in getHexagonRegisterPair()
266 MCOperand Reg = Inst.getOperand(0); in HexagonProcessInstruction() local
288 MCOperand &Reg = MappedInst.getOperand(0); in HexagonProcessInstruction() local
307 MCOperand &Reg = MappedInst.getOperand(0); in HexagonProcessInstruction() local
332 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() local
343 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() local
355 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() local
367 unsigned Reg = RI->getEncodingValue(Rs.getReg()); in HexagonProcessInstruction() local
556 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsOptimizePICCall.cpp | 118 static MVT::SimpleValueType getRegTy(unsigned Reg, MachineFunction &MF) { in getRegTy()
148 unsigned Reg = Ty == MVT::i32 ? Mips::GP : Mips::GP_64; in eraseGPOpnd() local
214 unsigned Reg; in visitNode() local
246 bool OptimizePICCall::isCallViaRegister(MachineInstr &MI, unsigned &Reg, in isCallViaRegister()
288 unsigned Reg = ScopedHT.lookup(Entry).second; in getReg() local
293 void OptimizePICCall::incCntAndSetReg(ValueType Entry, unsigned Reg) { in incCntAndSetReg()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 81 bool contains(unsigned Reg) const { in contains()
253 static bool isStackSlot(unsigned Reg) { in isStackSlot()
259 static int stackSlot2Index(unsigned Reg) { in stackSlot2Index()
273 static bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister()
280 static bool isVirtualRegister(unsigned Reg) { in isVirtualRegister()
287 static unsigned virtReg2Index(unsigned Reg) { in virtReg2Index()
382 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg()
520 virtual unsigned ResolveRegAllocHint(unsigned Type, unsigned Reg, in ResolveRegAllocHint()
541 virtual void UpdateRegAllocHint(unsigned Reg, unsigned NewReg, in UpdateRegAllocHint()
578 virtual bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg, in hasReservedSpillSlot()
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| /external/clang/lib/StaticAnalyzer/Core/ |
| D | DynamicTypeMap.cpp | 22 const MemRegion *Reg) { in getDynamicTypeInfo()
42 ProgramStateRef setDynamicTypeInfo(ProgramStateRef State, const MemRegion *Reg, in setDynamicTypeInfo()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZFrameLowering.cpp | 106 unsigned Reg = CSRegs[I]; in determineCalleeSaves() local
150 unsigned Reg = CSI[I].getReg(); in spillCalleeSavedRegisters() local
171 unsigned Reg = SystemZ::ArgGPRs[FirstGPR]; in spillCalleeSavedRegisters() local
196 unsigned Reg = CSI[I].getReg(); in spillCalleeSavedRegisters() local
209 unsigned Reg = CSI[I].getReg(); in spillCalleeSavedRegisters() local
236 unsigned Reg = CSI[I].getReg(); in restoreCalleeSavedRegisters() local
266 unsigned Reg = CSI[I].getReg(); in restoreCalleeSavedRegisters() local
296 unsigned Reg, int64_t NumBytes, in emitIncrement()
350 unsigned Reg = Save.getReg(); in emitPrologue() local
410 unsigned Reg = Save.getReg(); in emitPrologue() local
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| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcMachineFunctionInfo.h | 37 void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; } in setGlobalBaseReg()
43 void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; } in setSRetReturnReg()
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