| /external/vulkan-validation-layers/libs/glm/detail/ |
| D | intrinsic_integer.inl | 41 __m128i Reg2; local
95 __m128i Reg2; local
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| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZInstrBuilder.h | 84 unsigned Reg1, bool isKill1, unsigned Reg2, bool isKill2) { in addRegReg()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrBuilder.h | 117 unsigned Reg2, bool isKill2) { in addRegReg()
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| D | X86FastISel.cpp | 1453 unsigned Reg2 = getRegForValue(Op2); in X86VisitIntrinsicCall() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsAsmPrinter.cpp | 770 unsigned Reg2) { in EmitInstrRegReg()
790 unsigned Reg2, unsigned Reg3) { in EmitInstrRegRegReg()
801 unsigned Reg2, unsigned FPReg1, in EmitMovFPIntPair()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 145 unsigned Reg2, bool isKill2) { in addRegReg()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64FrameLowering.cpp | 876 unsigned Reg2; member
975 unsigned Reg2 = RPI.Reg2; in spillCalleeSavedRegisters() local
1038 unsigned Reg2 = RPI.Reg2; in restoreCalleeSavedRegisters() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXFMAMutate.cpp | 189 unsigned Reg2 = MI->getOperand(2).getReg(); in processBlock() local
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| D | PPCVSXSwapRemoval.cpp | 867 unsigned Reg2 = MI->getOperand(2).getReg(); in handleSpecialSwappables() local
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb2SizeReduction.cpp | 710 unsigned Reg2 = MI->getOperand(2).getReg(); in ReduceTo2Addr() local
745 unsigned Reg2 = MI->getOperand(2).getReg(); in ReduceTo2Addr() local
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| D | A15SDOptimizer.cpp | 461 const DebugLoc &DL, unsigned Reg1, unsigned Reg2) { in createRegSequence()
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| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCRegisterInfo.h | 85 bool contains(unsigned Reg1, unsigned Reg2) const { in contains()
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| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 620 CodeGenRegister *Reg2 = i1->second; in computeComposites() local
714 CodeGenRegister *Reg2 = getReg(RegList[i2]); in computeOverlaps() local
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| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64AsmBackend.cpp | 454 unsigned Reg2 = MRI.getLLVMRegNum(Inst2.getRegister(), true); in generateCompactUnwindEncoding() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 119 unsigned Reg2 = MI->getOperand(2).getReg(); in commuteInstruction() local
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | TargetInstrInfoImpl.cpp | 79 unsigned Reg2 = MI->getOperand(Idx2).getReg(); in commuteInstruction() local
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| D | StrongPHIElimination.cpp | 441 void StrongPHIElimination::unionRegs(unsigned Reg1, unsigned Reg2) { in unionRegs()
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| D | AggressiveAntiDepBreaker.cpp | 80 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) in UnionGroups()
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| /external/llvm/lib/Target/Hexagon/AsmParser/ |
| D | HexagonAsmParser.cpp | 1607 StringRef Reg2(R2); in processInstruction() local
1622 StringRef Reg2(R2); in processInstruction() local
1638 StringRef Reg2(R2); in processInstruction() local
1978 StringRef Reg2(R2); in processInstruction() local
2132 StringRef Reg2(R2); in processInstruction() local
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 86 bool contains(unsigned Reg1, unsigned Reg2) const { in contains()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | Thumb2SizeReduction.cpp | 607 unsigned Reg2 = MI->getOperand(2).getReg(); in ReduceTo2Addr() local
|
| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 76 bool contains(unsigned Reg1, unsigned Reg2) const { in contains()
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| /external/llvm/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 79 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) in UnionGroups()
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 102 bool contains(unsigned Reg1, unsigned Reg2) const { in contains()
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 1795 unsigned Reg2 = State.AllocateReg(IntRegs, IntRegsSize); in CC_MipsO32() local
2317 unsigned Reg2 = AddLiveIn(DAG.getMachineFunction(), in LowerFormalArguments() local
|