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Searched defs:Ror (Results 1 – 14 of 14) sorted by relevance

/external/v8/src/arm64/
Dmacro-assembler-arm64-inl.h1043 void MacroAssembler::Ror(const Register& rd, in Ror() function
1052 void MacroAssembler::Ror(const Register& rd, in Ror() function
/external/swiftshader/third_party/subzero/src/DartARM32/
Dassembler_arm.cc2662 void Assembler::Ror(Register rd, Register rm, const Operand& shift_imm, in Ror() function in dart::Assembler
2670 void Assembler::Ror(Register rd, Register rm, Register rs, Condition cond) { in Ror() function in dart::Assembler
/external/vixl/test/aarch64/
Dtest-assembler-aarch64.cc9458 __ Ror(x16, x0, x1); in TEST() local
9459 __ Ror(x17, x0, x2); in TEST() local
9460 __ Ror(x18, x0, x3); in TEST() local
9461 __ Ror(x19, x0, x4); in TEST() local
9462 __ Ror(x20, x0, x5); in TEST() local
9463 __ Ror(x21, x0, x6); in TEST() local
9465 __ Ror(w22, w0, w1); in TEST() local
9466 __ Ror(w23, w0, w2); in TEST() local
9467 __ Ror(w24, w0, w3); in TEST() local
9468 __ Ror(w25, w0, w4); in TEST() local
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/external/v8/src/crankshaft/arm64/
Dlithium-codegen-arm64.cc4488 case Token::ROR: __ Ror(result, left, right); break; in DoShiftI() local
4511 case Token::ROR: __ Ror(result, left, shift_count); break; in DoShiftI() local
4542 __ Ror(result.W(), temp.W(), result.W()); in DoShiftS() local
4576 __ Ror(result.W(), result.W(), shift_count); in DoShiftS() local
/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.h1727 void Ror(const Register& rd, const Register& rs, unsigned shift) { in Ror() function
1734 void Ror(const Register& rd, const Register& rn, const Register& rm) { in Ror() function
/external/v8/src/compiler/mips/
Dcode-generator-mips.cc1052 __ Ror(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction() local
/external/vixl/test/aarch32/
Dtest-assembler-aarch32.cc753 __ Ror(r6, r1, 20); in TEST() local
785 __ Ror(r6, r1, r9); in TEST() local
/external/v8/src/compiler/mips64/
Dcode-generator-mips64.cc1283 __ Ror(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction() local
/external/v8/src/crankshaft/mips/
Dlithium-codegen-mips.cc1497 __ Ror(result, left, Operand(ToRegister(right_op))); in DoShiftI() local
1523 __ Ror(result, left, Operand(shift_count)); in DoShiftI() local
/external/v8/src/crankshaft/mips64/
Dlithium-codegen-mips64.cc1593 __ Ror(result, left, Operand(ToRegister(right_op))); in DoShiftI() local
1622 __ Ror(result, left, Operand(shift_count)); in DoShiftI() local
/external/vixl/src/aarch32/
Dmacro-assembler-aarch32.h3165 void Ror(Condition cond, Register rd, Register rm, const Operand& operand) { in Ror() function
3179 void Ror(Register rd, Register rm, const Operand& operand) { in Ror() function
3182 void Ror(FlagsUpdate flags, in Ror() function
3206 void Ror(FlagsUpdate flags, in Ror() function
/external/v8/src/mips/
Dmacro-assembler-mips.cc984 void MacroAssembler::Ror(Register rd, Register rs, const Operand& rt) { in Ror() function in v8::internal::MacroAssembler
/external/v8/src/mips64/
Dmacro-assembler-mips64.cc1118 void MacroAssembler::Ror(Register rd, Register rs, const Operand& rt) { in Ror() function in v8::internal::MacroAssembler
/external/v8/src/crankshaft/
Dhydrogen-instructions.h4553 DECLARE_CONCRETE_INSTRUCTION(Ror) in DECLARE_CONCRETE_INSTRUCTION() argument