1 /************************************************************************** 2 * 3 * Copyright 2003 VMware, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 #define CMD_MI (0x0 << 29) 29 #define CMD_2D (0x2 << 29) 30 #define CMD_3D (0x3 << 29) 31 32 #define MI_NOOP (CMD_MI | 0) 33 34 #define MI_BATCH_BUFFER_END (CMD_MI | 0xA << 23) 35 36 #define MI_FLUSH (CMD_MI | (4 << 23)) 37 #define FLUSH_MAP_CACHE (1 << 0) 38 #define INHIBIT_FLUSH_RENDER_CACHE (1 << 2) 39 40 #define MI_LOAD_REGISTER_IMM (CMD_MI | (0x22 << 23)) 41 42 #define MI_FLUSH_DW (CMD_MI | (0x26 << 23) | 2) 43 44 /* Stalls command execution waiting for the given events to have occurred. */ 45 #define MI_WAIT_FOR_EVENT (CMD_MI | (0x3 << 23)) 46 #define MI_WAIT_FOR_PLANE_B_FLIP (1<<6) 47 #define MI_WAIT_FOR_PLANE_A_FLIP (1<<2) 48 49 #define MI_STORE_REGISTER_MEM (CMD_MI | (0x24 << 23)) 50 # define MI_STORE_REGISTER_MEM_USE_GGTT (1 << 22) 51 52 /* p189 */ 53 #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D | (0x1d<<24) | (0x04<<16)) 54 #define I1_LOAD_S(n) (1<<(4+n)) 55 56 #define _3DSTATE_DRAWRECT_INFO (CMD_3D | (0x1d<<24) | (0x80<<16) | 0x3) 57 58 /** @} */ 59 60 /** @{ 61 * 915 definitions 62 * 63 * 915 documents say that bits 31:28 and 1 are "undefined, must be zero." 64 */ 65 #define S0_VB_OFFSET_MASK 0x0ffffffc 66 #define S0_AUTO_CACHE_INV_DISABLE (1<<0) 67 /** @} */ 68 69 /** @{ 70 * 830 definitions 71 */ 72 #define S0_VB_OFFSET_MASK_830 0xffffff80 73 #define S0_VB_PITCH_SHIFT_830 1 74 #define S0_VB_ENABLE_830 (1<<0) 75 /** @} */ 76 77 #define S1_VERTEX_WIDTH_SHIFT 24 78 #define S1_VERTEX_WIDTH_MASK (0x3f<<24) 79 #define S1_VERTEX_PITCH_SHIFT 16 80 #define S1_VERTEX_PITCH_MASK (0x3f<<16) 81 82 #define TEXCOORDFMT_2D 0x0 83 #define TEXCOORDFMT_3D 0x1 84 #define TEXCOORDFMT_4D 0x2 85 #define TEXCOORDFMT_1D 0x3 86 #define TEXCOORDFMT_2D_16 0x4 87 #define TEXCOORDFMT_4D_16 0x5 88 #define TEXCOORDFMT_NOT_PRESENT 0xf 89 #define S2_TEXCOORD_FMT0_MASK 0xf 90 #define S2_TEXCOORD_FMT1_SHIFT 4 91 #define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4)) 92 #define S2_TEXCOORD_NONE (~0) 93 #define S2_TEX_COUNT_SHIFT_830 12 94 #define S2_VERTEX_1_WIDTH_SHIFT_830 0 95 #define S2_VERTEX_0_WIDTH_SHIFT_830 6 96 /* S3 not interesting */ 97 98 #define S4_POINT_WIDTH_SHIFT 23 99 #define S4_POINT_WIDTH_MASK (0x1ff<<23) 100 #define S4_LINE_WIDTH_SHIFT 19 101 #define S4_LINE_WIDTH_ONE (0x2<<19) 102 #define S4_LINE_WIDTH_MASK (0xf<<19) 103 #define S4_FLATSHADE_ALPHA (1<<18) 104 #define S4_FLATSHADE_FOG (1<<17) 105 #define S4_FLATSHADE_SPECULAR (1<<16) 106 #define S4_FLATSHADE_COLOR (1<<15) 107 #define S4_CULLMODE_BOTH (0<<13) 108 #define S4_CULLMODE_NONE (1<<13) 109 #define S4_CULLMODE_CW (2<<13) 110 #define S4_CULLMODE_CCW (3<<13) 111 #define S4_CULLMODE_MASK (3<<13) 112 #define S4_VFMT_POINT_WIDTH (1<<12) 113 #define S4_VFMT_SPEC_FOG (1<<11) 114 #define S4_VFMT_COLOR (1<<10) 115 #define S4_VFMT_DEPTH_OFFSET (1<<9) 116 #define S4_VFMT_XYZ (1<<6) 117 #define S4_VFMT_XYZW (2<<6) 118 #define S4_VFMT_XY (3<<6) 119 #define S4_VFMT_XYW (4<<6) 120 #define S4_VFMT_XYZW_MASK (7<<6) 121 #define S4_FORCE_DEFAULT_DIFFUSE (1<<5) 122 #define S4_FORCE_DEFAULT_SPECULAR (1<<4) 123 #define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3) 124 #define S4_VFMT_FOG_PARAM (1<<2) 125 #define S4_SPRITE_POINT_ENABLE (1<<1) 126 #define S4_LINE_ANTIALIAS_ENABLE (1<<0) 127 128 #define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \ 129 S4_VFMT_SPEC_FOG | \ 130 S4_VFMT_COLOR | \ 131 S4_VFMT_DEPTH_OFFSET | \ 132 S4_VFMT_XYZW_MASK | \ 133 S4_VFMT_FOG_PARAM) 134 135 136 #define S5_WRITEDISABLE_ALPHA (1<<31) 137 #define S5_WRITEDISABLE_RED (1<<30) 138 #define S5_WRITEDISABLE_GREEN (1<<29) 139 #define S5_WRITEDISABLE_BLUE (1<<28) 140 #define S5_WRITEDISABLE_MASK (0xf<<28) 141 #define S5_FORCE_DEFAULT_POINT_SIZE (1<<27) 142 #define S5_LAST_PIXEL_ENABLE (1<<26) 143 #define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25) 144 #define S5_FOG_ENABLE (1<<24) 145 #define S5_STENCIL_REF_SHIFT 16 146 #define S5_STENCIL_REF_MASK (0xff<<16) 147 #define S5_STENCIL_TEST_FUNC_SHIFT 13 148 #define S5_STENCIL_TEST_FUNC_MASK (0x7<<13) 149 #define S5_STENCIL_FAIL_SHIFT 10 150 #define S5_STENCIL_FAIL_MASK (0x7<<10) 151 #define S5_STENCIL_PASS_Z_FAIL_SHIFT 7 152 #define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7) 153 #define S5_STENCIL_PASS_Z_PASS_SHIFT 4 154 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) 155 #define S5_STENCIL_WRITE_ENABLE (1<<3) 156 #define S5_STENCIL_TEST_ENABLE (1<<2) 157 #define S5_COLOR_DITHER_ENABLE (1<<1) 158 #define S5_LOGICOP_ENABLE (1<<0) 159 160 161 #define S6_ALPHA_TEST_ENABLE (1<<31) 162 #define S6_ALPHA_TEST_FUNC_SHIFT 28 163 #define S6_ALPHA_TEST_FUNC_MASK (0x7<<28) 164 #define S6_ALPHA_REF_SHIFT 20 165 #define S6_ALPHA_REF_MASK (0xff<<20) 166 #define S6_DEPTH_TEST_ENABLE (1<<19) 167 #define S6_DEPTH_TEST_FUNC_SHIFT 16 168 #define S6_DEPTH_TEST_FUNC_MASK (0x7<<16) 169 #define S6_CBUF_BLEND_ENABLE (1<<15) 170 #define S6_CBUF_BLEND_FUNC_SHIFT 12 171 #define S6_CBUF_BLEND_FUNC_MASK (0x7<<12) 172 #define S6_CBUF_SRC_BLEND_FACT_SHIFT 8 173 #define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8) 174 #define S6_CBUF_DST_BLEND_FACT_SHIFT 4 175 #define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4) 176 #define S6_DEPTH_WRITE_ENABLE (1<<3) 177 #define S6_COLOR_WRITE_ENABLE (1<<2) 178 #define S6_TRISTRIP_PV_SHIFT 0 179 #define S6_TRISTRIP_PV_MASK (0x3<<0) 180 181 #define S7_DEPTH_OFFSET_CONST_MASK ~0 182 183 /* p143 */ 184 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) 185 /* Dword 1 */ 186 #define BUF_3D_ID_COLOR_BACK (0x3<<24) 187 #define BUF_3D_ID_DEPTH (0x7<<24) 188 #define BUF_3D_USE_FENCE (1<<23) 189 #define BUF_3D_TILED_SURFACE (1<<22) 190 #define BUF_3D_TILE_WALK_X 0 191 #define BUF_3D_TILE_WALK_Y (1<<21) 192 #define BUF_3D_PITCH(x) (((x)/4)<<2) 193 /* Dword 2 */ 194 #define BUF_3D_ADDR(x) ((x) & ~0x3) 195 196 /* Primitive dispatch on 830-945 */ 197 #define _3DPRIMITIVE (CMD_3D | (0x1f << 24)) 198 #define PRIM_INDIRECT (1<<23) 199 #define PRIM_INLINE (0<<23) 200 #define PRIM_INDIRECT_SEQUENTIAL (0<<17) 201 #define PRIM_INDIRECT_ELTS (1<<17) 202 203 #define PRIM3D_TRILIST (0x0<<18) 204 #define PRIM3D_TRISTRIP (0x1<<18) 205 #define PRIM3D_TRISTRIP_RVRSE (0x2<<18) 206 #define PRIM3D_TRIFAN (0x3<<18) 207 #define PRIM3D_POLY (0x4<<18) 208 #define PRIM3D_LINELIST (0x5<<18) 209 #define PRIM3D_LINESTRIP (0x6<<18) 210 #define PRIM3D_RECTLIST (0x7<<18) 211 #define PRIM3D_POINTLIST (0x8<<18) 212 #define PRIM3D_DIB (0x9<<18) 213 #define PRIM3D_MASK (0x1f<<18) 214 215 #define XY_SETUP_BLT_CMD (CMD_2D | (0x01 << 22)) 216 217 #define XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22)) 218 219 #define XY_SRC_COPY_BLT_CMD (CMD_2D | (0x53 << 22)) 220 221 #define XY_TEXT_IMMEDIATE_BLIT_CMD (CMD_2D | (0x31 << 22)) 222 # define XY_TEXT_BYTE_PACKED (1 << 16) 223 224 /* BR00 */ 225 #define XY_BLT_WRITE_ALPHA (1 << 21) 226 #define XY_BLT_WRITE_RGB (1 << 20) 227 #define XY_SRC_TILED (1 << 15) 228 #define XY_DST_TILED (1 << 11) 229 230 /* BR13 */ 231 #define BR13_8 (0x0 << 24) 232 #define BR13_565 (0x1 << 24) 233 #define BR13_8888 (0x3 << 24) 234