1 /* 2 * Copyright © 2014 Advanced Micro Devices, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS 17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 */ 26 27 /** 28 * This file is included by addrlib. It adds GPU family definitions and 29 * macros compatible with addrlib. 30 */ 31 32 #ifndef AMDGPU_ID_H 33 #define AMDGPU_ID_H 34 35 #include "util/u_endian.h" 36 37 #if defined(PIPE_ARCH_LITTLE_ENDIAN) 38 #define LITTLEENDIAN_CPU 39 #elif defined(PIPE_ARCH_BIG_ENDIAN) 40 #define BIGENDIAN_CPU 41 #endif 42 43 enum { 44 FAMILY_UNKNOWN, 45 FAMILY_SI, 46 FAMILY_CI, 47 FAMILY_KV, 48 FAMILY_VI, 49 FAMILY_CZ, 50 FAMILY_PI, 51 FAMILY_LAST, 52 }; 53 54 /* SI specific rev IDs */ 55 enum { 56 SI_TAHITI_P_A11 = 1, 57 SI_TAHITI_P_A0 = SI_TAHITI_P_A11, /*A0 is alias of A11*/ 58 SI_TAHITI_P_A21 = 5, 59 SI_TAHITI_P_B0 = SI_TAHITI_P_A21, /*B0 is alias of A21*/ 60 SI_TAHITI_P_A22 = 6, 61 SI_TAHITI_P_B1 = SI_TAHITI_P_A22, /*B1 is alias of A22*/ 62 63 SI_PITCAIRN_PM_A11 = 20, 64 SI_PITCAIRN_PM_A0 = SI_PITCAIRN_PM_A11, /*A0 is alias of A11*/ 65 SI_PITCAIRN_PM_A12 = 21, 66 SI_PITCAIRN_PM_A1 = SI_PITCAIRN_PM_A12, /*A1 is alias of A12*/ 67 68 SI_CAPEVERDE_M_A11 = 40, 69 SI_CAPEVERDE_M_A0 = SI_CAPEVERDE_M_A11, /*A0 is alias of A11*/ 70 SI_CAPEVERDE_M_A12 = 41, 71 SI_CAPEVERDE_M_A1 = SI_CAPEVERDE_M_A12, /*A1 is alias of A12*/ 72 73 SI_OLAND_M_A0 = 60, 74 75 SI_HAINAN_V_A0 = 70, 76 77 SI_UNKNOWN = 0xFF 78 }; 79 80 81 #define ASICREV_IS_TAHITI_P(eChipRev) \ 82 (eChipRev < SI_PITCAIRN_PM_A11) 83 #define ASICREV_IS_PITCAIRN_PM(eChipRev) \ 84 ((eChipRev >= SI_PITCAIRN_PM_A11) && (eChipRev < SI_CAPEVERDE_M_A11)) 85 #define ASICREV_IS_CAPEVERDE_M(eChipRev) \ 86 ((eChipRev >= SI_CAPEVERDE_M_A11) && (eChipRev < SI_OLAND_M_A0)) 87 #define ASICREV_IS_OLAND_M(eChipRev) \ 88 ((eChipRev >= SI_OLAND_M_A0) && (eChipRev < SI_HAINAN_V_A0)) 89 #define ASICREV_IS_HAINAN_V(eChipRev) \ 90 (eChipRev >= SI_HAINAN_V_A0) 91 92 /* CI specific revIDs */ 93 enum { 94 CI_BONAIRE_M_A0 = 20, 95 CI_BONAIRE_M_A1 = 21, 96 97 CI_HAWAII_P_A0 = 40, 98 99 CI_UNKNOWN = 0xFF 100 }; 101 102 #define ASICREV_IS_BONAIRE_M(eChipRev) \ 103 ((eChipRev >= CI_BONAIRE_M_A0) && (eChipRev < CI_HAWAII_P_A0)) 104 #define ASICREV_IS_HAWAII_P(eChipRev) \ 105 (eChipRev >= CI_HAWAII_P_A0) 106 107 /* KV specific rev IDs */ 108 enum { 109 KV_SPECTRE_A0 = 0x01, /* KV1 with Spectre GFX core, 8-8-1-2 (CU-Pix-Primitive-RB) */ 110 KV_SPOOKY_A0 = 0x41, /* KV2 with Spooky GFX core, including downgraded from Spectre core, 3-4-1-1 (CU-Pix-Primitive-RB) */ 111 KB_KALINDI_A0 = 0x81, /* KB with Kalindi GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ 112 KB_KALINDI_A1 = 0x82, /* KB with Kalindi GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ 113 BV_KALINDI_A2 = 0x85, /* BV with Kalindi GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ 114 ML_GODAVARI_A0 = 0xa1, /* ML with Godavari GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ 115 ML_GODAVARI_A1 = 0xa2, /* ML with Godavari GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ 116 KV_UNKNOWN = 0xFF 117 }; 118 119 #define ASICREV_IS_SPECTRE(eChipRev) \ 120 ((eChipRev >= KV_SPECTRE_A0) && (eChipRev < KV_SPOOKY_A0)) /* identify all versions of SPRECTRE and supported features set */ 121 #define ASICREV_IS_SPOOKY(eChipRev) \ 122 ((eChipRev >= KV_SPOOKY_A0) && (eChipRev < KB_KALINDI_A0)) /* identify all versions of SPOOKY and supported features set */ 123 #define ASICREV_IS_KALINDI(eChipRev) \ 124 ((eChipRev >= KB_KALINDI_A0) && (eChipRev < KV_UNKNOWN)) /* identify all versions of KALINDI and supported features set */ 125 126 /* Following macros are subset of ASICREV_IS_KALINDI macro */ 127 #define ASICREV_IS_KALINDI_BHAVANI(eChipRev) \ 128 ((eChipRev >= BV_KALINDI_A2) && (eChipRev < ML_GODAVARI_A0)) /* identify all versions of BHAVANI and supported features set */ 129 #define ASICREV_IS_KALINDI_GODAVARI(eChipRev) \ 130 ((eChipRev >= ML_GODAVARI_A0) && (eChipRev < KV_UNKNOWN)) /* identify all versions of GODAVARI and supported features set */ 131 132 /* VI specific rev IDs */ 133 enum { 134 VI_ICELAND_M_A0 = 1, 135 136 VI_TONGA_P_A0 = 20, 137 VI_TONGA_P_A1 = 21, 138 139 VI_FIJI_P_A0 = 60, 140 141 VI_POLARIS10_P_A0 = 80, 142 143 VI_POLARIS11_M_A0 = 90, 144 145 VI_POLARIS12_V_A0 = 100, 146 147 VI_UNKNOWN = 0xFF 148 }; 149 150 151 #define ASICREV_IS_ICELAND_M(eChipRev) \ 152 (eChipRev < VI_TONGA_P_A0) 153 #define ASICREV_IS_TONGA_P(eChipRev) \ 154 ((eChipRev >= VI_TONGA_P_A0) && (eChipRev < VI_FIJI_P_A0)) 155 #define ASICREV_IS_FIJI_P(eChipRev) \ 156 ((eChipRev >= VI_FIJI_P_A0) && (eChipRev < VI_POLARIS10_P_A0)) 157 #define ASICREV_IS_POLARIS10_P(eChipRev)\ 158 ((eChipRev >= VI_POLARIS10_P_A0) && (eChipRev < VI_POLARIS11_M_A0)) 159 #define ASICREV_IS_POLARIS11_M(eChipRev) \ 160 (eChipRev >= VI_POLARIS11_M_A0 && eChipRev < VI_POLARIS12_V_A0) 161 #define ASICREV_IS_POLARIS12_V(eChipRev)\ 162 (eChipRev >= VI_POLARIS12_V_A0) 163 164 /* CZ specific rev IDs */ 165 enum { 166 CARRIZO_A0 = 0x01, 167 STONEY_A0 = 0x61, 168 CZ_UNKNOWN = 0xFF 169 }; 170 171 #define ASICREV_IS_CARRIZO(eChipRev) \ 172 ((eChipRev >= CARRIZO_A0) && (eChipRev < STONEY_A0)) 173 174 #define ASICREV_IS_STONEY(eChipRev) \ 175 ((eChipRev >= STONEY_A0) && (eChipRev < CZ_UNKNOWN)) 176 177 #endif /* AMDGPU_ID_H */ 178