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Searched defs:Src1 (Results 1 – 25 of 46) sorted by relevance

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/external/swiftshader/third_party/subzero/src/
DIceTargetLoweringMIPS32.h166 void _add(Variable *Dest, Variable *Src0, Variable *Src1) { in _add()
170 void _addu(Variable *Dest, Variable *Src0, Variable *Src1) { in _addu()
174 void _and(Variable *Dest, Variable *Src0, Variable *Src1) { in _and()
189 Operand *Src1, CondMIPS32::Cond Condition) { in _br()
200 Operand *Src1, const InstMIPS32Label *Label, in _br()
222 void _add_d(Variable *Dest, Variable *Src0, Variable *Src1) { in _add_d()
226 void _add_s(Variable *Dest, Variable *Src0, Variable *Src1) { in _add_s()
234 void _addiu(Variable *Dest, Variable *Src0, Operand *Src1, RelocOp Reloc) { in _addiu()
238 void _c_eq_d(Variable *Src0, Variable *Src1) { in _c_eq_d()
242 void _c_eq_s(Variable *Src0, Variable *Src1) { in _c_eq_s()
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DIceTargetLoweringARM32.h855 void _vadd(Variable *Dest, Variable *Src0, Variable *Src1) { in _vadd()
858 void _vand(Variable *Dest, Variable *Src0, Variable *Src1) { in _vand()
861 InstARM32Vbsl *_vbsl(Variable *Dest, Variable *Src0, Variable *Src1) { in _vbsl()
864 void _vceq(Variable *Dest, Variable *Src0, Variable *Src1) { in _vceq()
867 InstARM32Vcge *_vcge(Variable *Dest, Variable *Src0, Variable *Src1) { in _vcge()
870 InstARM32Vcgt *_vcgt(Variable *Dest, Variable *Src0, Variable *Src1) { in _vcgt()
877 void _vdiv(Variable *Dest, Variable *Src0, Variable *Src1) { in _vdiv()
888 void _veor(Variable *Dest, Variable *Src0, Variable *Src1) { in _veor()
894 void _vmla(Variable *Dest, Variable *Src0, Variable *Src1) { in _vmla()
897 void _vmls(Variable *Dest, Variable *Src0, Variable *Src1) { in _vmls()
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DIceTargetLoweringX86Base.h520 void _adc_rmw(X86OperandMem *DestSrc0, Operand *Src1) { in _adc_rmw()
528 void _add_rmw(X86OperandMem *DestSrc0, Operand *Src1) { in _add_rmw()
555 void _and_rmw(X86OperandMem *DestSrc0, Operand *Src1) { in _and_rmw()
559 void _blendvps(Variable *Dest, Operand *Src0, Operand *Src1) { in _blendvps()
597 void _cmp(Operand *Src0, Operand *Src1) { in _cmp()
637 void _div(Variable *Dest, Operand *Src0, Operand *Src1) { in _div()
671 void _idiv(Variable *Dest, Operand *Src0, Operand *Src1) { in _idiv()
683 void _insertps(Variable *Dest, Operand *Src0, Operand *Src1) { in _insertps()
758 void _mul(Variable *Dest, Variable *Src0, Operand *Src1) { in _mul()
785 void _or_rmw(X86OperandMem *DestSrc0, Operand *Src1) { in _or_rmw()
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DIceInstARM32.h758 Operand *Src1, CondARM32::Cond Predicate, bool SetFlags) in InstARM32ThreeAddrGPR()
783 Variable *Src1) { in create()
808 InstARM32ThreeAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, Operand *Src1) in InstARM32ThreeAddrFP()
833 Variable *Src0, Variable *Src1) { in create()
839 create(Cfg *Func, Variable *Dest, Variable *Src0, ConstantInteger32 *Src1) { in create()
849 Operand *Src1) in InstARM32ThreeAddrSignAwareFP()
863 Variable *Src1, Variable *Src2, in create()
888 Variable *Src1, Variable *Src2, in InstARM32FourAddrGPR()
913 Variable *Src1) { in create()
937 InstARM32FourAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1) in InstARM32FourAddrFP()
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DIceInstMIPS32.h500 Variable *Src0, Variable *Src1) { in create()
528 Variable *Src1) in InstMIPS32ThreeAddrFPR()
549 Variable *Src0, Variable *Src1) { in create()
577 Variable *Src1) in InstMIPS32ThreeAddrGPR()
821 Operand *Src1, CondMIPS32::Cond Cond) { in create()
837 Operand *Src1, const InstMIPS32Label *Label, in create()
903 static InstMIPS32FPCmp *create(Cfg *Func, Variable *Src0, Variable *Src1) { in create()
937 InstMIPS32FPCmp(Cfg *Func, Variable *Src0, Variable *Src1) in InstMIPS32FPCmp()
988 static InstMIPS32Trap *create(Cfg *Func, Operand *Src0, Operand *Src1, in create()
1025 InstMIPS32Trap(Cfg *Func, Operand *Src0, Operand *Src1, const uint32_t Tcode) in InstMIPS32Trap()
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DIceInstX86BaseImpl.h254 Operand *Src1) in InstX86Icmp()
262 Operand *Src1) in InstX86Ucomiss()
277 InstImpl<TraitsType>::InstX86Test::InstX86Test(Cfg *Func, Operand *Src1, in InstX86Test()
696 Operand *Src1 = getSrc(1); in emitTwoAddress() local
960 const Operand *Src1, const ThreeOpImmEmitter<DReg_t, SReg_t> Emitter) { in emitIASThreeOpImmOps()
1097 Operand *Src1 = this->getSrc(1); in emit() local
1117 Operand *Src1 = this->getSrc(1); in emit() local
1428 const Operand *Src1 = this->getSrc(1); in emitIAS() local
1466 const Operand *Src1 = this->getSrc(1); in emitIAS() local
1837 const Operand *Src1 = this->getSrc(1); in emitIAS() local
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DIceTargetLowering.h576 auto *Src1 = thunk1(); in applyToThunkedArgs() local
586 auto *Src1 = thunk1(); in applyToThunkedArgs() local
DIceConverter.cpp347 Ice::Operand *Src1 = convertOperand(Instr, 1); in convertArithInstruction() local
407 Ice::Operand *Src1 = convertOperand(Instr, 1); in convertICmpInstruction() local
451 Ice::Operand *Src1 = convertOperand(Instr, 1); in convertFCmpInstruction() local
DIceTargetLoweringARM32.cpp542 Operand *Src1 = Instr->getSrc(1); in genTargetHelperCallFor() local
2323 Operand *Src1, ExtInstr ExtFunc, in lowerIDivRem()
2361 Operand *Src1 = Instr->getSrc(1); in lowerInt1Arithmetic() local
2447 Operand *const Src1; member in Ice::ARM32::__anonc54490810b11::NumericOperandsBase
2555 Operand *Src1 = Instr->getArg(1); in preambleDivRem() local
2587 Operand *Src1) { in lowerInt64Arithmetic()
3088 Operand *Src1 = legalizeUndef(Instr->getSrc(1)); in lowerArithmetic() local
4224 Operand *Src1 = Instr->getSrc(1); in lowerExtractElement() local
4304 Operand *Src1 = Instr->getSrc(1); in lowerFcmpCond() local
4342 auto *Src1 = legalizeToReg(Instr->getSrc(1)); in lowerFcmp() local
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/external/swiftshader/third_party/LLVM/lib/ExecutionEngine/Interpreter/
DExecution.cpp53 static void executeFAddInst(GenericValue &Dest, GenericValue Src1, in executeFAddInst()
64 static void executeFSubInst(GenericValue &Dest, GenericValue Src1, in executeFSubInst()
75 static void executeFMulInst(GenericValue &Dest, GenericValue Src1, in executeFMulInst()
86 static void executeFDivInst(GenericValue &Dest, GenericValue Src1, in executeFDivInst()
97 static void executeFRemInst(GenericValue &Dest, GenericValue Src1, in executeFRemInst()
127 static GenericValue executeICMP_EQ(GenericValue Src1, GenericValue Src2, in executeICMP_EQ()
140 static GenericValue executeICMP_NE(GenericValue Src1, GenericValue Src2, in executeICMP_NE()
153 static GenericValue executeICMP_ULT(GenericValue Src1, GenericValue Src2, in executeICMP_ULT()
166 static GenericValue executeICMP_SLT(GenericValue Src1, GenericValue Src2, in executeICMP_SLT()
179 static GenericValue executeICMP_UGT(GenericValue Src1, GenericValue Src2, in executeICMP_UGT()
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/external/llvm/lib/ExecutionEngine/Interpreter/
DExecution.cpp55 static void executeFAddInst(GenericValue &Dest, GenericValue Src1, in executeFAddInst()
66 static void executeFSubInst(GenericValue &Dest, GenericValue Src1, in executeFSubInst()
77 static void executeFMulInst(GenericValue &Dest, GenericValue Src1, in executeFMulInst()
88 static void executeFDivInst(GenericValue &Dest, GenericValue Src1, in executeFDivInst()
99 static void executeFRemInst(GenericValue &Dest, GenericValue Src1, in executeFRemInst()
138 static GenericValue executeICMP_EQ(GenericValue Src1, GenericValue Src2, in executeICMP_EQ()
152 static GenericValue executeICMP_NE(GenericValue Src1, GenericValue Src2, in executeICMP_NE()
166 static GenericValue executeICMP_ULT(GenericValue Src1, GenericValue Src2, in executeICMP_ULT()
180 static GenericValue executeICMP_SLT(GenericValue Src1, GenericValue Src2, in executeICMP_SLT()
194 static GenericValue executeICMP_UGT(GenericValue Src1, GenericValue Src2, in executeICMP_UGT()
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/external/llvm/lib/Target/AMDGPU/
DSIShrinkInstructions.cpp106 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in canShrink() local
277 const MachineOperand &Src1 = MI.getOperand(2); in runOnMachineFunction() local
381 const MachineOperand *Src1 = in runOnMachineFunction() local
DR600ExpandSpecialInstrs.cpp225 unsigned Src1 = BMI->getOperand( in runOnMachineFunction() local
276 unsigned Src1 = 0; in runOnMachineFunction() local
DSIInstrInfo.cpp890 unsigned Src1 = MI.getOperand(2).getReg(); in expandPostRAPseudo() local
967 MachineOperand &Src1 = MI.getOperand(Src1Idx); in commuteInstructionImpl() local
1051 MachineOperand &Src1 = MI.getOperand(Src1Idx); in findCommutedOpIndices() local
1240 MachineOperand *Src1 = getNamedOperand(UseMI, AMDGPU::OpName::src1); in FoldImmediate() local
1434 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1); in convertToThreeAddress() local
1761 const MachineOperand &Src1 = MI.getOperand(Src1Idx); in verifyInstruction() local
2055 MachineOperand &Src1 = MI.getOperand(Src1Idx); in legalizeOperandsVOP2() local
2757 MachineOperand &Src1 = Inst.getOperand(2); in splitScalar64BitBinaryOp() local
/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DControlFlow.cpp17 #define TestJ(C, Near, Dest, Src0, Value0, Src1, Value1) \ in TEST_F() argument
39 #define TestImpl(Dst, Src0, Src1) \ in TEST_F() argument
DGPRArith.cpp33 #define TestSetCC(C, Dest, IsTrue, Src0, Value0, Src1, Value1) \ in TEST_F() argument
57 #define TestImpl(Dest, Src0, Src1) \ in TEST_F() argument
709 #define TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, \ in TEST_F() argument
803 #define TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size) \ in TEST_F() argument
867 #define TestImplOp(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \ in TEST_F() argument
878 #define TestImplValues(Dst0, Dst1, Value0, Src0, Src1, Value1, Size) \ in TEST_F() argument
884 #define TestImplSize(Dst0, Dst1, Src0, Src1, Size) \ in TEST_F() argument
890 #define TestImpl(Dst0, Dst1, Src0, Src1) \ in TEST_F() argument
DDataMov.cpp422 #define TestRegReg(C, Dest, IsTrue, Src0, Value0, Src1, Value1) \ in TEST_F() argument
462 #define TestValue(C, Dest, IsTrue, Src0, Value0, Src1, Value1) \ in TEST_F() argument
468 #define TestImpl(Dest, Src0, Src1) \ in TEST_F() argument
/external/llvm/lib/Target/Hexagon/
DHexagonPeephole.cpp159 MachineOperand &Src1 = MI.getOperand(1); in runOnMachineFunction() local
176 MachineOperand &Src1 = MI.getOperand(1); in runOnMachineFunction() local
DHexagonGenMux.cpp175 unsigned HexagonGenMux::getMuxOpcode(const MachineOperand &Src1, in getMuxOpcode()
266 MachineOperand *Src1 = &Def1.getOperand(2), *Src2 = &Def2.getOperand(2); in genMuxInBlock() local
/external/llvm/lib/Target/SystemZ/
DSystemZSelectionDAGInfo.cpp150 SDValue Src1, SDValue Src2, uint64_t Size) { in emitCLC()
184 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, in EmitTargetCodeForMemcmp()
235 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, in EmitTargetCodeForStrcmp()
/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DControlFlow.cpp18 #define TestJ(C, Near, Src0, Value0, Src1, Value1, Dest) \ in TEST_F() argument
DGPRArith.cpp48 #define TestSetCC(C, Src0, Value0, Src1, Value1, Dest, IsTrue) \ in TEST_F() argument
678 #define TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, \ in TEST_F() argument
776 #define TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size) \ in TEST_F() argument
842 #define TestImplOp(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \ in TEST_F() argument
853 #define TestImplValues(Dst0, Dst1, Value0, Src0, Src1, Value1, Size) \ in TEST_F() argument
859 #define TestImplSize(Dst0, Dst1, Src0, Src1, Size) \ in TEST_F() argument
865 #define TestImpl(Dst0, Dst1, Src0, Src1) \ in TEST_F() argument
/external/v8/src/asmjs/
Dasm-typer.cc2013 #define BINOP_OVERLOAD(Src0, Src1, Dest) \ in ValidateMultiplicativeExpression() argument
2114 #define BINOP_OVERLOAD(Src0, Src1, Dest) \ in ValidateShiftExpression() argument
2148 #define CMPOP_OVERLOAD(Src0, Src1, Dest) \ in ValidateRelationalExpression() argument
2197 #define CMPOP_OVERLOAD(Src0, Src1, Dest) \ in ValidateEqualityExpression() argument
2238 #define BINOP_OVERLOAD(Src0, Src1, Dest) \ in ValidateBitwiseANDExpression() argument
2265 #define BINOP_OVERLOAD(Src0, Src1, Dest) \ in ValidateBitwiseXORExpression() argument
2305 #define BINOP_OVERLOAD(Src0, Src1, Dest) \ in ValidateBitwiseORExpression() argument
/external/syslinux/gnu-efi/gnu-efi-3.0/lib/
Ddpath.c119 IN EFI_DEVICE_PATH *Src1, in AppendDevicePath()
192 IN EFI_DEVICE_PATH *Src1, in AppendDevicePathNode()
/external/llvm/lib/Target/AArch64/
DAArch64AdvSIMDScalarPass.cpp307 unsigned Src1 = 0, SubReg1; in transformInstruction() local

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