| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFixSGPRCopies.cpp | 135 const TargetRegisterClass *SrcRC = in getCopyRegClasses() local
151 static bool isVGPRToSGPRCopy(const TargetRegisterClass *SrcRC, in isVGPRToSGPRCopy()
157 static bool isSGPRToVGPRCopy(const TargetRegisterClass *SrcRC, in isSGPRToVGPRCopy()
193 const TargetRegisterClass *SrcRC, *DstRC; in foldVGPRCopyIntoRegSequence() local
220 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in foldVGPRCopyIntoRegSequence() local
264 const TargetRegisterClass *SrcRC, *DstRC; in runOnMachineFunction() local
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| D | SILowerI1Copies.cpp | 103 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src.getReg()); in runOnMachineFunction() local
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| D | SIRegisterInfo.cpp | 810 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
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| D | SIInstrInfo.cpp | 2828 const TargetRegisterClass *SrcRC = Src.isReg() ? in splitScalar64BitBCNT() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXCopy.cpp | 106 const TargetRegisterClass *SrcRC = in processBlock() local
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXInstrInfo.cpp | 39 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in copyPhysReg() local
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| /external/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 292 const TargetRegisterClass *SrcRC, in shareSameRegisterFile()
322 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
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| D | DetectDeadLanes.cpp | 161 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in isCrossCopy() local
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| D | RegisterCoalescer.cpp | 352 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src); in setRegisters() local
1353 auto SrcRC = MRI->getRegClass(CP.getSrcReg()); in joinCopy() local
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| D | PeepholeOptimizer.cpp | 684 const TargetRegisterClass *SrcRC = MRI->getRegClass(CurSrcPair.Reg); in findNextSource() local
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | RegisterCoalescer.cpp | 289 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src); in setRegisters() local
306 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src); in setRegisters() local
1103 const TargetRegisterClass *SrcRC, in isWinToJoinCrossClass()
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| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXInstrInfo.cpp | 73 const TargetRegisterClass *SrcRC, in copyRegToReg()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGFast.cpp | 382 const TargetRegisterClass *SrcRC, in InsertCopiesAndMoveSuccs()
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| D | InstrEmitter.cpp | 137 const TargetRegisterClass *SrcRC = 0, *DstRC = 0; in EmitCopyFromReg() local
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| D | ScheduleDAGRRList.cpp | 973 const TargetRegisterClass *SrcRC, in InsertCopiesAndMoveSuccs()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGFast.cpp | 389 const TargetRegisterClass *SrcRC, in InsertCopiesAndMoveSuccs()
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| D | InstrEmitter.cpp | 157 const TargetRegisterClass *SrcRC = nullptr, *DstRC = nullptr; in EmitCopyFromReg() local
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| D | ScheduleDAGRRList.cpp | 1137 const TargetRegisterClass *SrcRC, in InsertCopiesAndMoveSuccs()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 784 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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| D | ARMFastISel.cpp | 2140 const TargetRegisterClass* SrcRC = MRI.getRegClass(SrcReg); in SelectRet() local
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 920 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86FastISel.cpp | 780 const TargetRegisterClass* SrcRC = MRI.getRegClass(SrcReg); in X86SelectRet() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1764 const TargetRegisterClass* SrcRC = MRI.getRegClass(SrcReg); in SelectRet() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonGenInsert.cpp | 640 const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcR); in isValidInsertForm() local
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| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1237 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in X86SelectRet() local
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