• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This implements routines for translating functions from LLVM IR into
11 // Machine IR.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
16 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
17 
18 #include "llvm/ADT/APInt.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/IndexedMap.h"
21 #include "llvm/ADT/Optional.h"
22 #include "llvm/ADT/SmallPtrSet.h"
23 #include "llvm/ADT/SmallVector.h"
24 #include "llvm/CodeGen/ISDOpcodes.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/IR/InlineAsm.h"
27 #include "llvm/IR/Instructions.h"
28 #include "llvm/Target/TargetRegisterInfo.h"
29 #include <vector>
30 
31 namespace llvm {
32 
33 class AllocaInst;
34 class BasicBlock;
35 class BranchProbabilityInfo;
36 class CallInst;
37 class Function;
38 class GlobalVariable;
39 class Instruction;
40 class MachineInstr;
41 class MachineBasicBlock;
42 class MachineFunction;
43 class MachineModuleInfo;
44 class MachineRegisterInfo;
45 class SelectionDAG;
46 class MVT;
47 class TargetLowering;
48 class Value;
49 
50 //===--------------------------------------------------------------------===//
51 /// FunctionLoweringInfo - This contains information that is global to a
52 /// function that is used when lowering a region of the function.
53 ///
54 class FunctionLoweringInfo {
55 public:
56   const Function *Fn;
57   MachineFunction *MF;
58   const TargetLowering *TLI;
59   MachineRegisterInfo *RegInfo;
60   BranchProbabilityInfo *BPI;
61   /// CanLowerReturn - true iff the function's return value can be lowered to
62   /// registers.
63   bool CanLowerReturn;
64 
65   /// True if part of the CSRs will be handled via explicit copies.
66   bool SplitCSR;
67 
68   /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
69   /// allocated to hold a pointer to the hidden sret parameter.
70   unsigned DemoteRegister;
71 
72   /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
73   DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
74 
75   typedef SmallVector<unsigned, 1> SwiftErrorVRegs;
76   typedef SmallVector<const Value*, 1> SwiftErrorValues;
77   /// A function can only have a single swifterror argument. And if it does
78   /// have a swifterror argument, it must be the first entry in
79   /// SwiftErrorVals.
80   SwiftErrorValues SwiftErrorVals;
81 
82   /// Track the virtual register for each swifterror value in a given basic
83   /// block. Entries in SwiftErrorVRegs have the same ordering as entries
84   /// in SwiftErrorVals.
85   /// Note that another choice that is more straight-forward is to use
86   /// Map<const MachineBasicBlock*, Map<Value*, unsigned/*VReg*/>>. It
87   /// maintains a map from swifterror values to virtual registers for each
88   /// machine basic block. This choice does not require a one-to-one
89   /// correspondence between SwiftErrorValues and SwiftErrorVRegs. But because
90   /// of efficiency concern, we do not choose it.
91   llvm::DenseMap<const MachineBasicBlock*, SwiftErrorVRegs> SwiftErrorMap;
92 
93   /// Track the virtual register for each swifterror value at the end of a basic
94   /// block when we need the assignment of a virtual register before the basic
95   /// block is visited. When we actually visit the basic block, we will make
96   /// sure the swifterror value is in the correct virtual register.
97   llvm::DenseMap<const MachineBasicBlock*, SwiftErrorVRegs>
98       SwiftErrorWorklist;
99 
100   /// Find the swifterror virtual register in SwiftErrorMap. We will assert
101   /// failure when the value does not exist in swifterror map.
102   unsigned findSwiftErrorVReg(const MachineBasicBlock*, const Value*) const;
103   /// Set the swifterror virtual register in SwiftErrorMap.
104   void setSwiftErrorVReg(const MachineBasicBlock *MBB, const Value*, unsigned);
105 
106   /// ValueMap - Since we emit code for the function a basic block at a time,
107   /// we must remember which virtual registers hold the values for
108   /// cross-basic-block values.
109   DenseMap<const Value *, unsigned> ValueMap;
110 
111   /// Track virtual registers created for exception pointers.
112   DenseMap<const Value *, unsigned> CatchPadExceptionPointers;
113 
114   /// Keep track of frame indices allocated for statepoints as they could be
115   /// used across basic block boundaries.  This struct is more complex than a
116   /// simple map because the stateopint lowering code de-duplicates gc pointers
117   /// based on their SDValue (so %p and (bitcast %p to T) will get the same
118   /// slot), and we track that here.
119 
120   struct StatepointSpillMap {
121     typedef DenseMap<const Value *, Optional<int>> SlotMapTy;
122 
123     /// Maps uniqued llvm IR values to the slots they were spilled in.  If a
124     /// value is mapped to None it means we visited the value but didn't spill
125     /// it (because it was a constant, for instance).
126     SlotMapTy SlotMap;
127 
128     /// Maps llvm IR values to the values they were de-duplicated to.
129     DenseMap<const Value *, const Value *> DuplicateMap;
130 
findStatepointSpillMap131     SlotMapTy::const_iterator find(const Value *V) const {
132       auto DuplIt = DuplicateMap.find(V);
133       if (DuplIt != DuplicateMap.end())
134         V = DuplIt->second;
135       return SlotMap.find(V);
136     }
137 
endStatepointSpillMap138     SlotMapTy::const_iterator end() const { return SlotMap.end(); }
139   };
140 
141   /// Maps gc.statepoint instructions to their corresponding StatepointSpillMap
142   /// instances.
143   DenseMap<const Instruction *, StatepointSpillMap> StatepointSpillMaps;
144 
145   /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
146   /// the entry block.  This allows the allocas to be efficiently referenced
147   /// anywhere in the function.
148   DenseMap<const AllocaInst*, int> StaticAllocaMap;
149 
150   /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
151   DenseMap<const Argument*, int> ByValArgFrameIndexMap;
152 
153   /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
154   /// function arguments that are inserted after scheduling is completed.
155   SmallVector<MachineInstr*, 8> ArgDbgValues;
156 
157   /// RegFixups - Registers which need to be replaced after isel is done.
158   DenseMap<unsigned, unsigned> RegFixups;
159 
160   /// StatepointStackSlots - A list of temporary stack slots (frame indices)
161   /// used to spill values at a statepoint.  We store them here to enable
162   /// reuse of the same stack slots across different statepoints in different
163   /// basic blocks.
164   SmallVector<unsigned, 50> StatepointStackSlots;
165 
166   /// MBB - The current block.
167   MachineBasicBlock *MBB;
168 
169   /// MBB - The current insert position inside the current block.
170   MachineBasicBlock::iterator InsertPt;
171 
172   struct LiveOutInfo {
173     unsigned NumSignBits : 31;
174     unsigned IsValid : 1;
175     APInt KnownOne, KnownZero;
LiveOutInfoLiveOutInfo176     LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0),
177                     KnownZero(1, 0) {}
178   };
179 
180   /// Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND)
181   /// for a value.
182   DenseMap<const Value *, ISD::NodeType> PreferredExtendType;
183 
184   /// VisitedBBs - The set of basic blocks visited thus far by instruction
185   /// selection.
186   SmallPtrSet<const BasicBlock*, 4> VisitedBBs;
187 
188   /// PHINodesToUpdate - A list of phi instructions whose operand list will
189   /// be updated after processing the current basic block.
190   /// TODO: This isn't per-function state, it's per-basic-block state. But
191   /// there's no other convenient place for it to live right now.
192   std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
193   unsigned OrigNumPHINodesToUpdate;
194 
195   /// If the current MBB is a landing pad, the exception pointer and exception
196   /// selector registers are copied into these virtual registers by
197   /// SelectionDAGISel::PrepareEHLandingPad().
198   unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg;
199 
200   /// set - Initialize this FunctionLoweringInfo with the given Function
201   /// and its associated MachineFunction.
202   ///
203   void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG);
204 
205   /// clear - Clear out all the function-specific state. This returns this
206   /// FunctionLoweringInfo to an empty state, ready to be used for a
207   /// different function.
208   void clear();
209 
210   /// isExportedInst - Return true if the specified value is an instruction
211   /// exported from its block.
isExportedInst(const Value * V)212   bool isExportedInst(const Value *V) {
213     return ValueMap.count(V);
214   }
215 
216   unsigned CreateReg(MVT VT);
217 
218   unsigned CreateRegs(Type *Ty);
219 
InitializeRegForValue(const Value * V)220   unsigned InitializeRegForValue(const Value *V) {
221     // Tokens never live in vregs.
222     if (V->getType()->isTokenTy())
223       return 0;
224     unsigned &R = ValueMap[V];
225     assert(R == 0 && "Already initialized this value register!");
226     return R = CreateRegs(V->getType());
227   }
228 
229   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
230   /// register is a PHI destination and the PHI's LiveOutInfo is not valid.
GetLiveOutRegInfo(unsigned Reg)231   const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) {
232     if (!LiveOutRegInfo.inBounds(Reg))
233       return nullptr;
234 
235     const LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
236     if (!LOI->IsValid)
237       return nullptr;
238 
239     return LOI;
240   }
241 
242   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
243   /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
244   /// the register's LiveOutInfo is for a smaller bit width, it is extended to
245   /// the larger bit width by zero extension. The bit width must be no smaller
246   /// than the LiveOutInfo's existing bit width.
247   const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth);
248 
249   /// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
AddLiveOutRegInfo(unsigned Reg,unsigned NumSignBits,const APInt & KnownZero,const APInt & KnownOne)250   void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
251                          const APInt &KnownZero, const APInt &KnownOne) {
252     // Only install this information if it tells us something.
253     if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
254       return;
255 
256     LiveOutRegInfo.grow(Reg);
257     LiveOutInfo &LOI = LiveOutRegInfo[Reg];
258     LOI.NumSignBits = NumSignBits;
259     LOI.KnownOne = KnownOne;
260     LOI.KnownZero = KnownZero;
261   }
262 
263   /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
264   /// register based on the LiveOutInfo of its operands.
265   void ComputePHILiveOutRegInfo(const PHINode*);
266 
267   /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be
268   /// called when a block is visited before all of its predecessors.
InvalidatePHILiveOutRegInfo(const PHINode * PN)269   void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
270     // PHIs with no uses have no ValueMap entry.
271     DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN);
272     if (It == ValueMap.end())
273       return;
274 
275     unsigned Reg = It->second;
276     if (Reg == 0)
277       return;
278 
279     LiveOutRegInfo.grow(Reg);
280     LiveOutRegInfo[Reg].IsValid = false;
281   }
282 
283   /// setArgumentFrameIndex - Record frame index for the byval
284   /// argument.
285   void setArgumentFrameIndex(const Argument *A, int FI);
286 
287   /// getArgumentFrameIndex - Get frame index for the byval argument.
288   int getArgumentFrameIndex(const Argument *A);
289 
290   unsigned getCatchPadExceptionPointerVReg(const Value *CPI,
291                                            const TargetRegisterClass *RC);
292 
293 private:
294   void addSEHHandlersForLPads(ArrayRef<const LandingPadInst *> LPads);
295 
296   /// LiveOutRegInfo - Information about live out vregs.
297   IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
298 };
299 
300 /// ComputeUsesVAFloatArgument - Determine if any floating-point values are
301 /// being passed to this variadic function, and set the MachineModuleInfo's
302 /// usesVAFloatArgument flag if so. This flag is used to emit an undefined
303 /// reference to _fltused on Windows, which will link in MSVCRT's
304 /// floating-point support.
305 void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI);
306 
307 /// AddLandingPadInfo - Extract the exception handling information from the
308 /// landingpad instruction and add them to the specified machine module info.
309 void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
310                        MachineBasicBlock *MBB);
311 
312 } // end namespace llvm
313 
314 #endif
315