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1 //===---------------------------- libunwind.h -----------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is dual licensed under the MIT and the University of Illinois Open
6 // Source Licenses. See LICENSE.TXT for details.
7 //
8 //
9 // Compatible with libunwind API documented at:
10 //   http://www.nongnu.org/libunwind/man/libunwind(3).html
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef __LIBUNWIND__
15 #define __LIBUNWIND__
16 
17 #include <__libunwind_config.h>
18 
19 #include <stdint.h>
20 #include <stddef.h>
21 
22 #ifdef __APPLE__
23   #if __clang__
24     #if __has_include(<Availability.h>)
25       #include <Availability.h>
26     #endif
27   #elif __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1050
28     #include <Availability.h>
29   #endif
30 
31   #ifdef __arm__
32      #define LIBUNWIND_AVAIL __attribute__((unavailable))
33   #elif defined(__OSX_AVAILABLE_STARTING)
34     #define LIBUNWIND_AVAIL __OSX_AVAILABLE_STARTING(__MAC_10_6, __IPHONE_5_0)
35   #else
36     #include <AvailabilityMacros.h>
37     #ifdef AVAILABLE_MAC_OS_X_VERSION_10_6_AND_LATER
38       #define LIBUNWIND_AVAIL AVAILABLE_MAC_OS_X_VERSION_10_6_AND_LATER
39     #else
40       #define LIBUNWIND_AVAIL __attribute__((unavailable))
41     #endif
42   #endif
43 #else
44   #define LIBUNWIND_AVAIL
45 #endif
46 
47 /* error codes */
48 enum {
49   UNW_ESUCCESS      = 0,     /* no error */
50   UNW_EUNSPEC       = -6540, /* unspecified (general) error */
51   UNW_ENOMEM        = -6541, /* out of memory */
52   UNW_EBADREG       = -6542, /* bad register number */
53   UNW_EREADONLYREG  = -6543, /* attempt to write read-only register */
54   UNW_ESTOPUNWIND   = -6544, /* stop unwinding */
55   UNW_EINVALIDIP    = -6545, /* invalid IP */
56   UNW_EBADFRAME     = -6546, /* bad frame */
57   UNW_EINVAL        = -6547, /* unsupported operation or bad value */
58   UNW_EBADVERSION   = -6548, /* unwind info has unsupported version */
59   UNW_ENOINFO       = -6549  /* no unwind info found */
60 };
61 
62 struct unw_context_t {
63   uint64_t data[_LIBUNWIND_CONTEXT_SIZE];
64 };
65 typedef struct unw_context_t unw_context_t;
66 
67 struct unw_cursor_t {
68   uint64_t data[_LIBUNWIND_CURSOR_SIZE];
69 };
70 typedef struct unw_cursor_t unw_cursor_t;
71 
72 typedef struct unw_addr_space *unw_addr_space_t;
73 
74 typedef int unw_regnum_t;
75 #if defined(_LIBUNWIND_ARM_EHABI)
76 typedef uint32_t unw_word_t;
77 typedef uint64_t unw_fpreg_t;
78 #else
79 typedef uint64_t unw_word_t;
80 typedef double unw_fpreg_t;
81 #endif
82 
83 struct unw_proc_info_t {
84   unw_word_t  start_ip;         /* start address of function */
85   unw_word_t  end_ip;           /* address after end of function */
86   unw_word_t  lsda;             /* address of language specific data area, */
87                                 /*  or zero if not used */
88   unw_word_t  handler;          /* personality routine, or zero if not used */
89   unw_word_t  gp;               /* not used */
90   unw_word_t  flags;            /* not used */
91   uint32_t    format;           /* compact unwind encoding, or zero if none */
92   uint32_t    unwind_info_size; /* size of DWARF unwind info, or zero if none */
93   unw_word_t  unwind_info;      /* address of DWARF unwind info, or zero */
94   unw_word_t  extra;            /* mach_header of mach-o image containing func */
95 };
96 typedef struct unw_proc_info_t unw_proc_info_t;
97 
98 #ifdef __cplusplus
99 extern "C" {
100 #endif
101 
102 extern int unw_getcontext(unw_context_t *) LIBUNWIND_AVAIL;
103 extern int unw_init_local(unw_cursor_t *, unw_context_t *) LIBUNWIND_AVAIL;
104 extern int unw_step(unw_cursor_t *) LIBUNWIND_AVAIL;
105 extern int unw_get_reg(unw_cursor_t *, unw_regnum_t, unw_word_t *) LIBUNWIND_AVAIL;
106 extern int unw_get_fpreg(unw_cursor_t *, unw_regnum_t, unw_fpreg_t *) LIBUNWIND_AVAIL;
107 extern int unw_set_reg(unw_cursor_t *, unw_regnum_t, unw_word_t) LIBUNWIND_AVAIL;
108 extern int unw_set_fpreg(unw_cursor_t *, unw_regnum_t, unw_fpreg_t)  LIBUNWIND_AVAIL;
109 extern int unw_resume(unw_cursor_t *) LIBUNWIND_AVAIL;
110 
111 #ifdef __arm__
112 /* Save VFP registers in FSTMX format (instead of FSTMD). */
113 extern void unw_save_vfp_as_X(unw_cursor_t *) LIBUNWIND_AVAIL;
114 #endif
115 
116 
117 extern const char *unw_regname(unw_cursor_t *, unw_regnum_t) LIBUNWIND_AVAIL;
118 extern int unw_get_proc_info(unw_cursor_t *, unw_proc_info_t *) LIBUNWIND_AVAIL;
119 extern int unw_is_fpreg(unw_cursor_t *, unw_regnum_t) LIBUNWIND_AVAIL;
120 extern int unw_is_signal_frame(unw_cursor_t *) LIBUNWIND_AVAIL;
121 extern int unw_get_proc_name(unw_cursor_t *, char *, size_t, unw_word_t *) LIBUNWIND_AVAIL;
122 //extern int       unw_get_save_loc(unw_cursor_t*, int, unw_save_loc_t*);
123 
124 extern unw_addr_space_t unw_local_addr_space;
125 
126 #ifdef UNW_REMOTE
127 /*
128  * Mac OS X "remote" API for unwinding other processes on same machine
129  *
130  */
131 extern unw_addr_space_t unw_create_addr_space_for_task(task_t);
132 extern void unw_destroy_addr_space(unw_addr_space_t);
133 extern int unw_init_remote_thread(unw_cursor_t *, unw_addr_space_t, thread_t *);
134 #endif /* UNW_REMOTE */
135 
136 /*
137  * traditional libunwind "remote" API
138  *   NOT IMPLEMENTED on Mac OS X
139  *
140  * extern int               unw_init_remote(unw_cursor_t*, unw_addr_space_t,
141  *                                          thread_t*);
142  * extern unw_accessors_t   unw_get_accessors(unw_addr_space_t);
143  * extern unw_addr_space_t  unw_create_addr_space(unw_accessors_t, int);
144  * extern void              unw_flush_cache(unw_addr_space_t, unw_word_t,
145  *                                          unw_word_t);
146  * extern int               unw_set_caching_policy(unw_addr_space_t,
147  *                                                 unw_caching_policy_t);
148  * extern void              _U_dyn_register(unw_dyn_info_t*);
149  * extern void              _U_dyn_cancel(unw_dyn_info_t*);
150  */
151 
152 #ifdef __cplusplus
153 }
154 #endif
155 
156 // architecture independent register numbers
157 enum {
158   UNW_REG_IP = -1, // instruction pointer
159   UNW_REG_SP = -2, // stack pointer
160 };
161 
162 // 32-bit x86 registers
163 enum {
164   UNW_X86_EAX = 0,
165   UNW_X86_ECX = 1,
166   UNW_X86_EDX = 2,
167   UNW_X86_EBX = 3,
168   UNW_X86_EBP = 4,
169   UNW_X86_ESP = 5,
170   UNW_X86_ESI = 6,
171   UNW_X86_EDI = 7
172 };
173 
174 // 64-bit x86_64 registers
175 enum {
176   UNW_X86_64_RAX = 0,
177   UNW_X86_64_RDX = 1,
178   UNW_X86_64_RCX = 2,
179   UNW_X86_64_RBX = 3,
180   UNW_X86_64_RSI = 4,
181   UNW_X86_64_RDI = 5,
182   UNW_X86_64_RBP = 6,
183   UNW_X86_64_RSP = 7,
184   UNW_X86_64_R8  = 8,
185   UNW_X86_64_R9  = 9,
186   UNW_X86_64_R10 = 10,
187   UNW_X86_64_R11 = 11,
188   UNW_X86_64_R12 = 12,
189   UNW_X86_64_R13 = 13,
190   UNW_X86_64_R14 = 14,
191   UNW_X86_64_R15 = 15
192 };
193 
194 
195 // 32-bit ppc register numbers
196 enum {
197   UNW_PPC_R0  = 0,
198   UNW_PPC_R1  = 1,
199   UNW_PPC_R2  = 2,
200   UNW_PPC_R3  = 3,
201   UNW_PPC_R4  = 4,
202   UNW_PPC_R5  = 5,
203   UNW_PPC_R6  = 6,
204   UNW_PPC_R7  = 7,
205   UNW_PPC_R8  = 8,
206   UNW_PPC_R9  = 9,
207   UNW_PPC_R10 = 10,
208   UNW_PPC_R11 = 11,
209   UNW_PPC_R12 = 12,
210   UNW_PPC_R13 = 13,
211   UNW_PPC_R14 = 14,
212   UNW_PPC_R15 = 15,
213   UNW_PPC_R16 = 16,
214   UNW_PPC_R17 = 17,
215   UNW_PPC_R18 = 18,
216   UNW_PPC_R19 = 19,
217   UNW_PPC_R20 = 20,
218   UNW_PPC_R21 = 21,
219   UNW_PPC_R22 = 22,
220   UNW_PPC_R23 = 23,
221   UNW_PPC_R24 = 24,
222   UNW_PPC_R25 = 25,
223   UNW_PPC_R26 = 26,
224   UNW_PPC_R27 = 27,
225   UNW_PPC_R28 = 28,
226   UNW_PPC_R29 = 29,
227   UNW_PPC_R30 = 30,
228   UNW_PPC_R31 = 31,
229   UNW_PPC_F0  = 32,
230   UNW_PPC_F1  = 33,
231   UNW_PPC_F2  = 34,
232   UNW_PPC_F3  = 35,
233   UNW_PPC_F4  = 36,
234   UNW_PPC_F5  = 37,
235   UNW_PPC_F6  = 38,
236   UNW_PPC_F7  = 39,
237   UNW_PPC_F8  = 40,
238   UNW_PPC_F9  = 41,
239   UNW_PPC_F10 = 42,
240   UNW_PPC_F11 = 43,
241   UNW_PPC_F12 = 44,
242   UNW_PPC_F13 = 45,
243   UNW_PPC_F14 = 46,
244   UNW_PPC_F15 = 47,
245   UNW_PPC_F16 = 48,
246   UNW_PPC_F17 = 49,
247   UNW_PPC_F18 = 50,
248   UNW_PPC_F19 = 51,
249   UNW_PPC_F20 = 52,
250   UNW_PPC_F21 = 53,
251   UNW_PPC_F22 = 54,
252   UNW_PPC_F23 = 55,
253   UNW_PPC_F24 = 56,
254   UNW_PPC_F25 = 57,
255   UNW_PPC_F26 = 58,
256   UNW_PPC_F27 = 59,
257   UNW_PPC_F28 = 60,
258   UNW_PPC_F29 = 61,
259   UNW_PPC_F30 = 62,
260   UNW_PPC_F31 = 63,
261   UNW_PPC_MQ  = 64,
262   UNW_PPC_LR  = 65,
263   UNW_PPC_CTR = 66,
264   UNW_PPC_AP  = 67,
265   UNW_PPC_CR0 = 68,
266   UNW_PPC_CR1 = 69,
267   UNW_PPC_CR2 = 70,
268   UNW_PPC_CR3 = 71,
269   UNW_PPC_CR4 = 72,
270   UNW_PPC_CR5 = 73,
271   UNW_PPC_CR6 = 74,
272   UNW_PPC_CR7 = 75,
273   UNW_PPC_XER = 76,
274   UNW_PPC_V0  = 77,
275   UNW_PPC_V1  = 78,
276   UNW_PPC_V2  = 79,
277   UNW_PPC_V3  = 80,
278   UNW_PPC_V4  = 81,
279   UNW_PPC_V5  = 82,
280   UNW_PPC_V6  = 83,
281   UNW_PPC_V7  = 84,
282   UNW_PPC_V8  = 85,
283   UNW_PPC_V9  = 86,
284   UNW_PPC_V10 = 87,
285   UNW_PPC_V11 = 88,
286   UNW_PPC_V12 = 89,
287   UNW_PPC_V13 = 90,
288   UNW_PPC_V14 = 91,
289   UNW_PPC_V15 = 92,
290   UNW_PPC_V16 = 93,
291   UNW_PPC_V17 = 94,
292   UNW_PPC_V18 = 95,
293   UNW_PPC_V19 = 96,
294   UNW_PPC_V20 = 97,
295   UNW_PPC_V21 = 98,
296   UNW_PPC_V22 = 99,
297   UNW_PPC_V23 = 100,
298   UNW_PPC_V24 = 101,
299   UNW_PPC_V25 = 102,
300   UNW_PPC_V26 = 103,
301   UNW_PPC_V27 = 104,
302   UNW_PPC_V28 = 105,
303   UNW_PPC_V29 = 106,
304   UNW_PPC_V30 = 107,
305   UNW_PPC_V31 = 108,
306   UNW_PPC_VRSAVE  = 109,
307   UNW_PPC_VSCR    = 110,
308   UNW_PPC_SPE_ACC = 111,
309   UNW_PPC_SPEFSCR = 112
310 };
311 
312 // 64-bit ARM64 registers
313 enum {
314   UNW_ARM64_X0  = 0,
315   UNW_ARM64_X1  = 1,
316   UNW_ARM64_X2  = 2,
317   UNW_ARM64_X3  = 3,
318   UNW_ARM64_X4  = 4,
319   UNW_ARM64_X5  = 5,
320   UNW_ARM64_X6  = 6,
321   UNW_ARM64_X7  = 7,
322   UNW_ARM64_X8  = 8,
323   UNW_ARM64_X9  = 9,
324   UNW_ARM64_X10 = 10,
325   UNW_ARM64_X11 = 11,
326   UNW_ARM64_X12 = 12,
327   UNW_ARM64_X13 = 13,
328   UNW_ARM64_X14 = 14,
329   UNW_ARM64_X15 = 15,
330   UNW_ARM64_X16 = 16,
331   UNW_ARM64_X17 = 17,
332   UNW_ARM64_X18 = 18,
333   UNW_ARM64_X19 = 19,
334   UNW_ARM64_X20 = 20,
335   UNW_ARM64_X21 = 21,
336   UNW_ARM64_X22 = 22,
337   UNW_ARM64_X23 = 23,
338   UNW_ARM64_X24 = 24,
339   UNW_ARM64_X25 = 25,
340   UNW_ARM64_X26 = 26,
341   UNW_ARM64_X27 = 27,
342   UNW_ARM64_X28 = 28,
343   UNW_ARM64_X29 = 29,
344   UNW_ARM64_FP  = 29,
345   UNW_ARM64_X30 = 30,
346   UNW_ARM64_LR  = 30,
347   UNW_ARM64_X31 = 31,
348   UNW_ARM64_SP  = 31,
349   // reserved block
350   UNW_ARM64_D0  = 64,
351   UNW_ARM64_D1  = 65,
352   UNW_ARM64_D2  = 66,
353   UNW_ARM64_D3  = 67,
354   UNW_ARM64_D4  = 68,
355   UNW_ARM64_D5  = 69,
356   UNW_ARM64_D6  = 70,
357   UNW_ARM64_D7  = 71,
358   UNW_ARM64_D8  = 72,
359   UNW_ARM64_D9  = 73,
360   UNW_ARM64_D10 = 74,
361   UNW_ARM64_D11 = 75,
362   UNW_ARM64_D12 = 76,
363   UNW_ARM64_D13 = 77,
364   UNW_ARM64_D14 = 78,
365   UNW_ARM64_D15 = 79,
366   UNW_ARM64_D16 = 80,
367   UNW_ARM64_D17 = 81,
368   UNW_ARM64_D18 = 82,
369   UNW_ARM64_D19 = 83,
370   UNW_ARM64_D20 = 84,
371   UNW_ARM64_D21 = 85,
372   UNW_ARM64_D22 = 86,
373   UNW_ARM64_D23 = 87,
374   UNW_ARM64_D24 = 88,
375   UNW_ARM64_D25 = 89,
376   UNW_ARM64_D26 = 90,
377   UNW_ARM64_D27 = 91,
378   UNW_ARM64_D28 = 92,
379   UNW_ARM64_D29 = 93,
380   UNW_ARM64_D30 = 94,
381   UNW_ARM64_D31 = 95,
382 };
383 
384 // 32-bit ARM registers. Numbers match DWARF for ARM spec #3.1 Table 1.
385 // Naming scheme uses recommendations given in Note 4 for VFP-v2 and VFP-v3.
386 // In this scheme, even though the 64-bit floating point registers D0-D31
387 // overlap physically with the 32-bit floating pointer registers S0-S31,
388 // they are given a non-overlapping range of register numbers.
389 //
390 // Commented out ranges are not preserved during unwinding.
391 enum {
392   UNW_ARM_R0  = 0,
393   UNW_ARM_R1  = 1,
394   UNW_ARM_R2  = 2,
395   UNW_ARM_R3  = 3,
396   UNW_ARM_R4  = 4,
397   UNW_ARM_R5  = 5,
398   UNW_ARM_R6  = 6,
399   UNW_ARM_R7  = 7,
400   UNW_ARM_R8  = 8,
401   UNW_ARM_R9  = 9,
402   UNW_ARM_R10 = 10,
403   UNW_ARM_R11 = 11,
404   UNW_ARM_R12 = 12,
405   UNW_ARM_SP  = 13,  // Logical alias for UNW_REG_SP
406   UNW_ARM_R13 = 13,
407   UNW_ARM_LR  = 14,
408   UNW_ARM_R14 = 14,
409   UNW_ARM_IP  = 15,  // Logical alias for UNW_REG_IP
410   UNW_ARM_R15 = 15,
411   // 16-63 -- OBSOLETE. Used in VFP1 to represent both S0-S31 and D0-D31.
412   UNW_ARM_S0  = 64,
413   UNW_ARM_S1  = 65,
414   UNW_ARM_S2  = 66,
415   UNW_ARM_S3  = 67,
416   UNW_ARM_S4  = 68,
417   UNW_ARM_S5  = 69,
418   UNW_ARM_S6  = 70,
419   UNW_ARM_S7  = 71,
420   UNW_ARM_S8  = 72,
421   UNW_ARM_S9  = 73,
422   UNW_ARM_S10 = 74,
423   UNW_ARM_S11 = 75,
424   UNW_ARM_S12 = 76,
425   UNW_ARM_S13 = 77,
426   UNW_ARM_S14 = 78,
427   UNW_ARM_S15 = 79,
428   UNW_ARM_S16 = 80,
429   UNW_ARM_S17 = 81,
430   UNW_ARM_S18 = 82,
431   UNW_ARM_S19 = 83,
432   UNW_ARM_S20 = 84,
433   UNW_ARM_S21 = 85,
434   UNW_ARM_S22 = 86,
435   UNW_ARM_S23 = 87,
436   UNW_ARM_S24 = 88,
437   UNW_ARM_S25 = 89,
438   UNW_ARM_S26 = 90,
439   UNW_ARM_S27 = 91,
440   UNW_ARM_S28 = 92,
441   UNW_ARM_S29 = 93,
442   UNW_ARM_S30 = 94,
443   UNW_ARM_S31 = 95,
444   //  96-103 -- OBSOLETE. F0-F7. Used by the FPA system. Superseded by VFP.
445   // 104-111 -- wCGR0-wCGR7, ACC0-ACC7 (Intel wireless MMX)
446   UNW_ARM_WR0 = 112,
447   UNW_ARM_WR1 = 113,
448   UNW_ARM_WR2 = 114,
449   UNW_ARM_WR3 = 115,
450   UNW_ARM_WR4 = 116,
451   UNW_ARM_WR5 = 117,
452   UNW_ARM_WR6 = 118,
453   UNW_ARM_WR7 = 119,
454   UNW_ARM_WR8 = 120,
455   UNW_ARM_WR9 = 121,
456   UNW_ARM_WR10 = 122,
457   UNW_ARM_WR11 = 123,
458   UNW_ARM_WR12 = 124,
459   UNW_ARM_WR13 = 125,
460   UNW_ARM_WR14 = 126,
461   UNW_ARM_WR15 = 127,
462   // 128-133 -- SPSR, SPSR_{FIQ|IRQ|ABT|UND|SVC}
463   // 134-143 -- Reserved
464   // 144-150 -- R8_USR-R14_USR
465   // 151-157 -- R8_FIQ-R14_FIQ
466   // 158-159 -- R13_IRQ-R14_IRQ
467   // 160-161 -- R13_ABT-R14_ABT
468   // 162-163 -- R13_UND-R14_UND
469   // 164-165 -- R13_SVC-R14_SVC
470   // 166-191 -- Reserved
471   UNW_ARM_WC0 = 192,
472   UNW_ARM_WC1 = 193,
473   UNW_ARM_WC2 = 194,
474   UNW_ARM_WC3 = 195,
475   // 196-199 -- wC4-wC7 (Intel wireless MMX control)
476   // 200-255 -- Reserved
477   UNW_ARM_D0  = 256,
478   UNW_ARM_D1  = 257,
479   UNW_ARM_D2  = 258,
480   UNW_ARM_D3  = 259,
481   UNW_ARM_D4  = 260,
482   UNW_ARM_D5  = 261,
483   UNW_ARM_D6  = 262,
484   UNW_ARM_D7  = 263,
485   UNW_ARM_D8  = 264,
486   UNW_ARM_D9  = 265,
487   UNW_ARM_D10 = 266,
488   UNW_ARM_D11 = 267,
489   UNW_ARM_D12 = 268,
490   UNW_ARM_D13 = 269,
491   UNW_ARM_D14 = 270,
492   UNW_ARM_D15 = 271,
493   UNW_ARM_D16 = 272,
494   UNW_ARM_D17 = 273,
495   UNW_ARM_D18 = 274,
496   UNW_ARM_D19 = 275,
497   UNW_ARM_D20 = 276,
498   UNW_ARM_D21 = 277,
499   UNW_ARM_D22 = 278,
500   UNW_ARM_D23 = 279,
501   UNW_ARM_D24 = 280,
502   UNW_ARM_D25 = 281,
503   UNW_ARM_D26 = 282,
504   UNW_ARM_D27 = 283,
505   UNW_ARM_D28 = 284,
506   UNW_ARM_D29 = 285,
507   UNW_ARM_D30 = 286,
508   UNW_ARM_D31 = 287,
509   // 288-319 -- Reserved for VFP/Neon
510   // 320-8191 -- Reserved
511   // 8192-16383 -- Unspecified vendor co-processor register.
512 };
513 
514 // OpenRISC1000 register numbers
515 enum {
516   UNW_OR1K_R0  = 0,
517   UNW_OR1K_R1  = 1,
518   UNW_OR1K_R2  = 2,
519   UNW_OR1K_R3  = 3,
520   UNW_OR1K_R4  = 4,
521   UNW_OR1K_R5  = 5,
522   UNW_OR1K_R6  = 6,
523   UNW_OR1K_R7  = 7,
524   UNW_OR1K_R8  = 8,
525   UNW_OR1K_R9  = 9,
526   UNW_OR1K_R10 = 10,
527   UNW_OR1K_R11 = 11,
528   UNW_OR1K_R12 = 12,
529   UNW_OR1K_R13 = 13,
530   UNW_OR1K_R14 = 14,
531   UNW_OR1K_R15 = 15,
532   UNW_OR1K_R16 = 16,
533   UNW_OR1K_R17 = 17,
534   UNW_OR1K_R18 = 18,
535   UNW_OR1K_R19 = 19,
536   UNW_OR1K_R20 = 20,
537   UNW_OR1K_R21 = 21,
538   UNW_OR1K_R22 = 22,
539   UNW_OR1K_R23 = 23,
540   UNW_OR1K_R24 = 24,
541   UNW_OR1K_R25 = 25,
542   UNW_OR1K_R26 = 26,
543   UNW_OR1K_R27 = 27,
544   UNW_OR1K_R28 = 28,
545   UNW_OR1K_R29 = 29,
546   UNW_OR1K_R30 = 30,
547   UNW_OR1K_R31 = 31,
548 };
549 
550 #endif
551