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1 /*
2  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
3  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
4  * Copyright (c) 2003-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
5  * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
6  * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
7  * Copyright (c) 2007-2008 Intel Corporation
8  * Copyright (c) 2008 Red Hat Inc.
9  * All rights reserved.
10  *
11  * Permission is hereby granted, free of charge, to any person obtaining a
12  * copy of this software and associated documentation files (the "Software"),
13  * to deal in the Software without restriction, including without limitation
14  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
15  * and/or sell copies of the Software, and to permit persons to whom the
16  * Software is furnished to do so, subject to the following conditions:
17  *
18  * The above copyright notice and this permission notice (including the next
19  * paragraph) shall be included in all copies or substantial portions of the
20  * Software.
21  *
22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
25  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
26  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
27  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
28  * OTHER DEALINGS IN THE SOFTWARE.
29  */
30 
31 #ifndef __VKI_LINUX_DRM_H
32 #define __VKI_LINUX_DRM_H
33 
34 //----------------------------------------------------------------------
35 // From include/drm/drm.h
36 //----------------------------------------------------------------------
37 
38 typedef unsigned int vki_drm_context_t;
39 typedef unsigned int vki_drm_drawable_t;
40 typedef unsigned int vki_drm_magic_t;
41 
42 struct vki_drm_clip_rect {
43 	unsigned short x1;
44 	unsigned short y1;
45 	unsigned short x2;
46 	unsigned short y2;
47 };
48 struct vki_drm_version {
49 	int version_major;	  /**< Major version */
50 	int version_minor;	  /**< Minor version */
51 	int version_patchlevel;	  /**< Patch level */
52 	vki_size_t name_len;	  /**< Length of name buffer */
53 	char __user *name;	  /**< Name of driver */
54 	vki_size_t date_len;	  /**< Length of date buffer */
55 	char __user *date;	  /**< User-space buffer to hold date */
56 	vki_size_t desc_len;	  /**< Length of desc buffer */
57 	char __user *desc;	  /**< User-space buffer to hold desc */
58 };
59 struct vki_drm_unique {
60 	vki_size_t unique_len;	  /**< Length of unique */
61 	char __user *unique;	  /**< Unique name for driver instantiation */
62 };
63 struct vki_drm_block {
64 	int unused;
65 };
66 struct vki_drm_control {
67 	enum {
68 		VKI_DRM_ADD_COMMAND,
69 		VKI_DRM_RM_COMMAND,
70 		VKI_DRM_INST_HANDLER,
71 		VKI_DRM_UNINST_HANDLER
72 	} func;
73 	int irq;
74 };
75 
76 enum vki_drm_map_type {
77 	_VKI_DRM_FRAME_BUFFER = 0,	  /**< WC (no caching), no core dump */
78 	_VKI_DRM_REGISTERS = 1,	  /**< no caching, no core dump */
79 	_VKI_DRM_SHM = 2,		  /**< shared, cached */
80 	_VKI_DRM_AGP = 3,		  /**< AGP/GART */
81 	_VKI_DRM_SCATTER_GATHER = 4,  /**< Scatter/gather memory for PCI DMA */
82 	_VKI_DRM_CONSISTENT = 5,	  /**< Consistent memory for PCI DMA */
83 	_VKI_DRM_GEM = 6,		  /**< GEM object */
84 };
85 enum vki_drm_map_flags {
86 	_VKI_DRM_RESTRICTED = 0x01,	     /**< Cannot be mapped to user-virtual */
87 	_VKI_DRM_READ_ONLY = 0x02,
88 	_VKI_DRM_LOCKED = 0x04,	     /**< shared, cached, locked */
89 	_VKI_DRM_KERNEL = 0x08,	     /**< kernel requires access */
90 	_VKI_DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
91 	_VKI_DRM_CONTAINS_LOCK = 0x20,   /**< SHM page that contains lock */
92 	_VKI_DRM_REMOVABLE = 0x40,	     /**< Removable mapping */
93 	_VKI_DRM_DRIVER = 0x80	     /**< Managed by driver */
94 };
95 struct vki_drm_ctx_priv_map {
96 	unsigned int ctx_id;	 /**< Context requesting private mapping */
97 	void *handle;		 /**< Handle of map */
98 };
99 struct vki_drm_map {
100 	unsigned long offset;	 /**< Requested physical address (0 for SAREA)*/
101 	unsigned long size;	 /**< Requested physical size (bytes) */
102 	enum vki_drm_map_type type;	 /**< Type of memory to map */
103 	enum vki_drm_map_flags flags;	 /**< Flags */
104 	void *handle;		 /**< User-space: "Handle" to pass to mmap() */
105 				 /**< Kernel-space: kernel-virtual address */
106 	int mtrr;		 /**< MTRR slot used */
107 	/*   Private data */
108 };
109 struct vki_drm_client {
110 	int idx;		/**< Which client desired? */
111 	int auth;		/**< Is client authenticated? */
112 	unsigned long pid;	/**< Process ID */
113 	unsigned long uid;	/**< User ID */
114 	unsigned long magic;	/**< Magic */
115 	unsigned long iocs;	/**< Ioctl count */
116 };
117 enum vki_drm_stat_type {
118 	_VKI_DRM_STAT_LOCK,
119 	_VKI_DRM_STAT_OPENS,
120 	_VKI_DRM_STAT_CLOSES,
121 	_VKI_DRM_STAT_IOCTLS,
122 	_VKI_DRM_STAT_LOCKS,
123 	_VKI_DRM_STAT_UNLOCKS,
124 	_VKI_DRM_STAT_VALUE,	/**< Generic value */
125 	_VKI_DRM_STAT_BYTE,		/**< Generic byte counter (1024bytes/K) */
126 	_VKI_DRM_STAT_COUNT,	/**< Generic non-byte counter (1000/k) */
127 
128 	_VKI_DRM_STAT_IRQ,		/**< IRQ */
129 	_VKI_DRM_STAT_PRIMARY,	/**< Primary DMA bytes */
130 	_VKI_DRM_STAT_SECONDARY,	/**< Secondary DMA bytes */
131 	_VKI_DRM_STAT_DMA,		/**< DMA */
132 	_VKI_DRM_STAT_SPECIAL,	/**< Special DMA (e.g., priority or polled) */
133 	_VKI_DRM_STAT_MISSED	/**< Missed DMA opportunity */
134 	    /* Add to the *END* of the list */
135 };
136 struct vki_drm_stats {
137 	unsigned long count;
138 	struct {
139 		unsigned long value;
140 		enum vki_drm_stat_type type;
141 	} data[15];
142 };
143 enum vki_drm_lock_flags {
144 	_VKI_DRM_LOCK_READY = 0x01,	     /**< Wait until hardware is ready for DMA */
145 	_VKI_DRM_LOCK_QUIESCENT = 0x02,  /**< Wait until hardware quiescent */
146 	_VKI_DRM_LOCK_FLUSH = 0x04,	     /**< Flush this context's DMA queue first */
147 	_VKI_DRM_LOCK_FLUSH_ALL = 0x08,  /**< Flush all DMA queues first */
148 	/* These *HALT* flags aren't supported yet
149 	   -- they will be used to support the
150 	   full-screen DGA-like mode. */
151 	_VKI_DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
152 	_VKI_DRM_HALT_CUR_QUEUES = 0x20  /**< Halt all current queues */
153 };
154 struct vki_drm_lock {
155 	int context;
156 	enum vki_drm_lock_flags flags;
157 };
158 enum vki_drm_dma_flags {
159 	/* Flags for DMA buffer dispatch */
160 	_VKI_DRM_DMA_BLOCK = 0x01,	      /**<
161 				       * Block until buffer dispatched.
162 				       *
163 				       * \note The buffer may not yet have
164 				       * been processed by the hardware --
165 				       * getting a hardware lock with the
166 				       * hardware quiescent will ensure
167 				       * that the buffer has been
168 				       * processed.
169 				       */
170 	_VKI_DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
171 	_VKI_DRM_DMA_PRIORITY = 0x04,     /**< High priority dispatch */
172 
173 	/* Flags for DMA buffer request */
174 	_VKI_DRM_DMA_WAIT = 0x10,	      /**< Wait for free buffers */
175 	_VKI_DRM_DMA_SMALLER_OK = 0x20,   /**< Smaller-than-requested buffers OK */
176 	_VKI_DRM_DMA_LARGER_OK = 0x40     /**< Larger-than-requested buffers OK */
177 };
178 struct vki_drm_buf_desc {
179 	int count;		 /**< Number of buffers of this size */
180 	int size;		 /**< Size in bytes */
181 	int low_mark;		 /**< Low water mark */
182 	int high_mark;		 /**< High water mark */
183 	enum {
184 		_VKI_DRM_PAGE_ALIGN = 0x01,	/**< Align on page boundaries for DMA */
185 		_VKI_DRM_AGP_BUFFER = 0x02,	/**< Buffer is in AGP space */
186 		_VKI_DRM_SG_BUFFER = 0x04,	/**< Scatter/gather memory buffer */
187 		_VKI_DRM_FB_BUFFER = 0x08,	/**< Buffer is in frame buffer */
188 		_VKI_DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
189 	} flags;
190 	unsigned long agp_start; /**<
191 				  * Start address of where the AGP buffers are
192 				  * in the AGP aperture
193 				  */
194 };
195 struct vki_drm_buf_info {
196 	int count;		/**< Entries in list */
197 	struct vki_drm_buf_desc __user *list;
198 };
199 struct vki_drm_buf_free {
200 	int count;
201 	int __user *list;
202 };
203 
204 struct vki_drm_buf_pub {
205 	int idx;		       /**< Index into the master buffer list */
206 	int total;		       /**< Buffer size */
207 	int used;		       /**< Amount of buffer in use (for DMA) */
208 	void __user *address;	       /**< Address of buffer */
209 };
210 struct vki_drm_buf_map {
211 	int count;		/**< Length of the buffer list */
212 	void __user *virtuaL;		/**< Mmap'd area in user-virtual */
213 	struct vki_drm_buf_pub __user *list;	/**< Buffer information */
214 };
215 struct vki_drm_dma {
216 	int context;			  /**< Context handle */
217 	int send_count;			  /**< Number of buffers to send */
218 	int __user *send_indices;	  /**< List of handles to buffers */
219 	int __user *send_sizes;		  /**< Lengths of data to send */
220 	enum vki_drm_dma_flags flags;	  /**< Flags */
221 	int request_count;		  /**< Number of buffers requested */
222 	int request_size;		  /**< Desired size for buffers */
223 	int __user *request_indices;	  /**< Buffer information */
224 	int __user *request_sizes;
225 	int granted_count;		  /**< Number of buffers granted */
226 };
227 
228 enum vki_drm_ctx_flags {
229 	_VKI_DRM_CONTEXT_PRESERVED = 0x01,
230 	_VKI_DRM_CONTEXT_2DONLY = 0x02
231 };
232 struct vki_drm_ctx {
233 	vki_drm_context_t handle;
234 	enum vki_drm_ctx_flags flags;
235 };
236 struct vki_drm_ctx_res {
237 	int count;
238 	struct vki_drm_ctx __user *contexts;
239 };
240 struct vki_drm_draw {
241 	vki_drm_drawable_t handle;
242 };
243 typedef enum {
244 	VKI_DRM_DRAWABLE_CLIPRECTS,
245 } vki_drm_drawable_info_type_t;
246 struct vki_drm_update_draw {
247 	vki_drm_drawable_t handle;
248 	unsigned int type;
249 	unsigned int num;
250 	unsigned long long data;
251 };
252 struct vki_drm_auth {
253 	vki_drm_magic_t magic;
254 };
255 struct vki_drm_irq_busid {
256 	int irq;	/**< IRQ number */
257 	int busnum;	/**< bus number */
258 	int devnum;	/**< device number */
259 	int funcnum;	/**< function number */
260 };
261 enum vki_drm_vblank_seq_type {
262 	_VKI_DRM_VBLANK_ABSOLUTE = 0x0,	/**< Wait for specific vblank sequence number */
263 	_VKI_DRM_VBLANK_RELATIVE = 0x1,	/**< Wait for given number of vblanks */
264 	_VKI_DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
265 	_VKI_DRM_VBLANK_EVENT = 0x4000000,   /**< Send event instead of blocking */
266 	_VKI_DRM_VBLANK_FLIP = 0x8000000,   /**< Scheduled buffer swap should flip */
267 	_VKI_DRM_VBLANK_NEXTONMISS = 0x10000000,	/**< If missed, wait for next vblank */
268 	_VKI_DRM_VBLANK_SECONDARY = 0x20000000,	/**< Secondary display controller */
269 	_VKI_DRM_VBLANK_SIGNAL = 0x40000000	/**< Send signal instead of blocking, unsupported */
270 };
271 struct vki_drm_wait_vblank_request {
272 	enum vki_drm_vblank_seq_type type;
273 	unsigned int sequence;
274 	unsigned long signal;
275 };
276 struct vki_drm_wait_vblank_reply {
277 	enum vki_drm_vblank_seq_type type;
278 	unsigned int sequence;
279 	long tval_sec;
280 	long tval_usec;
281 };
282 union vki_drm_wait_vblank {
283 	struct vki_drm_wait_vblank_request request;
284 	struct vki_drm_wait_vblank_reply reply;
285 };
286 struct vki_drm_modeset_ctl {
287 	__vki_u32 crtc;
288 	__vki_u32 cmd;
289 };
290 struct vki_drm_agp_mode {
291 	unsigned long mode;	/**< AGP mode */
292 };
293 struct vki_drm_agp_buffer {
294 	unsigned long size;	/**< In bytes -- will round to page boundary */
295 	unsigned long handle;	/**< Used for binding / unbinding */
296 	unsigned long type;	/**< Type of memory to allocate */
297 	unsigned long physical;	/**< Physical used by i810 */
298 };
299 struct vki_drm_agp_binding {
300 	unsigned long handle;	/**< From drm_agp_buffer */
301 	unsigned long offset;	/**< In bytes -- will round to page boundary */
302 };
303 struct vki_drm_agp_info {
304 	int agp_version_major;
305 	int agp_version_minor;
306 	unsigned long mode;
307 	unsigned long aperture_base;	/* physical address */
308 	unsigned long aperture_size;	/* bytes */
309 	unsigned long memory_allowed;	/* bytes */
310 	unsigned long memory_used;
311 	unsigned short id_vendor;
312 	unsigned short id_device;
313 };
314 struct vki_drm_scatter_gather {
315 	unsigned long size;	/**< In bytes -- will round to page boundary */
316 	unsigned long handle;	/**< Used for mapping / unmapping */
317 };
318 
319 struct vki_drm_set_version {
320 	int drm_di_major;
321 	int drm_di_minor;
322 	int drm_dd_major;
323 	int drm_dd_minor;
324 };
325 struct vki_drm_gem_close {
326 	__vki_u32 handle;
327 	__vki_u32 pad;
328 };
329 struct vki_drm_gem_flink {
330 	__vki_u32 handle;
331 	__vki_u32 name;
332 };
333 struct vki_drm_gem_open {
334 	__vki_u32 name;
335 	__vki_u32 handle;
336 	__vki_u64 size;
337 };
338 
339 //----------------------------------------------------------------------
340 // From include/drm/drm_mode.h
341 //----------------------------------------------------------------------
342 
343 #define VKI_DRM_DISPLAY_MODE_LEN 32
344 #define VKI_DRM_PROP_NAME_LEN 32
345 struct vki_drm_mode_modeinfo {
346 	__vki_u32 clock;
347 	__vki_u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
348 	__vki_u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
349 
350 	__vki_u32 vrefresh; /* vertical refresh * 1000 */
351 
352 	__vki_u32 flags;
353 	__vki_u32 type;
354 	char name[VKI_DRM_DISPLAY_MODE_LEN];
355 };
356 struct vki_drm_mode_card_res {
357 	__vki_u64 fb_id_ptr;
358 	__vki_u64 crtc_id_ptr;
359 	__vki_u64 connector_id_ptr;
360 	__vki_u64 encoder_id_ptr;
361 	__vki_u32 count_fbs;
362 	__vki_u32 count_crtcs;
363 	__vki_u32 count_connectors;
364 	__vki_u32 count_encoders;
365 	__vki_u32 min_width, max_width;
366 	__vki_u32 min_height, max_height;
367 };
368 struct vki_drm_mode_crtc {
369 	__vki_u64 set_connectors_ptr;
370 	__vki_u32 count_connectors;
371 
372 	__vki_u32 crtc_id; /**< Id */
373 	__vki_u32 fb_id; /**< Id of framebuffer */
374 
375 	__vki_u32 x, y; /**< Position on the frameuffer */
376 
377 	__vki_u32 gamma_size;
378 	__vki_u32 mode_valid;
379 	struct vki_drm_mode_modeinfo mode;
380 };
381 struct vki_drm_mode_get_encoder {
382 	__vki_u32 encoder_id;
383 	__vki_u32 encoder_type;
384 
385 	__vki_u32 crtc_id; /**< Id of crtc */
386 
387 	__vki_u32 possible_crtcs;
388 	__vki_u32 possible_clones;
389 };
390 struct vki_drm_mode_get_property {
391 	__vki_u64 values_ptr; /* values and blob lengths */
392 	__vki_u64 enum_blob_ptr; /* enum and blob id ptrs */
393 
394 	__vki_u32 prop_id;
395 	__vki_u32 flags;
396 	char name[VKI_DRM_PROP_NAME_LEN];
397 
398 	__vki_u32 count_values;
399 	__vki_u32 count_enum_blobs;
400 };
401 struct vki_drm_mode_connector_set_property {
402 	__vki_u64 value;
403 	__vki_u32 prop_id;
404 	__vki_u32 connector_id;
405 };
406 struct vki_drm_mode_get_blob {
407 	__vki_u32 blob_id;
408 	__vki_u32 length;
409 	__vki_u64 data;
410 };
411 struct vki_drm_mode_fb_cmd {
412 	__vki_u32 fb_id;
413 	__vki_u32 width, height;
414 	__vki_u32 pitch;
415 	__vki_u32 bpp;
416 	__vki_u32 depth;
417 	/* driver specific handle */
418 	__vki_u32 handle;
419 };
420 struct vki_drm_mode_mode_cmd {
421 	__vki_u32 connector_id;
422 	struct vki_drm_mode_modeinfo mode;
423 };
424 struct vki_drm_mode_cursor {
425 	__vki_u32 flags;
426 	__vki_u32 crtc_id;
427 	__vki_s32 x;
428 	__vki_s32 y;
429 	__vki_u32 width;
430 	__vki_u32 height;
431 	/* driver specific handle */
432 	__vki_u32 handle;
433 };
434 struct vki_drm_mode_crtc_lut {
435 	__vki_u32 crtc_id;
436 	__vki_u32 gamma_size;
437 
438 	/* pointers to arrays */
439 	__vki_u64 red;
440 	__vki_u64 green;
441 	__vki_u64 blue;
442 };
443 
444 //----------------------------------------------------------------------
445 // From include/drm/drm.h
446 //----------------------------------------------------------------------
447 
448 #define VKI_DRM_IOCTL_BASE		'd'
449 
450 #define VKI_DRM_IO(nr)			_VKI_IO(VKI_DRM_IOCTL_BASE,nr)
451 #define VKI_DRM_IOR(nr,type)		_VKI_IOR(VKI_DRM_IOCTL_BASE,nr,type)
452 #define VKI_DRM_IOW(nr,type)		_VKI_IOW(VKI_DRM_IOCTL_BASE,nr,type)
453 #define VKI_DRM_IOWR(nr,type)		_VKI_IOWR(VKI_DRM_IOCTL_BASE,nr,type)
454 
455 
456 #define VKI_DRM_IOCTL_VERSION		VKI_DRM_IOWR(0x00, struct vki_drm_version)
457 #define VKI_DRM_IOCTL_GET_UNIQUE	VKI_DRM_IOWR(0x01, struct vki_drm_unique)
458 #define VKI_DRM_IOCTL_GET_MAGIC		VKI_DRM_IOR( 0x02, struct vki_drm_auth)
459 #define VKI_DRM_IOCTL_IRQ_BUSID		VKI_DRM_IOWR(0x03, struct vki_drm_irq_busid)
460 #define VKI_DRM_IOCTL_GET_MAP           VKI_DRM_IOWR(0x04, struct vki_drm_map)
461 #define VKI_DRM_IOCTL_GET_CLIENT        VKI_DRM_IOWR(0x05, struct vki_drm_client)
462 #define VKI_DRM_IOCTL_GET_STATS         VKI_DRM_IOR( 0x06, struct vki_drm_stats)
463 #define VKI_DRM_IOCTL_SET_VERSION	VKI_DRM_IOWR(0x07, struct vki_drm_set_version)
464 #define VKI_DRM_IOCTL_MODESET_CTL       VKI_DRM_IOW(0x08, struct vki_drm_modeset_ctl)
465 #define VKI_DRM_IOCTL_GEM_CLOSE		VKI_DRM_IOW (0x09, struct vki_drm_gem_close)
466 #define VKI_DRM_IOCTL_GEM_FLINK		VKI_DRM_IOWR(0x0a, struct vki_drm_gem_flink)
467 #define VKI_DRM_IOCTL_GEM_OPEN		VKI_DRM_IOWR(0x0b, struct vki_drm_gem_open)
468 
469 #define VKI_DRM_IOCTL_SET_UNIQUE	VKI_DRM_IOW( 0x10, struct vki_drm_unique)
470 #define VKI_DRM_IOCTL_AUTH_MAGIC	VKI_DRM_IOW( 0x11, struct vki_drm_auth)
471 #define VKI_DRM_IOCTL_BLOCK		VKI_DRM_IOWR(0x12, struct vki_drm_block)
472 #define VKI_DRM_IOCTL_UNBLOCK		VKI_DRM_IOWR(0x13, struct vki_drm_block)
473 #define VKI_DRM_IOCTL_CONTROL		VKI_DRM_IOW( 0x14, struct vki_drm_control)
474 #define VKI_DRM_IOCTL_ADD_MAP		VKI_DRM_IOWR(0x15, struct vki_drm_map)
475 #define VKI_DRM_IOCTL_ADD_BUFS		VKI_DRM_IOWR(0x16, struct vki_drm_buf_desc)
476 #define VKI_DRM_IOCTL_MARK_BUFS		VKI_DRM_IOW( 0x17, struct vki_drm_buf_desc)
477 #define VKI_DRM_IOCTL_INFO_BUFS		VKI_DRM_IOWR(0x18, struct vki_drm_buf_info)
478 #define VKI_DRM_IOCTL_MAP_BUFS		VKI_DRM_IOWR(0x19, struct vki_drm_buf_map)
479 #define VKI_DRM_IOCTL_FREE_BUFS		VKI_DRM_IOW( 0x1a, struct vki_drm_buf_free)
480 
481 #define VKI_DRM_IOCTL_RM_MAP		VKI_DRM_IOW( 0x1b, struct vki_drm_map)
482 
483 #define VKI_DRM_IOCTL_SET_SAREA_CTX	VKI_DRM_IOW( 0x1c, struct vki_drm_ctx_priv_map)
484 #define VKI_DRM_IOCTL_GET_SAREA_CTX 	VKI_DRM_IOWR(0x1d, struct vki_drm_ctx_priv_map)
485 
486 #define VKI_DRM_IOCTL_SET_MASTER        VKI_DRM_IO(0x1e)
487 #define VKI_DRM_IOCTL_DROP_MASTER       VKI_DRM_IO(0x1f)
488 
489 #define VKI_DRM_IOCTL_ADD_CTX		VKI_DRM_IOWR(0x20, struct vki_drm_ctx)
490 #define VKI_DRM_IOCTL_RM_CTX		VKI_DRM_IOWR(0x21, struct vki_drm_ctx)
491 #define VKI_DRM_IOCTL_MOD_CTX		VKI_DRM_IOW( 0x22, struct vki_drm_ctx)
492 #define VKI_DRM_IOCTL_GET_CTX		VKI_DRM_IOWR(0x23, struct vki_drm_ctx)
493 #define VKI_DRM_IOCTL_SWITCH_CTX	VKI_DRM_IOW( 0x24, struct vki_drm_ctx)
494 #define VKI_DRM_IOCTL_NEW_CTX		VKI_DRM_IOW( 0x25, struct vki_drm_ctx)
495 #define VKI_DRM_IOCTL_RES_CTX		VKI_DRM_IOWR(0x26, struct vki_drm_ctx_res)
496 #define VKI_DRM_IOCTL_ADD_DRAW		VKI_DRM_IOWR(0x27, struct vki_drm_draw)
497 #define VKI_DRM_IOCTL_RM_DRAW		VKI_DRM_IOWR(0x28, struct vki_drm_draw)
498 #define VKI_DRM_IOCTL_DMA		VKI_DRM_IOWR(0x29, struct vki_drm_dma)
499 #define VKI_DRM_IOCTL_LOCK		VKI_DRM_IOW( 0x2a, struct vki_drm_lock)
500 #define VKI_DRM_IOCTL_UNLOCK		VKI_DRM_IOW( 0x2b, struct vki_drm_lock)
501 #define VKI_DRM_IOCTL_FINISH		VKI_DRM_IOW( 0x2c, struct vki_drm_lock)
502 
503 #define VKI_DRM_IOCTL_AGP_ACQUIRE	VKI_DRM_IO(  0x30)
504 #define VKI_DRM_IOCTL_AGP_RELEASE	VKI_DRM_IO(  0x31)
505 #define VKI_DRM_IOCTL_AGP_ENABLE	VKI_DRM_IOW( 0x32, struct vki_drm_agp_mode)
506 #define VKI_DRM_IOCTL_AGP_INFO		VKI_DRM_IOR( 0x33, struct vki_drm_agp_info)
507 #define VKI_DRM_IOCTL_AGP_ALLOC		VKI_DRM_IOWR(0x34, struct vki_drm_agp_buffer)
508 #define VKI_DRM_IOCTL_AGP_FREE		VKI_DRM_IOW( 0x35, struct vki_drm_agp_buffer)
509 #define VKI_DRM_IOCTL_AGP_BIND		VKI_DRM_IOW( 0x36, struct vki_drm_agp_binding)
510 #define VKI_DRM_IOCTL_AGP_UNBIND	VKI_DRM_IOW( 0x37, struct vki_drm_agp_binding)
511 
512 #define VKI_DRM_IOCTL_SG_ALLOC		VKI_DRM_IOWR(0x38, struct vki_drm_scatter_gather)
513 #define VKI_DRM_IOCTL_SG_FREE		VKI_DRM_IOW( 0x39, struct vki_drm_scatter_gather)
514 
515 #define VKI_DRM_IOCTL_WAIT_VBLANK	VKI_DRM_IOWR(0x3a, union vki_drm_wait_vblank)
516 
517 #define VKI_DRM_IOCTL_UPDATE_DRAW	VKI_DRM_IOW(0x3f, struct vki_drm_update_draw)
518 
519 #define VKI_DRM_IOCTL_MODE_GETRESOURCES	VKI_DRM_IOWR(0xA0, struct vki_drm_mode_card_res)
520 #define VKI_DRM_IOCTL_MODE_GETCRTC	VKI_DRM_IOWR(0xA1, struct vki_drm_mode_crtc)
521 #define VKI_DRM_IOCTL_MODE_SETCRTC	VKI_DRM_IOWR(0xA2, struct vki_drm_mode_crtc)
522 #define VKI_DRM_IOCTL_MODE_CURSOR	VKI_DRM_IOWR(0xA3, struct vki_drm_mode_cursor)
523 #define VKI_DRM_IOCTL_MODE_GETGAMMA	VKI_DRM_IOWR(0xA4, struct vki_drm_mode_crtc_lut)
524 #define VKI_DRM_IOCTL_MODE_SETGAMMA	VKI_DRM_IOWR(0xA5, struct vki_drm_mode_crtc_lut)
525 #define VKI_DRM_IOCTL_MODE_GETENCODER	VKI_DRM_IOWR(0xA6, struct vki_drm_mode_get_encoder)
526 #define VKI_DRM_IOCTL_MODE_GETCONNECTOR	VKI_DRM_IOWR(0xA7, struct vki_drm_mode_get_connector)
527 #define VKI_DRM_IOCTL_MODE_ATTACHMODE	VKI_DRM_IOWR(0xA8, struct vki_drm_mode_mode_cmd)
528 #define VKI_DRM_IOCTL_MODE_DETACHMODE	VKI_DRM_IOWR(0xA9, struct vki_drm_mode_mode_cmd)
529 
530 #define VKI_DRM_IOCTL_MODE_GETPROPERTY	VKI_DRM_IOWR(0xAA, struct vki_drm_mode_get_property)
531 #define VKI_DRM_IOCTL_MODE_SETPROPERTY	VKI_DRM_IOWR(0xAB, struct vki_drm_mode_connector_set_property)
532 #define VKI_DRM_IOCTL_MODE_GETPROPBLOB	VKI_DRM_IOWR(0xAC, struct vki_drm_mode_get_blob)
533 #define VKI_DRM_IOCTL_MODE_GETFB	VKI_DRM_IOWR(0xAD, struct vki_drm_mode_fb_cmd)
534 #define VKI_DRM_IOCTL_MODE_ADDFB	VKI_DRM_IOWR(0xAE, struct vki_drm_mode_fb_cmd)
535 #define VKI_DRM_IOCTL_MODE_RMFB		VKI_DRM_IOWR(0xAF, unsigned int)
536 
537 #define VKI_DRM_COMMAND_BASE            0x40
538 #define VKI_DRM_COMMAND_END		0xA0
539 
540 //----------------------------------------------------------------------
541 // From include/drm/i915_drm.h
542 //----------------------------------------------------------------------
543 
544 typedef struct _vki_drm_i915_init {
545 	enum {
546 		VKI_I915_INIT_DMA = 0x01,
547 		VKI_I915_CLEANUP_DMA = 0x02,
548 		VKI_I915_RESUME_DMA = 0x03
549 	} func;
550 	unsigned int mmio_offset;
551 	int sarea_priv_offset;
552 	unsigned int ring_start;
553 	unsigned int ring_end;
554 	unsigned int ring_size;
555 	unsigned int front_offset;
556 	unsigned int back_offset;
557 	unsigned int depth_offset;
558 	unsigned int w;
559 	unsigned int h;
560 	unsigned int pitch;
561 	unsigned int pitch_bits;
562 	unsigned int back_pitch;
563 	unsigned int depth_pitch;
564 	unsigned int cpp;
565 	unsigned int chipset;
566 } vki_drm_i915_init_t;
567 
568 #define VKI_DRM_I915_INIT		    0x00
569 #define VKI_DRM_I915_FLUSH		    0x01
570 #define VKI_DRM_I915_FLIP		    0x02
571 #define VKI_DRM_I915_BATCHBUFFER	    0x03
572 #define VKI_DRM_I915_IRQ_EMIT		    0x04
573 #define VKI_DRM_I915_IRQ_WAIT		    0x05
574 #define VKI_DRM_I915_GETPARAM		    0x06
575 #define VKI_DRM_I915_SETPARAM		    0x07
576 #define VKI_DRM_I915_ALLOC		    0x08
577 #define VKI_DRM_I915_FREE		    0x09
578 #define VKI_DRM_I915_INIT_HEAP		    0x0a
579 #define VKI_DRM_I915_CMDBUFFER		    0x0b
580 #define VKI_DRM_I915_DESTROY_HEAP	    0x0c
581 #define VKI_DRM_I915_SET_VBLANK_PIPE	    0x0d
582 #define VKI_DRM_I915_GET_VBLANK_PIPE	    0x0e
583 #define VKI_DRM_I915_VBLANK_SWAP	    0x0f
584 #define VKI_DRM_I915_HWS_ADDR		    0x11
585 #define VKI_DRM_I915_GEM_INIT		    0x13
586 #define VKI_DRM_I915_GEM_EXECBUFFER	    0x14
587 #define VKI_DRM_I915_GEM_PIN		    0x15
588 #define VKI_DRM_I915_GEM_UNPIN		    0x16
589 #define VKI_DRM_I915_GEM_BUSY		    0x17
590 #define VKI_DRM_I915_GEM_THROTTLE	    0x18
591 #define VKI_DRM_I915_GEM_ENTERVT	    0x19
592 #define VKI_DRM_I915_GEM_LEAVEVT	    0x1a
593 #define VKI_DRM_I915_GEM_CREATE		    0x1b
594 #define VKI_DRM_I915_GEM_PREAD		    0x1c
595 #define VKI_DRM_I915_GEM_PWRITE		    0x1d
596 #define VKI_DRM_I915_GEM_MMAP		    0x1e
597 #define VKI_DRM_I915_GEM_SET_DOMAIN	    0x1f
598 #define VKI_DRM_I915_GEM_SW_FINISH	    0x20
599 #define VKI_DRM_I915_GEM_SET_TILING	    0x21
600 #define VKI_DRM_I915_GEM_GET_TILING	    0x22
601 #define VKI_DRM_I915_GEM_GET_APERTURE	    0x23
602 #define VKI_DRM_I915_GEM_MMAP_GTT	    0x24
603 #define VKI_DRM_I915_GET_PIPE_FROM_CRTC_ID  0x25
604 #define VKI_DRM_I915_GEM_MADVISE	    0x26
605 #define VKI_DRM_I915_OVERLAY_PUT_IMAGE	    0x27
606 #define VKI_DRM_I915_OVERLAY_ATTRS	    0x28
607 #define VKI_DRM_I915_GEM_EXECBUFFER2	    0x29
608 
609 #define VKI_DRM_IOCTL_I915_INIT			    VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_INIT, vki_drm_i915_init_t)
610 #define VKI_DRM_IOCTL_I915_FLUSH		    VKI_DRM_IO ( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_FLUSH)
611 #define VKI_DRM_IOCTL_I915_FLIP			    VKI_DRM_IO ( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_FLIP)
612 #define VKI_DRM_IOCTL_I915_BATCHBUFFER		    VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_BATCHBUFFER, vki_drm_i915_batchbuffer_t)
613 #define VKI_DRM_IOCTL_I915_IRQ_EMIT		    VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_IRQ_EMIT, vki_drm_i915_irq_emit_t)
614 #define VKI_DRM_IOCTL_I915_IRQ_WAIT		    VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_IRQ_WAIT, vki_drm_i915_irq_wait_t)
615 #define VKI_DRM_IOCTL_I915_GETPARAM		    VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GETPARAM, vki_drm_i915_getparam_t)
616 #define VKI_DRM_IOCTL_I915_SETPARAM		    VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_SETPARAM, vki_drm_i915_setparam_t)
617 #define VKI_DRM_IOCTL_I915_ALLOC		    VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_ALLOC, vki_drm_i915_mem_alloc_t)
618 #define VKI_DRM_IOCTL_I915_FREE			    VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_FREE, vki_drm_i915_mem_free_t)
619 #define VKI_DRM_IOCTL_I915_INIT_HEAP		    VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_INIT_HEAP, vki_drm_i915_mem_init_heap_t)
620 #define VKI_DRM_IOCTL_I915_CMDBUFFER		    VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_CMDBUFFER, vki_drm_i915_cmdbuffer_t)
621 #define VKI_DRM_IOCTL_I915_DESTROY_HEAP		    VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_DESTROY_HEAP, vki_drm_i915_mem_destroy_heap_t)
622 #define VKI_DRM_IOCTL_I915_SET_VBLANK_PIPE	    VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_SET_VBLANK_PIPE, vki_drm_i915_vblank_pipe_t)
623 #define VKI_DRM_IOCTL_I915_GET_VBLANK_PIPE	    VKI_DRM_IOR( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GET_VBLANK_PIPE, vki_drm_i915_vblank_pipe_t)
624 #define VKI_DRM_IOCTL_I915_VBLANK_SWAP		    VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_VBLANK_SWAP, vki_drm_i915_vblank_swap_t)
625 #define VKI_DRM_IOCTL_I915_GEM_INIT		    VKI_DRM_IOW(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_INIT, struct vki_drm_i915_gem_init)
626 #define VKI_DRM_IOCTL_I915_GEM_EXECBUFFER	    VKI_DRM_IOW(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_EXECBUFFER, struct vki_drm_i915_gem_execbuffer)
627 #define VKI_DRM_IOCTL_I915_GEM_PIN		    VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_PIN, struct vki_drm_i915_gem_pin)
628 #define VKI_DRM_IOCTL_I915_GEM_UNPIN		    VKI_DRM_IOW(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_UNPIN, struct vki_drm_i915_gem_unpin)
629 #define VKI_DRM_IOCTL_I915_GEM_BUSY		    VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_BUSY, struct vki_drm_i915_gem_busy)
630 #define VKI_DRM_IOCTL_I915_GEM_THROTTLE		    VKI_DRM_IO ( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_THROTTLE)
631 #define VKI_DRM_IOCTL_I915_GEM_ENTERVT		    VKI_DRM_IO(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_ENTERVT)
632 #define VKI_DRM_IOCTL_I915_GEM_LEAVEVT		    VKI_DRM_IO(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_LEAVEVT)
633 #define VKI_DRM_IOCTL_I915_GEM_CREATE		    VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_CREATE, struct vki_drm_i915_gem_create)
634 #define VKI_DRM_IOCTL_I915_GEM_PREAD		    VKI_DRM_IOW (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_PREAD, struct vki_drm_i915_gem_pread)
635 #define VKI_DRM_IOCTL_I915_GEM_PWRITE		    VKI_DRM_IOW (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_PWRITE, struct vki_drm_i915_gem_pwrite)
636 #define VKI_DRM_IOCTL_I915_GEM_MMAP		    VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_MMAP, struct vki_drm_i915_gem_mmap)
637 #define VKI_DRM_IOCTL_I915_GEM_MMAP_GTT		    VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_MMAP_GTT, struct vki_drm_i915_gem_mmap_gtt)
638 #define VKI_DRM_IOCTL_I915_GEM_SET_DOMAIN	    VKI_DRM_IOW (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_SET_DOMAIN, struct vki_drm_i915_gem_set_domain)
639 #define VKI_DRM_IOCTL_I915_GEM_SW_FINISH	    VKI_DRM_IOW (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_SW_FINISH, struct vki_drm_i915_gem_sw_finish)
640 #define VKI_DRM_IOCTL_I915_GEM_SET_TILING	    VKI_DRM_IOWR (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_SET_TILING, struct vki_drm_i915_gem_set_tiling)
641 #define VKI_DRM_IOCTL_I915_GEM_GET_TILING	    VKI_DRM_IOWR (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_GET_TILING, struct vki_drm_i915_gem_get_tiling)
642 #define VKI_DRM_IOCTL_I915_GEM_GET_APERTURE	    VKI_DRM_IOR  (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_GET_APERTURE, struct vki_drm_i915_gem_get_aperture)
643 #define VKI_DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID    VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GET_PIPE_FROM_CRTC_ID, struct vki_drm_intel_get_pipe_from_crtc_id)
644 
645 typedef struct vki_drm_i915_batchbuffer {
646 	int start;		/* agp offset */
647 	int used;		/* nr bytes in use */
648 	int DR1;		/* hw flags for GFX_OP_DRAWRECT_INFO */
649 	int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO */
650 	int num_cliprects;	/* mulitpass with multiple cliprects? */
651 	struct vki_drm_clip_rect __user *cliprects;	/* pointer to userspace cliprects */
652 } vki_drm_i915_batchbuffer_t;
653 typedef struct _vki_drm_i915_cmdbuffer {
654 	char __user *buf;	/* pointer to userspace command buffer */
655 	int sz;			/* nr bytes in buf */
656 	int DR1;		/* hw flags for GFX_OP_DRAWRECT_INFO */
657 	int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO */
658 	int num_cliprects;	/* mulitpass with multiple cliprects? */
659 	struct vki_drm_clip_rect __user *cliprects;	/* pointer to userspace cliprects */
660 } vki_drm_i915_cmdbuffer_t;
661 typedef struct vki_drm_i915_irq_emit {
662 	int __user *irq_seq;
663 } vki_drm_i915_irq_emit_t;
664 typedef struct vki_drm_i915_irq_wait {
665 	int irq_seq;
666 } vki_drm_i915_irq_wait_t;
667 typedef struct vki_drm_i915_getparam {
668 	int param;
669 	int __user *value;
670 } vki_drm_i915_getparam_t;
671 typedef struct vki_drm_i915_setparam {
672 	int param;
673 	int value;
674 } vki_drm_i915_setparam_t;
675 typedef struct vki_drm_i915_mem_alloc {
676 	int region;
677 	int alignment;
678 	int size;
679 	int __user *region_offset;	/* offset from start of fb or agp */
680 } vki_drm_i915_mem_alloc_t;
681 typedef struct vki_drm_i915_mem_free {
682 	int region;
683 	int region_offset;
684 } vki_drm_i915_mem_free_t;
685 typedef struct vki_drm_i915_mem_init_heap {
686 	int region;
687 	int size;
688 	int start;
689 } vki_drm_i915_mem_init_heap_t;
690 typedef struct vki_drm_i915_mem_destroy_heap {
691 	int region;
692 } vki_drm_i915_mem_destroy_heap_t;
693 typedef struct vki_drm_i915_vblank_pipe {
694 	int pipe;
695 } vki_drm_i915_vblank_pipe_t;
696 typedef struct vki_drm_i915_vblank_swap {
697 	vki_drm_drawable_t drawable;
698 	enum vki_drm_vblank_seq_type seqtype;
699 	unsigned int sequence;
700 } vki_drm_i915_vblank_swap_t;
701 typedef struct vki_drm_i915_hws_addr {
702 	__vki_u64 addr;
703 } vki_drm_i915_hws_addr_t;
704 struct vki_drm_i915_gem_init {
705 	__vki_u64 gtt_start;
706 	__vki_u64 gtt_end;
707 };
708 struct vki_drm_i915_gem_create {
709 	__vki_u64 size;
710 	__vki_u32 handle;
711 	__vki_u32 pad;
712 };
713 struct vki_drm_i915_gem_pread {
714 	__vki_u32 handle;
715 	__vki_u32 pad;
716 	__vki_u64 offset;
717 	__vki_u64 size;
718 	__vki_u64 data_ptr;
719 };
720 struct vki_drm_i915_gem_pwrite {
721 	__vki_u32 handle;
722 	__vki_u32 pad;
723 	__vki_u64 offset;
724 	__vki_u64 size;
725 	__vki_u64 data_ptr;
726 };
727 struct vki_drm_i915_gem_mmap {
728 	__vki_u32 handle;
729 	__vki_u32 pad;
730 	__vki_u64 offset;
731 	__vki_u64 size;
732 	__vki_u64 addr_ptr;
733 };
734 struct vki_drm_i915_gem_mmap_gtt {
735 	__vki_u32 handle;
736 	__vki_u32 pad;
737 	__vki_u64 offset;
738 };
739 struct vki_drm_i915_gem_set_domain {
740 	__vki_u32 handle;
741 	__vki_u32 read_domains;
742 	__vki_u32 write_domain;
743 };
744 struct vki_drm_i915_gem_sw_finish {
745 	__vki_u32 handle;
746 };
747 struct vki_drm_i915_gem_relocation_entry {
748 	__vki_u32 target_handle;
749 	__vki_u32 delta;
750 	__vki_u64 offset;
751 	__vki_u64 presumed_offset;
752 	__vki_u32 read_domains;
753 	__vki_u32 write_domain;
754 };
755 struct vki_drm_i915_gem_exec_object {
756 	__vki_u32 handle;
757 	__vki_u32 relocation_count;
758 	__vki_u64 relocs_ptr;
759 	__vki_u64 alignment;
760 	__vki_u64 offset;
761 };
762 struct vki_drm_i915_gem_execbuffer {
763 	__vki_u64 buffers_ptr;
764 	__vki_u32 buffer_count;
765 	__vki_u32 batch_start_offset;
766 	__vki_u32 batch_len;
767 	__vki_u32 DR1;
768 	__vki_u32 DR4;
769 	__vki_u32 num_cliprects;
770 	__vki_u64 cliprects_ptr;
771 };
772 struct vki_drm_i915_gem_pin {
773 	__vki_u32 handle;
774 	__vki_u32 pad;
775 	__vki_u64 alignment;
776 	__vki_u64 offset;
777 };
778 struct vki_drm_i915_gem_unpin {
779 	__vki_u32 handle;
780 	__vki_u32 pad;
781 };
782 struct vki_drm_i915_gem_busy {
783 	__vki_u32 handle;
784 	__vki_u32 busy;
785 };
786 struct vki_drm_i915_gem_set_tiling {
787 	__vki_u32 handle;
788 	__vki_u32 tiling_mode;
789 	__vki_u32 stride;
790 	__vki_u32 swizzle_mode;
791 };
792 struct vki_drm_i915_gem_get_tiling {
793 	__vki_u32 handle;
794 	__vki_u32 tiling_mode;
795 	__vki_u32 swizzle_mode;
796 };
797 struct vki_drm_i915_gem_get_aperture {
798 	__vki_u64 aper_size;
799 	__vki_u64 aper_available_size;
800 };
801 struct vki_drm_i915_get_pipe_from_crtc_id {
802 	__vki_u32 crtc_id;
803 	__vki_u32 pipe;
804 };
805 
806 #endif //__VKI_LINUX_DRM_H
807 
808 /*--------------------------------------------------------------------*/
809 /*--- end                                                          ---*/
810 /*--------------------------------------------------------------------*/
811