1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #ifndef SVGA_CONTEXT_H
27 #define SVGA_CONTEXT_H
28
29
30 #include "pipe/p_context.h"
31 #include "pipe/p_defines.h"
32 #include "pipe/p_state.h"
33
34 #include "os/os_time.h"
35
36 #include "util/u_blitter.h"
37 #include "util/list.h"
38
39 #include "tgsi/tgsi_scan.h"
40
41 #include "svga_screen.h"
42 #include "svga_state.h"
43 #include "svga_winsys.h"
44 #include "svga_hw_reg.h"
45 #include "svga3d_shaderdefs.h"
46
47
48 /** Non-GPU queries for gallium HUD */
49 enum svga_hud {
50 /* per-frame counters */
51 SVGA_QUERY_NUM_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC,
52 SVGA_QUERY_NUM_FALLBACKS,
53 SVGA_QUERY_NUM_FLUSHES,
54 SVGA_QUERY_NUM_VALIDATIONS,
55 SVGA_QUERY_MAP_BUFFER_TIME,
56 SVGA_QUERY_NUM_BUFFERS_MAPPED,
57 SVGA_QUERY_NUM_TEXTURES_MAPPED,
58 SVGA_QUERY_NUM_BYTES_UPLOADED,
59 SVGA_QUERY_COMMAND_BUFFER_SIZE,
60 SVGA_QUERY_FLUSH_TIME,
61 SVGA_QUERY_SURFACE_WRITE_FLUSHES,
62 SVGA_QUERY_NUM_READBACKS,
63 SVGA_QUERY_NUM_RESOURCE_UPDATES,
64 SVGA_QUERY_NUM_BUFFER_UPLOADS,
65 SVGA_QUERY_NUM_CONST_BUF_UPDATES,
66 SVGA_QUERY_NUM_CONST_UPDATES,
67
68 /* running total counters */
69 SVGA_QUERY_MEMORY_USED,
70 SVGA_QUERY_NUM_SHADERS,
71 SVGA_QUERY_NUM_RESOURCES,
72 SVGA_QUERY_NUM_STATE_OBJECTS,
73 SVGA_QUERY_NUM_SURFACE_VIEWS,
74 SVGA_QUERY_NUM_GENERATE_MIPMAP,
75
76 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
77 SVGA_QUERY_MAX
78 };
79
80 /**
81 * Maximum supported number of constant buffers per shader
82 */
83 #define SVGA_MAX_CONST_BUFS 14
84
85 /**
86 * Maximum constant buffer size that can be set in the
87 * DXSetSingleConstantBuffer command is
88 * DX10 constant buffer element count * 4 4-bytes components
89 */
90 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
91
92 #define CONST0_UPLOAD_ALIGNMENT 256
93
94 struct draw_vertex_shader;
95 struct draw_fragment_shader;
96 struct svga_shader_variant;
97 struct SVGACmdMemory;
98 struct util_bitmask;
99
100
101 struct svga_cache_context;
102 struct svga_tracked_state;
103
104 struct svga_blend_state {
105 unsigned need_white_fragments:1;
106 unsigned independent_blend_enable:1;
107 unsigned alpha_to_coverage:1;
108 unsigned blend_color_alpha:1; /**< set blend color to alpha value */
109
110 /** Per-render target state */
111 struct {
112 uint8_t writemask;
113
114 boolean blend_enable;
115 uint8_t srcblend;
116 uint8_t dstblend;
117 uint8_t blendeq;
118
119 boolean separate_alpha_blend_enable;
120 uint8_t srcblend_alpha;
121 uint8_t dstblend_alpha;
122 uint8_t blendeq_alpha;
123 } rt[PIPE_MAX_COLOR_BUFS];
124
125 SVGA3dBlendStateId id; /**< vgpu10 */
126 };
127
128 struct svga_depth_stencil_state {
129 unsigned zfunc:8;
130 unsigned zenable:1;
131 unsigned zwriteenable:1;
132
133 unsigned alphatestenable:1;
134 unsigned alphafunc:8;
135
136 struct {
137 unsigned enabled:1;
138 unsigned func:8;
139 unsigned fail:8;
140 unsigned zfail:8;
141 unsigned pass:8;
142 } stencil[2];
143
144 /* SVGA3D has one ref/mask/writemask triple shared between front &
145 * back face stencil. We really need two:
146 */
147 unsigned stencil_mask:8;
148 unsigned stencil_writemask:8;
149
150 float alpharef;
151
152 SVGA3dDepthStencilStateId id; /**< vgpu10 */
153 };
154
155 #define SVGA_UNFILLED_DISABLE 0
156 #define SVGA_UNFILLED_LINE 1
157 #define SVGA_UNFILLED_POINT 2
158
159 #define SVGA_PIPELINE_FLAG_POINTS (1<<PIPE_PRIM_POINTS)
160 #define SVGA_PIPELINE_FLAG_LINES (1<<PIPE_PRIM_LINES)
161 #define SVGA_PIPELINE_FLAG_TRIS (1<<PIPE_PRIM_TRIANGLES)
162
163 struct svga_rasterizer_state {
164 struct pipe_rasterizer_state templ; /* needed for draw module */
165
166 unsigned shademode:8;
167 unsigned cullmode:8;
168 unsigned scissortestenable:1;
169 unsigned multisampleantialias:1;
170 unsigned antialiasedlineenable:1;
171 unsigned lastpixel:1;
172 unsigned pointsprite:1;
173
174 unsigned linepattern;
175
176 float slopescaledepthbias;
177 float depthbias;
178 float pointsize;
179 float linewidth;
180
181 unsigned hw_fillmode:2; /* PIPE_POLYGON_MODE_x */
182
183 /** Which prims do we need help for? Bitmask of (1 << PIPE_PRIM_x) flags */
184 unsigned need_pipeline:16;
185
186 SVGA3dRasterizerStateId id; /**< vgpu10 */
187
188 /** For debugging: */
189 const char* need_pipeline_tris_str;
190 const char* need_pipeline_lines_str;
191 const char* need_pipeline_points_str;
192 };
193
194 struct svga_sampler_state {
195 unsigned mipfilter;
196 unsigned magfilter;
197 unsigned minfilter;
198 unsigned aniso_level;
199 float lod_bias;
200 unsigned addressu;
201 unsigned addressv;
202 unsigned addressw;
203 unsigned bordercolor;
204 unsigned normalized_coords:1;
205 unsigned compare_mode:1;
206 unsigned compare_func:3;
207
208 unsigned min_lod;
209 unsigned view_min_lod;
210 unsigned view_max_lod;
211
212 SVGA3dSamplerId id;
213 };
214
215
216 struct svga_pipe_sampler_view
217 {
218 struct pipe_sampler_view base;
219
220 SVGA3dShaderResourceViewId id;
221 };
222
223
224 static inline struct svga_pipe_sampler_view *
svga_pipe_sampler_view(struct pipe_sampler_view * v)225 svga_pipe_sampler_view(struct pipe_sampler_view *v)
226 {
227 return (struct svga_pipe_sampler_view *) v;
228 }
229
230
231 struct svga_velems_state {
232 unsigned count;
233 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
234 SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
235
236 /** Bitmasks indicating which attributes need format conversion */
237 unsigned adjust_attrib_range; /**< range adjustment */
238 unsigned attrib_is_pure_int; /**< pure int */
239 unsigned adjust_attrib_w_1; /**< set w = 1 */
240 unsigned adjust_attrib_itof; /**< int->float */
241 unsigned adjust_attrib_utof; /**< uint->float */
242 unsigned attrib_is_bgra; /**< R / B swizzling */
243 unsigned attrib_puint_to_snorm; /**< 10_10_10_2 packed uint -> snorm */
244 unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
245 unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
246
247 boolean need_swvfetch;
248
249 SVGA3dElementLayoutId id; /**< VGPU10 */
250 };
251
252 /* Use to calculate differences between state emitted to hardware and
253 * current driver-calculated state.
254 */
255 struct svga_state
256 {
257 const struct svga_blend_state *blend;
258 const struct svga_depth_stencil_state *depth;
259 const struct svga_rasterizer_state *rast;
260 const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
261 const struct svga_velems_state *velems;
262
263 struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
264 struct svga_fragment_shader *fs;
265 struct svga_vertex_shader *vs;
266 struct svga_geometry_shader *user_gs; /* user-specified GS */
267 struct svga_geometry_shader *gs; /* derived GS */
268
269 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
270 struct pipe_index_buffer ib;
271 /** Constant buffers for each shader.
272 * The size should probably always match with that of
273 * svga_shader_emitter_v10.num_shader_consts.
274 */
275 struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
276
277 struct pipe_framebuffer_state framebuffer;
278 float depthscale;
279
280 /* Hack to limit the number of different render targets between
281 * flushes. Helps avoid blowing out our surface cache in EXA.
282 */
283 int nr_fbs;
284
285 struct pipe_poly_stipple poly_stipple;
286 struct pipe_scissor_state scissor;
287 struct pipe_blend_color blend_color;
288 struct pipe_stencil_ref stencil_ref;
289 struct pipe_clip_state clip;
290 struct pipe_viewport_state viewport;
291
292 unsigned num_samplers[PIPE_SHADER_TYPES];
293 unsigned num_sampler_views[PIPE_SHADER_TYPES];
294 unsigned num_vertex_buffers;
295 unsigned reduced_prim;
296
297 struct {
298 unsigned flag_1d;
299 unsigned flag_srgb;
300 unsigned flag_rect; /* sampler views with rectangular texture target */
301 unsigned flag_buf; /* sampler views with texture buffer target */
302 } tex_flags;
303
304 unsigned sample_mask;
305 };
306
307 struct svga_prescale {
308 float translate[4];
309 float scale[4];
310 boolean enabled;
311 };
312
313
314 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
315 */
316 struct svga_hw_clear_state
317 {
318 SVGA3dRect viewport;
319
320 struct {
321 float zmin, zmax;
322 } depthrange;
323
324 struct pipe_framebuffer_state framebuffer;
325 struct svga_prescale prescale;
326 };
327
328 struct svga_hw_view_state
329 {
330 struct pipe_resource *texture;
331 struct svga_sampler_view *v;
332 unsigned min_lod;
333 unsigned max_lod;
334 boolean dirty;
335 };
336
337 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
338 */
339 struct svga_hw_draw_state
340 {
341 /** VGPU9 rasterization state */
342 unsigned rs[SVGA3D_RS_MAX];
343 /** VGPU9 texture sampler and bindings state */
344 unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
345 /** VGPU9 texture views */
346 unsigned num_views;
347 struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
348 /** VGPU9 constant buffer values */
349 float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
350
351 /** Currently bound shaders */
352 struct svga_shader_variant *fs;
353 struct svga_shader_variant *vs;
354 struct svga_shader_variant *gs;
355
356 /** Currently bound constant buffer, per shader stage */
357 struct pipe_resource *constbuf[PIPE_SHADER_TYPES];
358
359 /** Bitmask of enabled constant buffers */
360 unsigned enabled_constbufs[PIPE_SHADER_TYPES];
361
362 /**
363 * These are used to reduce the number of times we call u_upload_unmap()
364 * while updating the zero-th/default VGPU10 constant buffer.
365 */
366 struct pipe_resource *const0_buffer;
367 struct svga_winsys_surface *const0_handle;
368
369 /** VGPU10 HW state (used to prevent emitting redundant state) */
370 SVGA3dDepthStencilStateId depth_stencil_id;
371 unsigned stencil_ref;
372 SVGA3dBlendStateId blend_id;
373 float blend_factor[4];
374 unsigned blend_sample_mask;
375 SVGA3dRasterizerStateId rasterizer_id;
376 SVGA3dElementLayoutId layout_id;
377 SVGA3dPrimitiveType topology;
378
379 /** Vertex buffer state */
380 SVGA3dVertexBuffer vbuffer_attrs[PIPE_MAX_ATTRIBS];
381 struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS];
382 unsigned num_vbuffers;
383
384 struct pipe_resource *ib; /**< index buffer for drawing */
385 SVGA3dSurfaceFormat ib_format;
386 unsigned ib_offset;
387
388 unsigned num_samplers[PIPE_SHADER_TYPES];
389 SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
390
391 unsigned num_sampler_views[PIPE_SHADER_TYPES];
392 struct pipe_sampler_view
393 *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
394
395 unsigned num_rendertargets;
396 struct pipe_surface *rtv[SVGA3D_MAX_RENDER_TARGETS];
397 struct pipe_surface *dsv;
398
399 /* used for rebinding */
400 unsigned default_constbuf_size[PIPE_SHADER_TYPES];
401 };
402
403
404 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
405 */
406 struct svga_sw_state
407 {
408 /* which parts we need */
409 boolean need_swvfetch;
410 boolean need_pipeline;
411 boolean need_swtnl;
412
413 /* Flag to make sure that need sw is on while
414 * updating state within a swtnl call.
415 */
416 boolean in_swtnl_draw;
417 };
418
419
420 /* Queue some state updates (like rss) and submit them to hardware in
421 * a single packet.
422 */
423 struct svga_hw_queue;
424
425 struct svga_query;
426 struct svga_qmem_alloc_entry;
427
428 struct svga_context
429 {
430 struct pipe_context pipe;
431 struct svga_winsys_context *swc;
432 struct blitter_context *blitter;
433 struct u_upload_mgr *const0_upload;
434 struct u_upload_mgr *tex_upload;
435
436 struct {
437 boolean no_swtnl;
438 boolean force_swtnl;
439 boolean use_min_mipmap;
440
441 /* incremented for each shader */
442 unsigned shader_id;
443
444 boolean no_line_width;
445 boolean force_hw_line_stipple;
446
447 /** To report perf/conformance/etc issues to the state tracker */
448 struct pipe_debug_callback callback;
449 } debug;
450
451 struct {
452 struct draw_context *draw;
453 struct vbuf_render *backend;
454 unsigned hw_prim;
455 boolean new_vbuf;
456 boolean new_vdecl;
457 } swtnl;
458
459 /* Bitmask of blend state objects IDs */
460 struct util_bitmask *blend_object_id_bm;
461
462 /* Bitmask of depth/stencil state objects IDs */
463 struct util_bitmask *ds_object_id_bm;
464
465 /* Bitmaks of input element object IDs */
466 struct util_bitmask *input_element_object_id_bm;
467
468 /* Bitmask of rasterizer object IDs */
469 struct util_bitmask *rast_object_id_bm;
470
471 /* Bitmask of sampler state objects IDs */
472 struct util_bitmask *sampler_object_id_bm;
473
474 /* Bitmask of sampler view IDs */
475 struct util_bitmask *sampler_view_id_bm;
476
477 /* Bitmask of used shader IDs */
478 struct util_bitmask *shader_id_bm;
479
480 /* Bitmask of used surface view IDs */
481 struct util_bitmask *surface_view_id_bm;
482
483 /* Bitmask of used stream output IDs */
484 struct util_bitmask *stream_output_id_bm;
485
486 /* Bitmask of used query IDs */
487 struct util_bitmask *query_id_bm;
488
489 struct {
490 unsigned dirty[SVGA_STATE_MAX];
491
492 /** bitmasks of which const buffers are changed */
493 unsigned dirty_constbufs[PIPE_SHADER_TYPES];
494
495 unsigned texture_timestamp;
496
497 /*
498 */
499 struct svga_sw_state sw;
500 struct svga_hw_draw_state hw_draw;
501 struct svga_hw_clear_state hw_clear;
502 } state;
503
504 struct svga_state curr; /* state from the state tracker */
505 unsigned dirty; /* statechanges since last update_state() */
506
507 union {
508 struct {
509 unsigned rendertargets:1;
510 unsigned texture_samplers:1;
511 unsigned constbufs:1;
512 unsigned vs:1;
513 unsigned fs:1;
514 unsigned gs:1;
515 unsigned query:1;
516 } flags;
517 unsigned val;
518 } rebind;
519
520 struct svga_hwtnl *hwtnl;
521
522 /** Queries states */
523 struct svga_winsys_gb_query *gb_query; /**< gb query object, one per context */
524 unsigned gb_query_len; /**< gb query object size */
525 struct util_bitmask *gb_query_alloc_mask; /**< gb query object allocation mask */
526 struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
527 /**< query mem block mapping */
528 struct svga_query *sq[SVGA_QUERY_MAX]; /**< queries currently in progress */
529
530 /** List of buffers with queued transfers */
531 struct list_head dirty_buffers;
532
533 /** performance / info queries for HUD */
534 struct {
535 uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */
536 uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */
537 uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */
538 uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */
539 uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */
540 uint64_t num_buffers_mapped; /**< SVGA_QUERY_NUM_BUFFERS_MAPPED */
541 uint64_t num_textures_mapped; /**< SVGA_QUERY_NUM_TEXTURES_MAPPED */
542 uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
543 uint64_t flush_time; /**< SVGA_QUERY_FLUSH_TIME */
544 uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
545 uint64_t num_readbacks; /**< SVGA_QUERY_NUM_READBACKS */
546 uint64_t num_resource_updates; /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */
547 uint64_t num_buffer_uploads; /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */
548 uint64_t num_const_buf_updates; /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */
549 uint64_t num_const_updates; /**< SVGA_QUERY_NUM_CONST_UPDATES */
550 uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */
551
552 /** The following are summed for SVGA_QUERY_NUM_STATE_OBJECTS */
553 uint64_t num_blend_objects;
554 uint64_t num_depthstencil_objects;
555 uint64_t num_rasterizer_objects;
556 uint64_t num_sampler_objects;
557 uint64_t num_samplerview_objects;
558 uint64_t num_vertexelement_objects;
559
560 uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
561 uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
562 uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
563
564 boolean uses_time; /**< os_time_get() calls needed? */
565 } hud;
566
567 /** The currently bound stream output targets */
568 unsigned num_so_targets;
569 struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
570 struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
571 struct svga_stream_output *current_so;
572
573 /** A blend state with blending disabled, for falling back to when blending
574 * is illegal (e.g. an integer texture is bound)
575 */
576 struct svga_blend_state *noop_blend;
577
578 struct {
579 struct pipe_resource *texture;
580 struct svga_pipe_sampler_view *sampler_view;
581 void *sampler;
582 } polygon_stipple;
583
584 /** Alternate rasterizer states created for point sprite */
585 struct svga_rasterizer_state *rasterizer_no_cull[2];
586
587 /** Current conditional rendering predicate */
588 struct {
589 SVGA3dQueryId query_id;
590 boolean cond;
591 } pred;
592
593 boolean render_condition;
594 };
595
596 /* A flag for each state_tracker state object:
597 */
598 #define SVGA_NEW_BLEND 0x1
599 #define SVGA_NEW_DEPTH_STENCIL_ALPHA 0x2
600 #define SVGA_NEW_RAST 0x4
601 #define SVGA_NEW_SAMPLER 0x8
602 #define SVGA_NEW_TEXTURE 0x10
603 #define SVGA_NEW_VBUFFER 0x20
604 #define SVGA_NEW_VELEMENT 0x40
605 #define SVGA_NEW_FS 0x80
606 #define SVGA_NEW_VS 0x100
607 #define SVGA_NEW_FS_CONST_BUFFER 0x200
608 #define SVGA_NEW_VS_CONST_BUFFER 0x400
609 #define SVGA_NEW_FRAME_BUFFER 0x800
610 #define SVGA_NEW_STIPPLE 0x1000
611 #define SVGA_NEW_SCISSOR 0x2000
612 #define SVGA_NEW_BLEND_COLOR 0x4000
613 #define SVGA_NEW_CLIP 0x8000
614 #define SVGA_NEW_VIEWPORT 0x10000
615 #define SVGA_NEW_PRESCALE 0x20000
616 #define SVGA_NEW_REDUCED_PRIMITIVE 0x40000
617 #define SVGA_NEW_TEXTURE_BINDING 0x80000
618 #define SVGA_NEW_NEED_PIPELINE 0x100000
619 #define SVGA_NEW_NEED_SWVFETCH 0x200000
620 #define SVGA_NEW_NEED_SWTNL 0x400000
621 #define SVGA_NEW_FS_VARIANT 0x800000
622 #define SVGA_NEW_VS_VARIANT 0x1000000
623 #define SVGA_NEW_TEXTURE_FLAGS 0x4000000
624 #define SVGA_NEW_STENCIL_REF 0x8000000
625 #define SVGA_NEW_GS 0x10000000
626 #define SVGA_NEW_GS_CONST_BUFFER 0x20000000
627 #define SVGA_NEW_GS_VARIANT 0x40000000
628 #define SVGA_NEW_TEXTURE_CONSTS 0x80000000
629
630
631 void svga_init_state_functions( struct svga_context *svga );
632 void svga_init_flush_functions( struct svga_context *svga );
633 void svga_init_string_functions( struct svga_context *svga );
634 void svga_init_blit_functions(struct svga_context *svga);
635
636 void svga_init_blend_functions( struct svga_context *svga );
637 void svga_init_depth_stencil_functions( struct svga_context *svga );
638 void svga_init_misc_functions( struct svga_context *svga );
639 void svga_init_rasterizer_functions( struct svga_context *svga );
640 void svga_init_sampler_functions( struct svga_context *svga );
641 void svga_init_fs_functions( struct svga_context *svga );
642 void svga_init_vs_functions( struct svga_context *svga );
643 void svga_init_gs_functions( struct svga_context *svga );
644 void svga_init_vertex_functions( struct svga_context *svga );
645 void svga_init_constbuffer_functions( struct svga_context *svga );
646 void svga_init_draw_functions( struct svga_context *svga );
647 void svga_init_query_functions( struct svga_context *svga );
648 void svga_init_surface_functions(struct svga_context *svga);
649 void svga_init_stream_output_functions( struct svga_context *svga );
650 void svga_init_clear_functions( struct svga_context *svga );
651
652 void svga_cleanup_vertex_state( struct svga_context *svga );
653 void svga_cleanup_sampler_state( struct svga_context *svga );
654 void svga_cleanup_tss_binding( struct svga_context *svga );
655 void svga_cleanup_framebuffer( struct svga_context *svga );
656
657 void svga_context_flush( struct svga_context *svga,
658 struct pipe_fence_handle **pfence );
659
660 void svga_context_finish(struct svga_context *svga);
661
662 void svga_hwtnl_flush_retry( struct svga_context *svga );
663 void svga_hwtnl_flush_buffer( struct svga_context *svga,
664 struct pipe_resource *buffer );
665
666 void svga_surfaces_flush(struct svga_context *svga);
667
668 struct pipe_context *
669 svga_context_create(struct pipe_screen *screen,
670 void *priv, unsigned flags);
671
672
673 /***********************************************************************
674 * Inline conversion functions. These are better-typed than the
675 * macros used previously:
676 */
677 static inline struct svga_context *
svga_context(struct pipe_context * pipe)678 svga_context( struct pipe_context *pipe )
679 {
680 return (struct svga_context *)pipe;
681 }
682
683 static inline struct svga_winsys_screen *
svga_sws(struct svga_context * svga)684 svga_sws(struct svga_context *svga)
685 {
686 return svga_screen(svga->pipe.screen)->sws;
687 }
688
689 static inline boolean
svga_have_gb_objects(const struct svga_context * svga)690 svga_have_gb_objects(const struct svga_context *svga)
691 {
692 return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
693 }
694
695 static inline boolean
svga_have_gb_dma(const struct svga_context * svga)696 svga_have_gb_dma(const struct svga_context *svga)
697 {
698 return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
699 }
700
701 static inline boolean
svga_have_vgpu10(const struct svga_context * svga)702 svga_have_vgpu10(const struct svga_context *svga)
703 {
704 return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
705 }
706
707 static inline boolean
svga_need_to_rebind_resources(const struct svga_context * svga)708 svga_need_to_rebind_resources(const struct svga_context *svga)
709 {
710 return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
711 }
712
713 static inline boolean
svga_rects_equal(const SVGA3dRect * r1,const SVGA3dRect * r2)714 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
715 {
716 return memcmp(r1, r2, sizeof(*r1)) == 0;
717 }
718
719 /**
720 * If the Gallium HUD is enabled, this will return the current time.
721 * Otherwise, just return zero.
722 */
723 static inline int64_t
svga_get_time(struct svga_context * svga)724 svga_get_time(struct svga_context *svga)
725 {
726 return svga->hud.uses_time ? os_time_get() : 0;
727 }
728
729
730 #endif
731