1 /**********************************************************
2 * Copyright 2009-2015 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 /**
27 * @file
28 * Common definitions for the VMware SVGA winsys.
29 *
30 * @author Jose Fonseca <jfonseca@vmware.com>
31 */
32
33
34 #ifndef VMW_SCREEN_H_
35 #define VMW_SCREEN_H_
36
37
38 #include "pipe/p_compiler.h"
39 #include "pipe/p_state.h"
40
41 #include "svga_winsys.h"
42 #include "pipebuffer/pb_buffer_fenced.h"
43
44
45 #define VMW_GMR_POOL_SIZE (16*1024*1024)
46 #define VMW_QUERY_POOL_SIZE (8192)
47 #define VMW_DEBUG_FLUSH_STACK 10
48
49 /*
50 * Something big, but arbitrary. The kernel reports an error if it can't
51 * handle this, and the svga driver will resort to multiple partial
52 * uploads.
53 */
54 #define VMW_MAX_BUFFER_SIZE (512*1024*1024)
55
56 struct pb_manager;
57 struct vmw_region;
58
59 struct vmw_cap_3d {
60 boolean has_cap;
61 SVGA3dDevCapResult result;
62 };
63
64 struct vmw_winsys_screen
65 {
66 struct svga_winsys_screen base;
67
68 struct {
69 int drm_fd;
70 uint32_t hwversion;
71 uint32_t num_cap_3d;
72 struct vmw_cap_3d *cap_3d;
73 uint64_t max_mob_memory;
74 uint64_t max_surface_memory;
75 uint64_t max_texture_size;
76 boolean have_drm_2_6;
77 boolean have_drm_2_9;
78 uint32_t drm_execbuf_version;
79 } ioctl;
80
81 struct {
82 struct pb_manager *gmr;
83 struct pb_manager *gmr_mm;
84 struct pb_manager *gmr_fenced;
85 struct pb_manager *gmr_slab;
86 struct pb_manager *gmr_slab_fenced;
87 struct pb_manager *query_mm;
88 struct pb_manager *query_fenced;
89 struct pb_manager *mob_fenced;
90 struct pb_manager *mob_cache;
91 struct pb_manager *mob_shader_slab;
92 struct pb_manager *mob_shader_slab_fenced;
93 } pools;
94
95 struct pb_fence_ops *fence_ops;
96
97 /*
98 * Screen instances
99 */
100 dev_t device;
101 int open_count;
102 };
103
104
105 static inline struct vmw_winsys_screen *
vmw_winsys_screen(struct svga_winsys_screen * base)106 vmw_winsys_screen(struct svga_winsys_screen *base)
107 {
108 return (struct vmw_winsys_screen *)base;
109 }
110
111 /* */
112 uint32_t
113 vmw_region_size(struct vmw_region *region);
114
115 uint32
116 vmw_ioctl_context_create(struct vmw_winsys_screen *vws);
117
118 uint32
119 vmw_ioctl_extended_context_create(struct vmw_winsys_screen *vws,
120 boolean vgpu10);
121
122 void
123 vmw_ioctl_context_destroy(struct vmw_winsys_screen *vws,
124 uint32 cid);
125
126 uint32
127 vmw_ioctl_surface_create(struct vmw_winsys_screen *vws,
128 SVGA3dSurfaceFlags flags,
129 SVGA3dSurfaceFormat format,
130 unsigned usage,
131 SVGA3dSize size,
132 uint32 numFaces,
133 uint32 numMipLevels,
134 unsigned sampleCount);
135 uint32
136 vmw_ioctl_gb_surface_create(struct vmw_winsys_screen *vws,
137 SVGA3dSurfaceFlags flags,
138 SVGA3dSurfaceFormat format,
139 unsigned usage,
140 SVGA3dSize size,
141 uint32 numFaces,
142 uint32 numMipLevels,
143 unsigned sampleCount,
144 uint32 buffer_handle,
145 struct vmw_region **p_region);
146
147 int
148 vmw_ioctl_gb_surface_ref(struct vmw_winsys_screen *vws,
149 const struct winsys_handle *whandle,
150 SVGA3dSurfaceFlags *flags,
151 SVGA3dSurfaceFormat *format,
152 uint32_t *numMipLevels,
153 uint32_t *handle,
154 struct vmw_region **p_region);
155
156 void
157 vmw_ioctl_surface_destroy(struct vmw_winsys_screen *vws,
158 uint32 sid);
159
160 void
161 vmw_ioctl_command(struct vmw_winsys_screen *vws,
162 int32_t cid,
163 uint32_t throttle_us,
164 void *commands,
165 uint32_t size,
166 struct pipe_fence_handle **fence);
167
168 struct vmw_region *
169 vmw_ioctl_region_create(struct vmw_winsys_screen *vws, uint32_t size);
170
171 void
172 vmw_ioctl_region_destroy(struct vmw_region *region);
173
174 struct SVGAGuestPtr
175 vmw_ioctl_region_ptr(struct vmw_region *region);
176
177 void *
178 vmw_ioctl_region_map(struct vmw_region *region);
179 void
180 vmw_ioctl_region_unmap(struct vmw_region *region);
181
182
183 int
184 vmw_ioctl_fence_finish(struct vmw_winsys_screen *vws,
185 uint32_t handle, uint32_t flags);
186
187 int
188 vmw_ioctl_fence_signalled(struct vmw_winsys_screen *vws,
189 uint32_t handle, uint32_t flags);
190
191 void
192 vmw_ioctl_fence_unref(struct vmw_winsys_screen *vws,
193 uint32_t handle);
194
195 uint32
196 vmw_ioctl_shader_create(struct vmw_winsys_screen *vws,
197 SVGA3dShaderType type,
198 uint32 code_len);
199 void
200 vmw_ioctl_shader_destroy(struct vmw_winsys_screen *vws, uint32 shid);
201
202 int
203 vmw_ioctl_syncforcpu(struct vmw_region *region,
204 boolean dont_block,
205 boolean readonly,
206 boolean allow_cs);
207 void
208 vmw_ioctl_releasefromcpu(struct vmw_region *region,
209 boolean readonly,
210 boolean allow_cs);
211 /* Initialize parts of vmw_winsys_screen at startup:
212 */
213 boolean vmw_ioctl_init(struct vmw_winsys_screen *vws);
214 boolean vmw_pools_init(struct vmw_winsys_screen *vws);
215 boolean vmw_query_pools_init(struct vmw_winsys_screen *vws);
216 boolean vmw_mob_pools_init(struct vmw_winsys_screen *vws);
217 boolean vmw_winsys_screen_init_svga(struct vmw_winsys_screen *vws);
218
219 void vmw_ioctl_cleanup(struct vmw_winsys_screen *vws);
220 void vmw_pools_cleanup(struct vmw_winsys_screen *vws);
221
222 struct vmw_winsys_screen *vmw_winsys_create(int fd);
223 void vmw_winsys_destroy(struct vmw_winsys_screen *sws);
224 void vmw_winsys_screen_set_throttling(struct pipe_screen *screen,
225 uint32_t throttle_us);
226
227 struct pb_manager *
228 simple_fenced_bufmgr_create(struct pb_manager *provider,
229 struct pb_fence_ops *ops);
230 void
231 vmw_fences_signal(struct pb_fence_ops *fence_ops,
232 uint32_t signaled,
233 uint32_t emitted,
234 boolean has_emitted);
235
236 struct svga_winsys_gb_shader *
237 vmw_svga_winsys_shader_create(struct svga_winsys_screen *sws,
238 SVGA3dShaderType type,
239 const uint32 *bytecode,
240 uint32 bytecodeLen);
241 void
242 vmw_svga_winsys_shader_destroy(struct svga_winsys_screen *sws,
243 struct svga_winsys_gb_shader *shader);
244
245 #endif /* VMW_SCREEN_H_ */
246