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1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bitcode to native PowerPC.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
17 #include "PPC.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/JITCodeEmitter.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetOptions.h"
27 using namespace llvm;
28 
29 namespace {
30   class PPCCodeEmitter : public MachineFunctionPass {
31     TargetMachine &TM;
32     JITCodeEmitter &MCE;
33     MachineModuleInfo *MMI;
34 
getAnalysisUsage(AnalysisUsage & AU) const35     void getAnalysisUsage(AnalysisUsage &AU) const {
36       AU.addRequired<MachineModuleInfo>();
37       MachineFunctionPass::getAnalysisUsage(AU);
38     }
39 
40     static char ID;
41 
42     /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
43     /// its address in the function into this pointer.
44     void *MovePCtoLROffset;
45   public:
46 
PPCCodeEmitter(TargetMachine & tm,JITCodeEmitter & mce)47     PPCCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
48       : MachineFunctionPass(ID), TM(tm), MCE(mce) {}
49 
50     /// getBinaryCodeForInstr - This function, generated by the
51     /// CodeEmitterGenerator using TableGen, produces the binary encoding for
52     /// machine instructions.
53     unsigned getBinaryCodeForInstr(const MachineInstr &MI) const;
54 
55 
56     MachineRelocation GetRelocation(const MachineOperand &MO,
57                                     unsigned RelocID) const;
58 
59     /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
60     unsigned getMachineOpValue(const MachineInstr &MI,
61                                const MachineOperand &MO) const;
62 
63     unsigned get_crbitm_encoding(const MachineInstr &MI, unsigned OpNo) const;
64     unsigned getDirectBrEncoding(const MachineInstr &MI, unsigned OpNo) const;
65     unsigned getCondBrEncoding(const MachineInstr &MI, unsigned OpNo) const;
66 
67     unsigned getHA16Encoding(const MachineInstr &MI, unsigned OpNo) const;
68     unsigned getLO16Encoding(const MachineInstr &MI, unsigned OpNo) const;
69     unsigned getMemRIEncoding(const MachineInstr &MI, unsigned OpNo) const;
70     unsigned getMemRIXEncoding(const MachineInstr &MI, unsigned OpNo) const;
71 
getPassName() const72     const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
73 
74     /// runOnMachineFunction - emits the given MachineFunction to memory
75     ///
76     bool runOnMachineFunction(MachineFunction &MF);
77 
78     /// emitBasicBlock - emits the given MachineBasicBlock to memory
79     ///
80     void emitBasicBlock(MachineBasicBlock &MBB);
81   };
82 }
83 
84 char PPCCodeEmitter::ID = 0;
85 
86 /// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
87 /// to the specified MCE object.
createPPCJITCodeEmitterPass(PPCTargetMachine & TM,JITCodeEmitter & JCE)88 FunctionPass *llvm::createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
89                                                 JITCodeEmitter &JCE) {
90   return new PPCCodeEmitter(TM, JCE);
91 }
92 
runOnMachineFunction(MachineFunction & MF)93 bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
94   assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
95           MF.getTarget().getRelocationModel() != Reloc::Static) &&
96          "JIT relocation model must be set to static or default!");
97 
98   MMI = &getAnalysis<MachineModuleInfo>();
99   MCE.setModuleInfo(MMI);
100   do {
101     MovePCtoLROffset = 0;
102     MCE.startFunction(MF);
103     for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
104       emitBasicBlock(*BB);
105   } while (MCE.finishFunction(MF));
106 
107   return false;
108 }
109 
emitBasicBlock(MachineBasicBlock & MBB)110 void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
111   MCE.StartMachineBasicBlock(&MBB);
112 
113   for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
114     const MachineInstr &MI = *I;
115     MCE.processDebugLoc(MI.getDebugLoc(), true);
116     switch (MI.getOpcode()) {
117     default:
118       MCE.emitWordBE(getBinaryCodeForInstr(MI));
119       break;
120     case TargetOpcode::PROLOG_LABEL:
121     case TargetOpcode::EH_LABEL:
122       MCE.emitLabel(MI.getOperand(0).getMCSymbol());
123       break;
124     case TargetOpcode::IMPLICIT_DEF:
125     case TargetOpcode::KILL:
126       break; // pseudo opcode, no side effects
127     case PPC::MovePCtoLR:
128     case PPC::MovePCtoLR8:
129       assert(TM.getRelocationModel() == Reloc::PIC_);
130       MovePCtoLROffset = (void*)MCE.getCurrentPCValue();
131       MCE.emitWordBE(0x48000005);   // bl 1
132       break;
133     }
134     MCE.processDebugLoc(MI.getDebugLoc(), false);
135   }
136 }
137 
get_crbitm_encoding(const MachineInstr & MI,unsigned OpNo) const138 unsigned PPCCodeEmitter::get_crbitm_encoding(const MachineInstr &MI,
139                                              unsigned OpNo) const {
140   const MachineOperand &MO = MI.getOperand(OpNo);
141   assert((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
142          (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7));
143   return 0x80 >> getPPCRegisterNumbering(MO.getReg());
144 }
145 
GetRelocation(const MachineOperand & MO,unsigned RelocID) const146 MachineRelocation PPCCodeEmitter::GetRelocation(const MachineOperand &MO,
147                                                 unsigned RelocID) const {
148   // If in PIC mode, we need to encode the negated address of the
149   // 'movepctolr' into the unrelocated field.  After relocation, we'll have
150   // &gv-&movepctolr-4 in the imm field.  Once &movepctolr is added to the imm
151   // field, we get &gv.  This doesn't happen for branch relocations, which are
152   // always implicitly pc relative.
153   intptr_t Cst = 0;
154   if (TM.getRelocationModel() == Reloc::PIC_) {
155     assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
156     Cst = -(intptr_t)MovePCtoLROffset - 4;
157   }
158 
159   if (MO.isGlobal())
160     return MachineRelocation::getGV(MCE.getCurrentPCOffset(), RelocID,
161                                     const_cast<GlobalValue *>(MO.getGlobal()),
162                                     Cst, isa<Function>(MO.getGlobal()));
163   if (MO.isSymbol())
164     return MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
165                                         RelocID, MO.getSymbolName(), Cst);
166   if (MO.isCPI())
167     return MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
168                                            RelocID, MO.getIndex(), Cst);
169 
170   if (MO.isMBB())
171     return MachineRelocation::getBB(MCE.getCurrentPCOffset(),
172                                     RelocID, MO.getMBB());
173 
174   assert(MO.isJTI());
175   return MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
176                                          RelocID, MO.getIndex(), Cst);
177 }
178 
getDirectBrEncoding(const MachineInstr & MI,unsigned OpNo) const179 unsigned PPCCodeEmitter::getDirectBrEncoding(const MachineInstr &MI,
180                                              unsigned OpNo) const {
181   const MachineOperand &MO = MI.getOperand(OpNo);
182   if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
183 
184   MCE.addRelocation(GetRelocation(MO, PPC::reloc_pcrel_bx));
185   return 0;
186 }
187 
getCondBrEncoding(const MachineInstr & MI,unsigned OpNo) const188 unsigned PPCCodeEmitter::getCondBrEncoding(const MachineInstr &MI,
189                                            unsigned OpNo) const {
190   const MachineOperand &MO = MI.getOperand(OpNo);
191   MCE.addRelocation(GetRelocation(MO, PPC::reloc_pcrel_bcx));
192   return 0;
193 }
194 
getHA16Encoding(const MachineInstr & MI,unsigned OpNo) const195 unsigned PPCCodeEmitter::getHA16Encoding(const MachineInstr &MI,
196                                          unsigned OpNo) const {
197   const MachineOperand &MO = MI.getOperand(OpNo);
198   if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
199 
200   MCE.addRelocation(GetRelocation(MO, PPC::reloc_absolute_high));
201   return 0;
202 }
203 
getLO16Encoding(const MachineInstr & MI,unsigned OpNo) const204 unsigned PPCCodeEmitter::getLO16Encoding(const MachineInstr &MI,
205                                          unsigned OpNo) const {
206   const MachineOperand &MO = MI.getOperand(OpNo);
207   if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
208 
209   MCE.addRelocation(GetRelocation(MO, PPC::reloc_absolute_low));
210   return 0;
211 }
212 
getMemRIEncoding(const MachineInstr & MI,unsigned OpNo) const213 unsigned PPCCodeEmitter::getMemRIEncoding(const MachineInstr &MI,
214                                           unsigned OpNo) const {
215   // Encode (imm, reg) as a memri, which has the low 16-bits as the
216   // displacement and the next 5 bits as the register #.
217   assert(MI.getOperand(OpNo+1).isReg());
218   unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1)) << 16;
219 
220   const MachineOperand &MO = MI.getOperand(OpNo);
221   if (MO.isImm())
222     return (getMachineOpValue(MI, MO) & 0xFFFF) | RegBits;
223 
224   // Add a fixup for the displacement field.
225   MCE.addRelocation(GetRelocation(MO, PPC::reloc_absolute_low));
226   return RegBits;
227 }
228 
getMemRIXEncoding(const MachineInstr & MI,unsigned OpNo) const229 unsigned PPCCodeEmitter::getMemRIXEncoding(const MachineInstr &MI,
230                                            unsigned OpNo) const {
231   // Encode (imm, reg) as a memrix, which has the low 14-bits as the
232   // displacement and the next 5 bits as the register #.
233   assert(MI.getOperand(OpNo+1).isReg());
234   unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1)) << 14;
235 
236   const MachineOperand &MO = MI.getOperand(OpNo);
237   if (MO.isImm())
238     return (getMachineOpValue(MI, MO) & 0x3FFF) | RegBits;
239 
240   MCE.addRelocation(GetRelocation(MO, PPC::reloc_absolute_low_ix));
241   return RegBits;
242 }
243 
244 
getMachineOpValue(const MachineInstr & MI,const MachineOperand & MO) const245 unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI,
246                                            const MachineOperand &MO) const {
247 
248   if (MO.isReg()) {
249     // MTCRF/MFOCRF should go through get_crbitm_encoding for the CR operand.
250     // The GPR operand should come through here though.
251     assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) ||
252            MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7);
253     return getPPCRegisterNumbering(MO.getReg());
254   }
255 
256   assert(MO.isImm() &&
257          "Relocation required in an instruction that we cannot encode!");
258   return MO.getImm();
259 }
260 
261 #include "PPCGenCodeEmitter.inc"
262