1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
27 #include "intel_batchbuffer.h"
28
29 static void
gen8_upload_ds_state(struct brw_context * brw)30 gen8_upload_ds_state(struct brw_context *brw)
31 {
32 const struct gen_device_info *devinfo = &brw->screen->devinfo;
33 const struct brw_stage_state *stage_state = &brw->tes.base;
34 /* BRW_NEW_TESS_PROGRAMS */
35 bool active = brw->tess_eval_program;
36
37 /* BRW_NEW_TES_PROG_DATA */
38 const struct brw_stage_prog_data *prog_data = stage_state->prog_data;
39 const struct brw_vue_prog_data *vue_prog_data =
40 brw_vue_prog_data(stage_state->prog_data);
41 const struct brw_tes_prog_data *tes_prog_data =
42 brw_tes_prog_data(stage_state->prog_data);
43 const int ds_pkt_len = brw->gen >= 9 ? 11 : 9;
44
45 if (active) {
46 BEGIN_BATCH(ds_pkt_len);
47 OUT_BATCH(_3DSTATE_DS << 16 | (ds_pkt_len - 2));
48 OUT_BATCH(stage_state->prog_offset);
49 OUT_BATCH(0);
50 OUT_BATCH(SET_FIELD(DIV_ROUND_UP(stage_state->sampler_count, 4),
51 GEN7_DS_SAMPLER_COUNT) |
52 SET_FIELD(prog_data->binding_table.size_bytes / 4,
53 GEN7_DS_BINDING_TABLE_ENTRY_COUNT));
54 if (prog_data->total_scratch) {
55 OUT_RELOC64(stage_state->scratch_bo,
56 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
57 ffs(stage_state->per_thread_scratch) - 11);
58 } else {
59 OUT_BATCH(0);
60 OUT_BATCH(0);
61 }
62 OUT_BATCH(SET_FIELD(prog_data->dispatch_grf_start_reg,
63 GEN7_DS_DISPATCH_START_GRF) |
64 SET_FIELD(vue_prog_data->urb_read_length,
65 GEN7_DS_URB_READ_LENGTH));
66
67 OUT_BATCH(GEN7_DS_ENABLE |
68 GEN7_DS_STATISTICS_ENABLE |
69 (devinfo->max_tes_threads - 1) << HSW_DS_MAX_THREADS_SHIFT |
70 (vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ?
71 GEN7_DS_SIMD8_DISPATCH_ENABLE : 0) |
72 (tes_prog_data->domain == BRW_TESS_DOMAIN_TRI ?
73 GEN7_DS_COMPUTE_W_COORDINATE_ENABLE : 0));
74 OUT_BATCH(SET_FIELD(vue_prog_data->cull_distance_mask,
75 GEN8_DS_USER_CULL_DISTANCE));
76
77
78 if (brw->gen >= 9) {
79 OUT_BATCH(0);
80 OUT_BATCH(0);
81 }
82
83 ADVANCE_BATCH();
84 } else {
85 BEGIN_BATCH(ds_pkt_len);
86 OUT_BATCH(_3DSTATE_DS << 16 | (ds_pkt_len - 2));
87 OUT_BATCH(0);
88 OUT_BATCH(0);
89 OUT_BATCH(0);
90 OUT_BATCH(0);
91 OUT_BATCH(0);
92 OUT_BATCH(0);
93 OUT_BATCH(0);
94 OUT_BATCH(0);
95
96 if (brw->gen >= 9) {
97 OUT_BATCH(0);
98 OUT_BATCH(0);
99 }
100
101 ADVANCE_BATCH();
102 }
103
104 brw->tes.enabled = active;
105 }
106
107 const struct brw_tracked_state gen8_ds_state = {
108 .dirty = {
109 .mesa = 0,
110 .brw = BRW_NEW_BATCH |
111 BRW_NEW_BLORP |
112 BRW_NEW_TESS_PROGRAMS |
113 BRW_NEW_TES_PROG_DATA,
114 },
115 .emit = gen8_upload_ds_state,
116 };
117