1 /*
2 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "r300_context.h"
24 #include "r300_emit.h"
25 #include "r300_texture.h"
26 #include "r300_reg.h"
27
28 #include "util/u_format.h"
29 #include "util/u_half.h"
30 #include "util/u_pack_color.h"
31 #include "util/u_surface.h"
32
33 enum r300_blitter_op /* bitmask */
34 {
35 R300_STOP_QUERY = 1,
36 R300_SAVE_TEXTURES = 2,
37 R300_SAVE_FRAMEBUFFER = 4,
38 R300_IGNORE_RENDER_COND = 8,
39
40 R300_CLEAR = R300_STOP_QUERY,
41
42 R300_CLEAR_SURFACE = R300_STOP_QUERY | R300_SAVE_FRAMEBUFFER,
43
44 R300_COPY = R300_STOP_QUERY | R300_SAVE_FRAMEBUFFER |
45 R300_SAVE_TEXTURES | R300_IGNORE_RENDER_COND,
46
47 R300_BLIT = R300_STOP_QUERY | R300_SAVE_FRAMEBUFFER |
48 R300_SAVE_TEXTURES,
49
50 R300_DECOMPRESS = R300_STOP_QUERY | R300_IGNORE_RENDER_COND,
51 };
52
r300_blitter_begin(struct r300_context * r300,enum r300_blitter_op op)53 static void r300_blitter_begin(struct r300_context* r300, enum r300_blitter_op op)
54 {
55 if ((op & R300_STOP_QUERY) && r300->query_current) {
56 r300->blitter_saved_query = r300->query_current;
57 r300_stop_query(r300);
58 }
59
60 /* Yeah we have to save all those states to ensure the blitter operation
61 * is really transparent. The states will be restored by the blitter once
62 * copying is done. */
63 util_blitter_save_blend(r300->blitter, r300->blend_state.state);
64 util_blitter_save_depth_stencil_alpha(r300->blitter, r300->dsa_state.state);
65 util_blitter_save_stencil_ref(r300->blitter, &(r300->stencil_ref));
66 util_blitter_save_rasterizer(r300->blitter, r300->rs_state.state);
67 util_blitter_save_fragment_shader(r300->blitter, r300->fs.state);
68 util_blitter_save_vertex_shader(r300->blitter, r300->vs_state.state);
69 util_blitter_save_viewport(r300->blitter, &r300->viewport);
70 util_blitter_save_scissor(r300->blitter, r300->scissor_state.state);
71 util_blitter_save_sample_mask(r300->blitter, *(unsigned*)r300->sample_mask.state);
72 util_blitter_save_vertex_buffer_slot(r300->blitter, r300->vertex_buffer);
73 util_blitter_save_vertex_elements(r300->blitter, r300->velems);
74
75 if (op & R300_SAVE_FRAMEBUFFER) {
76 util_blitter_save_framebuffer(r300->blitter, r300->fb_state.state);
77 }
78
79 if (op & R300_SAVE_TEXTURES) {
80 struct r300_textures_state* state =
81 (struct r300_textures_state*)r300->textures_state.state;
82
83 util_blitter_save_fragment_sampler_states(
84 r300->blitter, state->sampler_state_count,
85 (void**)state->sampler_states);
86
87 util_blitter_save_fragment_sampler_views(
88 r300->blitter, state->sampler_view_count,
89 (struct pipe_sampler_view**)state->sampler_views);
90 }
91
92 if (op & R300_IGNORE_RENDER_COND) {
93 /* Save the flag. */
94 r300->blitter_saved_skip_rendering = r300->skip_rendering+1;
95 r300->skip_rendering = FALSE;
96 } else {
97 r300->blitter_saved_skip_rendering = 0;
98 }
99 }
100
r300_blitter_end(struct r300_context * r300)101 static void r300_blitter_end(struct r300_context *r300)
102 {
103 if (r300->blitter_saved_query) {
104 r300_resume_query(r300, r300->blitter_saved_query);
105 r300->blitter_saved_query = NULL;
106 }
107
108 if (r300->blitter_saved_skip_rendering) {
109 /* Restore the flag. */
110 r300->skip_rendering = r300->blitter_saved_skip_rendering-1;
111 }
112 }
113
r300_depth_clear_cb_value(enum pipe_format format,const float * rgba)114 static uint32_t r300_depth_clear_cb_value(enum pipe_format format,
115 const float* rgba)
116 {
117 union util_color uc;
118 util_pack_color(rgba, format, &uc);
119
120 if (util_format_get_blocksizebits(format) == 32)
121 return uc.ui[0];
122 else
123 return uc.us | (uc.us << 16);
124 }
125
r300_cbzb_clear_allowed(struct r300_context * r300,unsigned clear_buffers)126 static boolean r300_cbzb_clear_allowed(struct r300_context *r300,
127 unsigned clear_buffers)
128 {
129 struct pipe_framebuffer_state *fb =
130 (struct pipe_framebuffer_state*)r300->fb_state.state;
131
132 /* Only color clear allowed, and only one colorbuffer. */
133 if ((clear_buffers & ~PIPE_CLEAR_COLOR) != 0 || fb->nr_cbufs != 1 || !fb->cbufs[0])
134 return FALSE;
135
136 return r300_surface(fb->cbufs[0])->cbzb_allowed;
137 }
138
r300_fast_zclear_allowed(struct r300_context * r300,unsigned clear_buffers)139 static boolean r300_fast_zclear_allowed(struct r300_context *r300,
140 unsigned clear_buffers)
141 {
142 struct pipe_framebuffer_state *fb =
143 (struct pipe_framebuffer_state*)r300->fb_state.state;
144
145 return r300_resource(fb->zsbuf->texture)->tex.zmask_dwords[fb->zsbuf->u.tex.level] != 0;
146 }
147
r300_hiz_clear_allowed(struct r300_context * r300)148 static boolean r300_hiz_clear_allowed(struct r300_context *r300)
149 {
150 struct pipe_framebuffer_state *fb =
151 (struct pipe_framebuffer_state*)r300->fb_state.state;
152
153 return r300_resource(fb->zsbuf->texture)->tex.hiz_dwords[fb->zsbuf->u.tex.level] != 0;
154 }
155
r300_depth_clear_value(enum pipe_format format,double depth,unsigned stencil)156 static uint32_t r300_depth_clear_value(enum pipe_format format,
157 double depth, unsigned stencil)
158 {
159 switch (format) {
160 case PIPE_FORMAT_Z16_UNORM:
161 case PIPE_FORMAT_X8Z24_UNORM:
162 return util_pack_z(format, depth);
163
164 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
165 return util_pack_z_stencil(format, depth, stencil);
166
167 default:
168 assert(0);
169 return 0;
170 }
171 }
172
r300_hiz_clear_value(double depth)173 static uint32_t r300_hiz_clear_value(double depth)
174 {
175 uint32_t r = (uint32_t)(CLAMP(depth, 0, 1) * 255.5);
176 assert(r <= 255);
177 return r | (r << 8) | (r << 16) | (r << 24);
178 }
179
r300_set_clear_color(struct r300_context * r300,const union pipe_color_union * color)180 static void r300_set_clear_color(struct r300_context *r300,
181 const union pipe_color_union *color)
182 {
183 struct pipe_framebuffer_state *fb =
184 (struct pipe_framebuffer_state*)r300->fb_state.state;
185 union util_color uc;
186
187 memset(&uc, 0, sizeof(uc));
188 util_pack_color(color->f, fb->cbufs[0]->format, &uc);
189
190 if (fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
191 fb->cbufs[0]->format == PIPE_FORMAT_R16G16B16X16_FLOAT) {
192 /* (0,1,2,3) maps to (B,G,R,A) */
193 r300->color_clear_value_gb = uc.h[0] | ((uint32_t)uc.h[1] << 16);
194 r300->color_clear_value_ar = uc.h[2] | ((uint32_t)uc.h[3] << 16);
195 } else {
196 r300->color_clear_value = uc.ui[0];
197 }
198 }
199
200 DEBUG_GET_ONCE_BOOL_OPTION(hyperz, "RADEON_HYPERZ", FALSE)
201
202 /* Clear currently bound buffers. */
r300_clear(struct pipe_context * pipe,unsigned buffers,const union pipe_color_union * color,double depth,unsigned stencil)203 static void r300_clear(struct pipe_context* pipe,
204 unsigned buffers,
205 const union pipe_color_union *color,
206 double depth,
207 unsigned stencil)
208 {
209 /* My notes about Zbuffer compression:
210 *
211 * 1) The zbuffer must be micro-tiled and whole microtiles must be
212 * written if compression is enabled. If microtiling is disabled,
213 * it locks up.
214 *
215 * 2) There is ZMASK RAM which contains a compressed zbuffer.
216 * Each dword of the Z Mask contains compression information
217 * for 16 4x4 pixel tiles, that is 2 bits for each tile.
218 * On chips with 2 Z pipes, every other dword maps to a different
219 * pipe. On newer chipsets, there is a new compression mode
220 * with 8x8 pixel tiles per 2 bits.
221 *
222 * 3) The FASTFILL bit has nothing to do with filling. It only tells hw
223 * it should look in the ZMASK RAM first before fetching from a real
224 * zbuffer.
225 *
226 * 4) If a pixel is in a cleared state, ZB_DEPTHCLEARVALUE is returned
227 * during zbuffer reads instead of the value that is actually stored
228 * in the zbuffer memory. A pixel is in a cleared state when its ZMASK
229 * is equal to 0. Therefore, if you clear ZMASK with zeros, you may
230 * leave the zbuffer memory uninitialized, but then you must enable
231 * compression, so that the ZMASK RAM is actually used.
232 *
233 * 5) Each 4x4 (or 8x8) tile is automatically decompressed and recompressed
234 * during zbuffer updates. A special decompressing operation should be
235 * used to fully decompress a zbuffer, which basically just stores all
236 * compressed tiles in ZMASK to the zbuffer memory.
237 *
238 * 6) For a 16-bit zbuffer, compression causes a hung with one or
239 * two samples and should not be used.
240 *
241 * 7) FORCE_COMPRESSED_STENCIL_VALUE should be enabled for stencil clears
242 * to avoid needless decompression.
243 *
244 * 8) Fastfill must not be used if reading of compressed Z data is disabled
245 * and writing of compressed Z data is enabled (RD/WR_COMP_ENABLE),
246 * i.e. it cannot be used to compress the zbuffer.
247 *
248 * 9) ZB_CB_CLEAR does not interact with zbuffer compression in any way.
249 *
250 * - Marek
251 */
252
253 struct r300_context* r300 = r300_context(pipe);
254 struct pipe_framebuffer_state *fb =
255 (struct pipe_framebuffer_state*)r300->fb_state.state;
256 struct r300_hyperz_state *hyperz =
257 (struct r300_hyperz_state*)r300->hyperz_state.state;
258 uint32_t width = fb->width;
259 uint32_t height = fb->height;
260 uint32_t hyperz_dcv = hyperz->zb_depthclearvalue;
261
262 /* Use fast Z clear.
263 * The zbuffer must be in micro-tiled mode, otherwise it locks up. */
264 if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
265 boolean zmask_clear, hiz_clear;
266
267 /* If both depth and stencil are present, they must be cleared together. */
268 if (fb->zsbuf->texture->format == PIPE_FORMAT_S8_UINT_Z24_UNORM &&
269 (buffers & PIPE_CLEAR_DEPTHSTENCIL) != PIPE_CLEAR_DEPTHSTENCIL) {
270 zmask_clear = FALSE;
271 hiz_clear = FALSE;
272 } else {
273 zmask_clear = r300_fast_zclear_allowed(r300, buffers);
274 hiz_clear = r300_hiz_clear_allowed(r300);
275 }
276
277 /* If we need Hyper-Z. */
278 if (zmask_clear || hiz_clear) {
279 /* Try to obtain the access to Hyper-Z buffers if we don't have one. */
280 if (!r300->hyperz_enabled &&
281 (r300->screen->caps.is_r500 || debug_get_option_hyperz())) {
282 r300->hyperz_enabled =
283 r300->rws->cs_request_feature(r300->cs,
284 RADEON_FID_R300_HYPERZ_ACCESS,
285 TRUE);
286 if (r300->hyperz_enabled) {
287 /* Need to emit HyperZ buffer regs for the first time. */
288 r300_mark_fb_state_dirty(r300, R300_CHANGED_HYPERZ_FLAG);
289 }
290 }
291
292 /* Setup Hyper-Z clears. */
293 if (r300->hyperz_enabled) {
294 if (zmask_clear) {
295 hyperz_dcv = hyperz->zb_depthclearvalue =
296 r300_depth_clear_value(fb->zsbuf->format, depth, stencil);
297
298 r300_mark_atom_dirty(r300, &r300->zmask_clear);
299 r300_mark_atom_dirty(r300, &r300->gpu_flush);
300 buffers &= ~PIPE_CLEAR_DEPTHSTENCIL;
301 }
302
303 if (hiz_clear) {
304 r300->hiz_clear_value = r300_hiz_clear_value(depth);
305 r300_mark_atom_dirty(r300, &r300->hiz_clear);
306 r300_mark_atom_dirty(r300, &r300->gpu_flush);
307 }
308 r300->num_z_clears++;
309 }
310 }
311 }
312
313 /* Use fast color clear for an AA colorbuffer.
314 * The CMASK is shared between all colorbuffers, so we use it
315 * if there is only one colorbuffer bound. */
316 if ((buffers & PIPE_CLEAR_COLOR) && fb->nr_cbufs == 1 && fb->cbufs[0] &&
317 r300_resource(fb->cbufs[0]->texture)->tex.cmask_dwords) {
318 /* Try to obtain the access to the CMASK if we don't have one. */
319 if (!r300->cmask_access) {
320 r300->cmask_access =
321 r300->rws->cs_request_feature(r300->cs,
322 RADEON_FID_R300_CMASK_ACCESS,
323 TRUE);
324 }
325
326 /* Setup the clear. */
327 if (r300->cmask_access) {
328 /* Pair the resource with the CMASK to avoid other resources
329 * accessing it. */
330 if (!r300->screen->cmask_resource) {
331 pipe_mutex_lock(r300->screen->cmask_mutex);
332 /* Double checking (first unlocked, then locked). */
333 if (!r300->screen->cmask_resource) {
334 /* Don't reference this, so that the texture can be
335 * destroyed while set in cmask_resource.
336 * Then in texture_destroy, we set cmask_resource to NULL. */
337 r300->screen->cmask_resource = fb->cbufs[0]->texture;
338 }
339 pipe_mutex_unlock(r300->screen->cmask_mutex);
340 }
341
342 if (r300->screen->cmask_resource == fb->cbufs[0]->texture) {
343 r300_set_clear_color(r300, color);
344 r300_mark_atom_dirty(r300, &r300->cmask_clear);
345 r300_mark_atom_dirty(r300, &r300->gpu_flush);
346 buffers &= ~PIPE_CLEAR_COLOR;
347 }
348 }
349 }
350 /* Enable CBZB clear. */
351 else if (r300_cbzb_clear_allowed(r300, buffers)) {
352 struct r300_surface *surf = r300_surface(fb->cbufs[0]);
353
354 hyperz->zb_depthclearvalue =
355 r300_depth_clear_cb_value(surf->base.format, color->f);
356
357 width = surf->cbzb_width;
358 height = surf->cbzb_height;
359
360 r300->cbzb_clear = TRUE;
361 r300_mark_fb_state_dirty(r300, R300_CHANGED_HYPERZ_FLAG);
362 }
363
364 /* Clear. */
365 if (buffers) {
366 /* Clear using the blitter. */
367 r300_blitter_begin(r300, R300_CLEAR);
368 util_blitter_clear(r300->blitter, width, height, 1,
369 buffers, color, depth, stencil);
370 r300_blitter_end(r300);
371 } else if (r300->zmask_clear.dirty ||
372 r300->hiz_clear.dirty ||
373 r300->cmask_clear.dirty) {
374 /* Just clear zmask and hiz now, this does not use the standard draw
375 * procedure. */
376 /* Calculate zmask_clear and hiz_clear atom sizes. */
377 unsigned dwords =
378 r300->gpu_flush.size +
379 (r300->zmask_clear.dirty ? r300->zmask_clear.size : 0) +
380 (r300->hiz_clear.dirty ? r300->hiz_clear.size : 0) +
381 (r300->cmask_clear.dirty ? r300->cmask_clear.size : 0) +
382 r300_get_num_cs_end_dwords(r300);
383
384 /* Reserve CS space. */
385 if (!r300->rws->cs_check_space(r300->cs, dwords)) {
386 r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL);
387 }
388
389 /* Emit clear packets. */
390 r300_emit_gpu_flush(r300, r300->gpu_flush.size, r300->gpu_flush.state);
391 r300->gpu_flush.dirty = FALSE;
392
393 if (r300->zmask_clear.dirty) {
394 r300_emit_zmask_clear(r300, r300->zmask_clear.size,
395 r300->zmask_clear.state);
396 r300->zmask_clear.dirty = FALSE;
397 }
398 if (r300->hiz_clear.dirty) {
399 r300_emit_hiz_clear(r300, r300->hiz_clear.size,
400 r300->hiz_clear.state);
401 r300->hiz_clear.dirty = FALSE;
402 }
403 if (r300->cmask_clear.dirty) {
404 r300_emit_cmask_clear(r300, r300->cmask_clear.size,
405 r300->cmask_clear.state);
406 r300->cmask_clear.dirty = FALSE;
407 }
408 } else {
409 assert(0);
410 }
411
412 /* Disable CBZB clear. */
413 if (r300->cbzb_clear) {
414 r300->cbzb_clear = FALSE;
415 hyperz->zb_depthclearvalue = hyperz_dcv;
416 r300_mark_fb_state_dirty(r300, R300_CHANGED_HYPERZ_FLAG);
417 }
418
419 /* Enable fastfill and/or hiz.
420 *
421 * If we cleared zmask/hiz, it's in use now. The Hyper-Z state update
422 * looks if zmask/hiz is in use and programs hardware accordingly. */
423 if (r300->zmask_in_use || r300->hiz_in_use) {
424 r300_mark_atom_dirty(r300, &r300->hyperz_state);
425 }
426 }
427
428 /* Clear a region of a color surface to a constant value. */
r300_clear_render_target(struct pipe_context * pipe,struct pipe_surface * dst,const union pipe_color_union * color,unsigned dstx,unsigned dsty,unsigned width,unsigned height,bool render_condition_enabled)429 static void r300_clear_render_target(struct pipe_context *pipe,
430 struct pipe_surface *dst,
431 const union pipe_color_union *color,
432 unsigned dstx, unsigned dsty,
433 unsigned width, unsigned height,
434 bool render_condition_enabled)
435 {
436 struct r300_context *r300 = r300_context(pipe);
437
438 r300_blitter_begin(r300, R300_CLEAR_SURFACE |
439 (render_condition_enabled ? 0 : R300_IGNORE_RENDER_COND));
440 util_blitter_clear_render_target(r300->blitter, dst, color,
441 dstx, dsty, width, height);
442 r300_blitter_end(r300);
443 }
444
445 /* Clear a region of a depth stencil surface. */
r300_clear_depth_stencil(struct pipe_context * pipe,struct pipe_surface * dst,unsigned clear_flags,double depth,unsigned stencil,unsigned dstx,unsigned dsty,unsigned width,unsigned height,bool render_condition_enabled)446 static void r300_clear_depth_stencil(struct pipe_context *pipe,
447 struct pipe_surface *dst,
448 unsigned clear_flags,
449 double depth,
450 unsigned stencil,
451 unsigned dstx, unsigned dsty,
452 unsigned width, unsigned height,
453 bool render_condition_enabled)
454 {
455 struct r300_context *r300 = r300_context(pipe);
456 struct pipe_framebuffer_state *fb =
457 (struct pipe_framebuffer_state*)r300->fb_state.state;
458
459 if (r300->zmask_in_use && !r300->locked_zbuffer) {
460 if (fb->zsbuf->texture == dst->texture) {
461 r300_decompress_zmask(r300);
462 }
463 }
464
465 /* XXX Do not decompress ZMask of the currently-set zbuffer. */
466 r300_blitter_begin(r300, R300_CLEAR_SURFACE |
467 (render_condition_enabled ? 0 : R300_IGNORE_RENDER_COND));
468 util_blitter_clear_depth_stencil(r300->blitter, dst, clear_flags, depth, stencil,
469 dstx, dsty, width, height);
470 r300_blitter_end(r300);
471 }
472
r300_decompress_zmask(struct r300_context * r300)473 void r300_decompress_zmask(struct r300_context *r300)
474 {
475 struct pipe_framebuffer_state *fb =
476 (struct pipe_framebuffer_state*)r300->fb_state.state;
477
478 if (!r300->zmask_in_use || r300->locked_zbuffer)
479 return;
480
481 r300->zmask_decompress = TRUE;
482 r300_mark_atom_dirty(r300, &r300->hyperz_state);
483
484 r300_blitter_begin(r300, R300_DECOMPRESS);
485 util_blitter_custom_clear_depth(r300->blitter, fb->width, fb->height, 0,
486 r300->dsa_decompress_zmask);
487 r300_blitter_end(r300);
488
489 r300->zmask_decompress = FALSE;
490 r300->zmask_in_use = FALSE;
491 r300_mark_atom_dirty(r300, &r300->hyperz_state);
492 }
493
r300_decompress_zmask_locked_unsafe(struct r300_context * r300)494 void r300_decompress_zmask_locked_unsafe(struct r300_context *r300)
495 {
496 struct pipe_framebuffer_state fb;
497
498 memset(&fb, 0, sizeof(fb));
499 fb.width = r300->locked_zbuffer->width;
500 fb.height = r300->locked_zbuffer->height;
501 fb.zsbuf = r300->locked_zbuffer;
502
503 r300->context.set_framebuffer_state(&r300->context, &fb);
504 r300_decompress_zmask(r300);
505 }
506
r300_decompress_zmask_locked(struct r300_context * r300)507 void r300_decompress_zmask_locked(struct r300_context *r300)
508 {
509 struct pipe_framebuffer_state saved_fb;
510
511 memset(&saved_fb, 0, sizeof(saved_fb));
512 util_copy_framebuffer_state(&saved_fb, r300->fb_state.state);
513 r300_decompress_zmask_locked_unsafe(r300);
514 r300->context.set_framebuffer_state(&r300->context, &saved_fb);
515 util_unreference_framebuffer_state(&saved_fb);
516
517 pipe_surface_reference(&r300->locked_zbuffer, NULL);
518 }
519
r300_is_blit_supported(enum pipe_format format)520 bool r300_is_blit_supported(enum pipe_format format)
521 {
522 const struct util_format_description *desc =
523 util_format_description(format);
524
525 return desc->layout == UTIL_FORMAT_LAYOUT_PLAIN ||
526 desc->layout == UTIL_FORMAT_LAYOUT_S3TC ||
527 desc->layout == UTIL_FORMAT_LAYOUT_RGTC;
528 }
529
530 /* Copy a block of pixels from one surface to another. */
r300_resource_copy_region(struct pipe_context * pipe,struct pipe_resource * dst,unsigned dst_level,unsigned dstx,unsigned dsty,unsigned dstz,struct pipe_resource * src,unsigned src_level,const struct pipe_box * src_box)531 static void r300_resource_copy_region(struct pipe_context *pipe,
532 struct pipe_resource *dst,
533 unsigned dst_level,
534 unsigned dstx, unsigned dsty, unsigned dstz,
535 struct pipe_resource *src,
536 unsigned src_level,
537 const struct pipe_box *src_box)
538 {
539 struct pipe_screen *screen = pipe->screen;
540 struct r300_context *r300 = r300_context(pipe);
541 struct pipe_framebuffer_state *fb =
542 (struct pipe_framebuffer_state*)r300->fb_state.state;
543 unsigned src_width0 = r300_resource(src)->tex.width0;
544 unsigned src_height0 = r300_resource(src)->tex.height0;
545 unsigned dst_width0 = r300_resource(dst)->tex.width0;
546 unsigned dst_height0 = r300_resource(dst)->tex.height0;
547 unsigned layout;
548 struct pipe_box box, dstbox;
549 struct pipe_sampler_view src_templ, *src_view;
550 struct pipe_surface dst_templ, *dst_view;
551
552 /* Fallback for buffers. */
553 if ((dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) ||
554 !r300_is_blit_supported(dst->format)) {
555 util_resource_copy_region(pipe, dst, dst_level, dstx, dsty, dstz,
556 src, src_level, src_box);
557 return;
558 }
559
560 /* Can't read MSAA textures. */
561 if (src->nr_samples > 1 || dst->nr_samples > 1) {
562 return;
563 }
564
565 /* The code below changes the texture format so that the copy can be done
566 * on hardware. E.g. depth-stencil surfaces are copied as RGBA
567 * colorbuffers. */
568
569 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
570 util_blitter_default_src_texture(&src_templ, src, src_level);
571
572 layout = util_format_description(dst_templ.format)->layout;
573
574 /* Handle non-renderable plain formats. */
575 if (layout == UTIL_FORMAT_LAYOUT_PLAIN &&
576 (!screen->is_format_supported(screen, src_templ.format, src->target,
577 src->nr_samples,
578 PIPE_BIND_SAMPLER_VIEW) ||
579 !screen->is_format_supported(screen, dst_templ.format, dst->target,
580 dst->nr_samples,
581 PIPE_BIND_RENDER_TARGET))) {
582 switch (util_format_get_blocksize(dst_templ.format)) {
583 case 1:
584 dst_templ.format = PIPE_FORMAT_I8_UNORM;
585 break;
586 case 2:
587 dst_templ.format = PIPE_FORMAT_B4G4R4A4_UNORM;
588 break;
589 case 4:
590 dst_templ.format = PIPE_FORMAT_B8G8R8A8_UNORM;
591 break;
592 case 8:
593 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UNORM;
594 break;
595 default:
596 debug_printf("r300: copy_region: Unhandled format: %s. Falling back to software.\n"
597 "r300: copy_region: Software fallback doesn't work for tiled textures.\n",
598 util_format_short_name(dst_templ.format));
599 }
600 src_templ.format = dst_templ.format;
601 }
602
603 /* Handle compressed formats. */
604 if (layout == UTIL_FORMAT_LAYOUT_S3TC ||
605 layout == UTIL_FORMAT_LAYOUT_RGTC) {
606 assert(src_templ.format == dst_templ.format);
607
608 box = *src_box;
609 src_box = &box;
610
611 dst_width0 = align(dst_width0, 4);
612 dst_height0 = align(dst_height0, 4);
613 src_width0 = align(src_width0, 4);
614 src_height0 = align(src_height0, 4);
615 box.width = align(box.width, 4);
616 box.height = align(box.height, 4);
617
618 switch (util_format_get_blocksize(dst_templ.format)) {
619 case 8:
620 /* one 4x4 pixel block has 8 bytes.
621 * we set 1 pixel = 4 bytes ===> 1 block corrensponds to 2 pixels. */
622 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
623 dst_width0 = dst_width0 / 2;
624 src_width0 = src_width0 / 2;
625 dstx /= 2;
626 box.x /= 2;
627 box.width /= 2;
628 break;
629 case 16:
630 /* one 4x4 pixel block has 16 bytes.
631 * we set 1 pixel = 4 bytes ===> 1 block corresponds to 4 pixels. */
632 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
633 break;
634 }
635 src_templ.format = dst_templ.format;
636
637 dst_height0 = dst_height0 / 4;
638 src_height0 = src_height0 / 4;
639 dsty /= 4;
640 box.y /= 4;
641 box.height /= 4;
642 }
643
644 /* Fallback for textures. */
645 if (!screen->is_format_supported(screen, dst_templ.format,
646 dst->target, dst->nr_samples,
647 PIPE_BIND_RENDER_TARGET) ||
648 !screen->is_format_supported(screen, src_templ.format,
649 src->target, src->nr_samples,
650 PIPE_BIND_SAMPLER_VIEW)) {
651 assert(0 && "this shouldn't happen, update r300_is_blit_supported");
652 util_resource_copy_region(pipe, dst, dst_level, dstx, dsty, dstz,
653 src, src_level, src_box);
654 return;
655 }
656
657 /* Decompress ZMASK. */
658 if (r300->zmask_in_use && !r300->locked_zbuffer) {
659 if (fb->zsbuf->texture == src ||
660 fb->zsbuf->texture == dst) {
661 r300_decompress_zmask(r300);
662 }
663 }
664
665 dst_view = r300_create_surface_custom(pipe, dst, &dst_templ, dst_width0, dst_height0);
666 src_view = r300_create_sampler_view_custom(pipe, src, &src_templ, src_width0, src_height0);
667
668 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
669 abs(src_box->depth), &dstbox);
670
671 r300_blitter_begin(r300, R300_COPY);
672 util_blitter_blit_generic(r300->blitter, dst_view, &dstbox,
673 src_view, src_box, src_width0, src_height0,
674 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
675 FALSE);
676 r300_blitter_end(r300);
677
678 pipe_surface_reference(&dst_view, NULL);
679 pipe_sampler_view_reference(&src_view, NULL);
680 }
681
r300_is_simple_msaa_resolve(const struct pipe_blit_info * info)682 static boolean r300_is_simple_msaa_resolve(const struct pipe_blit_info *info)
683 {
684 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
685 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
686
687 return info->src.resource->nr_samples > 1 &&
688 info->dst.resource->nr_samples <= 1 &&
689 info->dst.resource->format == info->src.resource->format &&
690 info->dst.resource->format == info->dst.format &&
691 info->src.resource->format == info->src.format &&
692 !info->scissor_enable &&
693 info->mask == PIPE_MASK_RGBA &&
694 dst_width == info->src.resource->width0 &&
695 dst_height == info->src.resource->height0 &&
696 info->dst.box.x == 0 &&
697 info->dst.box.y == 0 &&
698 info->dst.box.width == dst_width &&
699 info->dst.box.height == dst_height &&
700 info->src.box.x == 0 &&
701 info->src.box.y == 0 &&
702 info->src.box.width == dst_width &&
703 info->src.box.height == dst_height &&
704 (r300_resource(info->dst.resource)->tex.microtile != RADEON_LAYOUT_LINEAR ||
705 r300_resource(info->dst.resource)->tex.macrotile[info->dst.level] != RADEON_LAYOUT_LINEAR);
706 }
707
r300_simple_msaa_resolve(struct pipe_context * pipe,struct pipe_resource * dst,unsigned dst_level,unsigned dst_layer,struct pipe_resource * src,enum pipe_format format)708 static void r300_simple_msaa_resolve(struct pipe_context *pipe,
709 struct pipe_resource *dst,
710 unsigned dst_level,
711 unsigned dst_layer,
712 struct pipe_resource *src,
713 enum pipe_format format)
714 {
715 struct r300_context *r300 = r300_context(pipe);
716 struct r300_surface *srcsurf, *dstsurf;
717 struct pipe_surface surf_tmpl;
718 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
719
720 memset(&surf_tmpl, 0, sizeof(surf_tmpl));
721 surf_tmpl.format = format;
722 srcsurf = r300_surface(pipe->create_surface(pipe, src, &surf_tmpl));
723
724 surf_tmpl.format = format;
725 surf_tmpl.u.tex.level = dst_level;
726 surf_tmpl.u.tex.first_layer =
727 surf_tmpl.u.tex.last_layer = dst_layer;
728 dstsurf = r300_surface(pipe->create_surface(pipe, dst, &surf_tmpl));
729
730 /* COLORPITCH should contain the tiling info of the resolve buffer.
731 * The tiling of the AA buffer isn't programmable anyway. */
732 srcsurf->pitch &= ~(R300_COLOR_TILE(1) | R300_COLOR_MICROTILE(3));
733 srcsurf->pitch |= dstsurf->pitch & (R300_COLOR_TILE(1) | R300_COLOR_MICROTILE(3));
734
735 /* Enable AA resolve. */
736 aa->dest = dstsurf;
737 r300->aa_state.size = 8;
738 r300_mark_atom_dirty(r300, &r300->aa_state);
739
740 /* Resolve the surface. */
741 r300_blitter_begin(r300, R300_CLEAR_SURFACE);
742 util_blitter_custom_color(r300->blitter, &srcsurf->base, NULL);
743 r300_blitter_end(r300);
744
745 /* Disable AA resolve. */
746 aa->dest = NULL;
747 r300->aa_state.size = 4;
748 r300_mark_atom_dirty(r300, &r300->aa_state);
749
750 pipe_surface_reference((struct pipe_surface**)&srcsurf, NULL);
751 pipe_surface_reference((struct pipe_surface**)&dstsurf, NULL);
752 }
753
r300_msaa_resolve(struct pipe_context * pipe,const struct pipe_blit_info * info)754 static void r300_msaa_resolve(struct pipe_context *pipe,
755 const struct pipe_blit_info *info)
756 {
757 struct r300_context *r300 = r300_context(pipe);
758 struct pipe_screen *screen = pipe->screen;
759 struct pipe_resource *tmp, templ;
760 struct pipe_blit_info blit;
761
762 assert(info->src.level == 0);
763 assert(info->src.box.z == 0);
764 assert(info->src.box.depth == 1);
765 assert(info->dst.box.depth == 1);
766
767 if (r300_is_simple_msaa_resolve(info)) {
768 r300_simple_msaa_resolve(pipe, info->dst.resource, info->dst.level,
769 info->dst.box.z, info->src.resource,
770 info->src.format);
771 return;
772 }
773
774 /* resolve into a temporary texture, then blit */
775 memset(&templ, 0, sizeof(templ));
776 templ.target = PIPE_TEXTURE_2D;
777 templ.format = info->src.resource->format;
778 templ.width0 = info->src.resource->width0;
779 templ.height0 = info->src.resource->height0;
780 templ.depth0 = 1;
781 templ.array_size = 1;
782 templ.usage = PIPE_USAGE_DEFAULT;
783 templ.flags = R300_RESOURCE_FORCE_MICROTILING;
784
785 tmp = screen->resource_create(screen, &templ);
786
787 /* resolve */
788 r300_simple_msaa_resolve(pipe, tmp, 0, 0, info->src.resource,
789 info->src.format);
790
791 /* blit */
792 blit = *info;
793 blit.src.resource = tmp;
794 blit.src.box.z = 0;
795
796 r300_blitter_begin(r300, R300_BLIT | R300_IGNORE_RENDER_COND);
797 util_blitter_blit(r300->blitter, &blit);
798 r300_blitter_end(r300);
799
800 pipe_resource_reference(&tmp, NULL);
801 }
802
r300_blit(struct pipe_context * pipe,const struct pipe_blit_info * blit)803 static void r300_blit(struct pipe_context *pipe,
804 const struct pipe_blit_info *blit)
805 {
806 struct r300_context *r300 = r300_context(pipe);
807 struct pipe_framebuffer_state *fb =
808 (struct pipe_framebuffer_state*)r300->fb_state.state;
809 struct pipe_blit_info info = *blit;
810
811 /* The driver supports sRGB textures but not framebuffers. Blitting
812 * from sRGB to sRGB should be the same as blitting from linear
813 * to linear, so use that, This avoids incorrect linearization.
814 */
815 if (util_format_is_srgb(info.src.format)) {
816 info.src.format = util_format_linear(info.src.format);
817 info.dst.format = util_format_linear(info.dst.format);
818 }
819
820 /* MSAA resolve. */
821 if (info.src.resource->nr_samples > 1 &&
822 !util_format_is_depth_or_stencil(info.src.resource->format)) {
823 r300_msaa_resolve(pipe, &info);
824 return;
825 }
826
827 /* Can't read MSAA textures. */
828 if (info.src.resource->nr_samples > 1) {
829 return;
830 }
831
832 /* Blit a combined depth-stencil resource as color.
833 * S8Z24 is the only supported stencil format. */
834 if ((info.mask & PIPE_MASK_S) &&
835 info.src.format == PIPE_FORMAT_S8_UINT_Z24_UNORM &&
836 info.dst.format == PIPE_FORMAT_S8_UINT_Z24_UNORM) {
837 if (info.dst.resource->nr_samples > 1) {
838 /* Cannot do that with MSAA buffers. */
839 info.mask &= ~PIPE_MASK_S;
840 if (!(info.mask & PIPE_MASK_Z)) {
841 return;
842 }
843 } else {
844 /* Single-sample buffer. */
845 info.src.format = PIPE_FORMAT_B8G8R8A8_UNORM;
846 info.dst.format = PIPE_FORMAT_B8G8R8A8_UNORM;
847 if (info.mask & PIPE_MASK_Z) {
848 info.mask = PIPE_MASK_RGBA; /* depth+stencil */
849 } else {
850 info.mask = PIPE_MASK_B; /* stencil only */
851 }
852 }
853 }
854
855 /* Decompress ZMASK. */
856 if (r300->zmask_in_use && !r300->locked_zbuffer) {
857 if (fb->zsbuf->texture == info.src.resource ||
858 fb->zsbuf->texture == info.dst.resource) {
859 r300_decompress_zmask(r300);
860 }
861 }
862
863 r300_blitter_begin(r300, R300_BLIT |
864 (info.render_condition_enable ? 0 : R300_IGNORE_RENDER_COND));
865 util_blitter_blit(r300->blitter, &info);
866 r300_blitter_end(r300);
867 }
868
r300_flush_resource(struct pipe_context * ctx,struct pipe_resource * resource)869 static void r300_flush_resource(struct pipe_context *ctx,
870 struct pipe_resource *resource)
871 {
872 }
873
r300_init_blit_functions(struct r300_context * r300)874 void r300_init_blit_functions(struct r300_context *r300)
875 {
876 r300->context.clear = r300_clear;
877 r300->context.clear_render_target = r300_clear_render_target;
878 r300->context.clear_depth_stencil = r300_clear_depth_stencil;
879 r300->context.resource_copy_region = r300_resource_copy_region;
880 r300->context.blit = r300_blit;
881 r300->context.flush_resource = r300_flush_resource;
882 }
883