1 //===- llvm/CodeGen/LivePhysRegs.h - Live Physical Register Set -*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the LivePhysRegs utility for tracking liveness of 11 // physical registers. This can be used for ad-hoc liveness tracking after 12 // register allocation. You can start with the live-ins/live-outs at the 13 // beginning/end of a block and update the information while walking the 14 // instructions inside the block. This implementation tracks the liveness on a 15 // sub-register granularity. 16 // 17 // We assume that the high bits of a physical super-register are not preserved 18 // unless the instruction has an implicit-use operand reading the super- 19 // register. 20 // 21 // X86 Example: 22 // %YMM0<def> = ... 23 // %XMM0<def> = ... (Kills %XMM0, all %XMM0s sub-registers, and %YMM0) 24 // 25 // %YMM0<def> = ... 26 // %XMM0<def> = ..., %YMM0<imp-use> (%YMM0 and all its sub-registers are alive) 27 //===----------------------------------------------------------------------===// 28 29 #ifndef LLVM_CODEGEN_LIVEPHYSREGS_H 30 #define LLVM_CODEGEN_LIVEPHYSREGS_H 31 32 #include "llvm/ADT/SparseSet.h" 33 #include "llvm/CodeGen/MachineBasicBlock.h" 34 #include "llvm/Target/TargetRegisterInfo.h" 35 #include <cassert> 36 37 namespace llvm { 38 39 class MachineInstr; 40 41 /// \brief A set of live physical registers with functions to track liveness 42 /// when walking backward/forward through a basic block. 43 class LivePhysRegs { 44 const TargetRegisterInfo *TRI; 45 SparseSet<unsigned> LiveRegs; 46 47 LivePhysRegs(const LivePhysRegs&) = delete; 48 LivePhysRegs &operator=(const LivePhysRegs&) = delete; 49 public: 50 /// \brief Constructs a new empty LivePhysRegs set. LivePhysRegs()51 LivePhysRegs() : TRI(nullptr), LiveRegs() {} 52 53 /// \brief Constructs and initialize an empty LivePhysRegs set. LivePhysRegs(const TargetRegisterInfo * TRI)54 LivePhysRegs(const TargetRegisterInfo *TRI) : TRI(TRI) { 55 assert(TRI && "Invalid TargetRegisterInfo pointer."); 56 LiveRegs.setUniverse(TRI->getNumRegs()); 57 } 58 59 /// \brief Clear and initialize the LivePhysRegs set. init(const TargetRegisterInfo * TRI)60 void init(const TargetRegisterInfo *TRI) { 61 assert(TRI && "Invalid TargetRegisterInfo pointer."); 62 this->TRI = TRI; 63 LiveRegs.clear(); 64 LiveRegs.setUniverse(TRI->getNumRegs()); 65 } 66 67 /// \brief Clears the LivePhysRegs set. clear()68 void clear() { LiveRegs.clear(); } 69 70 /// \brief Returns true if the set is empty. empty()71 bool empty() const { return LiveRegs.empty(); } 72 73 /// \brief Adds a physical register and all its sub-registers to the set. addReg(unsigned Reg)74 void addReg(unsigned Reg) { 75 assert(TRI && "LivePhysRegs is not initialized."); 76 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); 77 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); 78 SubRegs.isValid(); ++SubRegs) 79 LiveRegs.insert(*SubRegs); 80 } 81 82 /// \brief Removes a physical register, all its sub-registers, and all its 83 /// super-registers from the set. removeReg(unsigned Reg)84 void removeReg(unsigned Reg) { 85 assert(TRI && "LivePhysRegs is not initialized."); 86 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); 87 for (MCRegAliasIterator R(Reg, TRI, true); R.isValid(); ++R) 88 LiveRegs.erase(*R); 89 } 90 91 /// \brief Removes physical registers clobbered by the regmask operand @p MO. 92 void removeRegsInMask(const MachineOperand &MO, 93 SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> *Clobbers); 94 95 /// \brief Returns true if register @p Reg is contained in the set. This also 96 /// works if only the super register of @p Reg has been defined, because 97 /// addReg() always adds all sub-registers to the set as well. 98 /// Note: Returns false if just some sub registers are live, use available() 99 /// when searching a free register. contains(unsigned Reg)100 bool contains(unsigned Reg) const { return LiveRegs.count(Reg); } 101 102 /// Returns true if register \p Reg and no aliasing register is in the set. 103 bool available(const MachineRegisterInfo &MRI, unsigned Reg) const; 104 105 /// \brief Simulates liveness when stepping backwards over an 106 /// instruction(bundle): Remove Defs, add uses. This is the recommended way of 107 /// calculating liveness. 108 void stepBackward(const MachineInstr &MI); 109 110 /// \brief Simulates liveness when stepping forward over an 111 /// instruction(bundle): Remove killed-uses, add defs. This is the not 112 /// recommended way, because it depends on accurate kill flags. If possible 113 /// use stepBackward() instead of this function. 114 /// The clobbers set will be the list of registers either defined or clobbered 115 /// by a regmask. The operand will identify whether this is a regmask or 116 /// register operand. 117 void stepForward(const MachineInstr &MI, 118 SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers); 119 120 /// Adds all live-in registers of basic block @p MBB. 121 /// Live in registers are the registers in the blocks live-in list and the 122 /// pristine registers. 123 void addLiveIns(const MachineBasicBlock &MBB); 124 125 /// Adds all live-out registers of basic block @p MBB. 126 /// Live out registers are the union of the live-in registers of the successor 127 /// blocks and pristine registers. Live out registers of the end block are the 128 /// callee saved registers. 129 void addLiveOuts(const MachineBasicBlock &MBB); 130 131 /// Like addLiveOuts() but does not add pristine registers/callee saved 132 /// registers. 133 void addLiveOutsNoPristines(const MachineBasicBlock &MBB); 134 135 typedef SparseSet<unsigned>::const_iterator const_iterator; begin()136 const_iterator begin() const { return LiveRegs.begin(); } end()137 const_iterator end() const { return LiveRegs.end(); } 138 139 /// \brief Prints the currently live registers to @p OS. 140 void print(raw_ostream &OS) const; 141 142 /// \brief Dumps the currently live registers to the debug output. 143 void dump() const; 144 }; 145 146 inline raw_ostream &operator<<(raw_ostream &OS, const LivePhysRegs& LR) { 147 LR.print(OS); 148 return OS; 149 } 150 151 } // namespace llvm 152 153 #endif 154