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Searched defs:shll (Results 1 – 5 of 5) sorted by relevance

/external/v8/src/compiler/x64/
Dcode-generator-x64.cc2034 __ shll(i.OutputRegister(), Immediate(1)); in AssembleArchInstruction() local
2039 __ shll(i.OutputRegister(), Immediate(1)); in AssembleArchInstruction() local
2041 __ shll(i.OutputRegister(), Immediate(2)); in AssembleArchInstruction() local
2043 __ shll(i.OutputRegister(), Immediate(3)); in AssembleArchInstruction() local
/external/v8/src/crankshaft/x64/
Dlithium-codegen-x64.cc1304 __ shll(left, Immediate(2)); in DoMulI() local
1310 __ shll(left, Immediate(3)); in DoMulI() local
1316 __ shll(left, Immediate(4)); in DoMulI() local
1534 __ shll(ToRegister(left), Immediate(shift_count - 1)); in DoShiftI() local
1539 __ shll(ToRegister(left), Immediate(shift_count)); in DoShiftI() local
1543 __ shll(ToRegister(left), Immediate(shift_count)); in DoShiftI() local
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc1417 __ shll(v5.V2D(), v24.V2S(), 32); in GenerateTestSequenceNEON() local
1418 __ shll(v26.V4S(), v20.V4H(), 16); in GenerateTestSequenceNEON() local
1419 __ shll(v5.V8H(), v9.V8B(), 8); in GenerateTestSequenceNEON() local
/external/vixl/src/aarch64/
Dassembler-aarch64.cc2578 void Assembler::shll(const VRegister& vd, const VRegister& vn, int shift) { in shll() function in vixl::aarch64::Assembler
Dlogic-aarch64.cc1673 LogicVRegister Simulator::shll(VectorFormat vform, in shll() function in vixl::aarch64::Simulator