1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "os/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33 #include "util/u_hash_table.h"
34 #include "util/ralloc.h"
35
36 #include <xf86drm.h>
37 #include "vc4_drm.h"
38 #include "vc4_screen.h"
39 #include "vc4_context.h"
40 #include "vc4_resource.h"
41
42 static const struct debug_named_value debug_options[] = {
43 { "cl", VC4_DEBUG_CL,
44 "Dump command list during creation" },
45 { "qpu", VC4_DEBUG_QPU,
46 "Dump generated QPU instructions" },
47 { "qir", VC4_DEBUG_QIR,
48 "Dump QPU IR during program compile" },
49 { "nir", VC4_DEBUG_NIR,
50 "Dump NIR during program compile" },
51 { "tgsi", VC4_DEBUG_TGSI,
52 "Dump TGSI during program compile" },
53 { "shaderdb", VC4_DEBUG_SHADERDB,
54 "Dump program compile information for shader-db analysis" },
55 { "perf", VC4_DEBUG_PERF,
56 "Print during performance-related events" },
57 { "norast", VC4_DEBUG_NORAST,
58 "Skip actual hardware execution of commands" },
59 { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
60 "Flush after each draw call" },
61 { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
62 "Wait for finish after each flush" },
63 #if USE_VC4_SIMULATOR
64 { "dump", VC4_DEBUG_DUMP,
65 "Write a GPU command stream trace file" },
66 #endif
67 { NULL }
68 };
69
70 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
71 uint32_t vc4_debug;
72
73 static const char *
vc4_screen_get_name(struct pipe_screen * pscreen)74 vc4_screen_get_name(struct pipe_screen *pscreen)
75 {
76 struct vc4_screen *screen = vc4_screen(pscreen);
77
78 if (!screen->name) {
79 screen->name = ralloc_asprintf(screen,
80 "VC4 V3D %d.%d",
81 screen->v3d_ver / 10,
82 screen->v3d_ver % 10);
83 }
84
85 return screen->name;
86 }
87
88 static const char *
vc4_screen_get_vendor(struct pipe_screen * pscreen)89 vc4_screen_get_vendor(struct pipe_screen *pscreen)
90 {
91 return "Broadcom";
92 }
93
94 static void
vc4_screen_destroy(struct pipe_screen * pscreen)95 vc4_screen_destroy(struct pipe_screen *pscreen)
96 {
97 struct vc4_screen *screen = vc4_screen(pscreen);
98
99 util_hash_table_destroy(screen->bo_handles);
100 vc4_bufmgr_destroy(pscreen);
101 slab_destroy_parent(&screen->transfer_pool);
102
103 #if USE_VC4_SIMULATOR
104 vc4_simulator_destroy(screen);
105 #endif
106
107 close(screen->fd);
108 ralloc_free(pscreen);
109 }
110
111 static int
vc4_screen_get_param(struct pipe_screen * pscreen,enum pipe_cap param)112 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
113 {
114 switch (param) {
115 /* Supported features (boolean caps). */
116 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
117 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
118 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
119 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
120 case PIPE_CAP_NPOT_TEXTURES:
121 case PIPE_CAP_SHAREABLE_SHADERS:
122 case PIPE_CAP_USER_CONSTANT_BUFFERS:
123 case PIPE_CAP_TEXTURE_SHADOW_MAP:
124 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
125 case PIPE_CAP_TWO_SIDED_STENCIL:
126 case PIPE_CAP_USER_INDEX_BUFFERS:
127 case PIPE_CAP_TEXTURE_MULTISAMPLE:
128 case PIPE_CAP_TEXTURE_SWIZZLE:
129 return 1;
130
131 /* lying for GL 2.0 */
132 case PIPE_CAP_OCCLUSION_QUERY:
133 case PIPE_CAP_POINT_SPRITE:
134 return 1;
135
136 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
137 return 256;
138
139 case PIPE_CAP_GLSL_FEATURE_LEVEL:
140 return 120;
141
142 case PIPE_CAP_MAX_VIEWPORTS:
143 return 1;
144
145 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
146 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
147 return 1;
148
149 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
150 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
151 return 1;
152
153 /* Unsupported features. */
154 case PIPE_CAP_ANISOTROPIC_FILTER:
155 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
156 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
157 case PIPE_CAP_CUBE_MAP_ARRAY:
158 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
159 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
160 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
161 case PIPE_CAP_SEAMLESS_CUBE_MAP:
162 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
163 case PIPE_CAP_TGSI_INSTANCEID:
164 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
165 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
166 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
167 case PIPE_CAP_COMPUTE:
168 case PIPE_CAP_START_INSTANCE:
169 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
170 case PIPE_CAP_SHADER_STENCIL_EXPORT:
171 case PIPE_CAP_TGSI_TEXCOORD:
172 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
173 case PIPE_CAP_CONDITIONAL_RENDER:
174 case PIPE_CAP_PRIMITIVE_RESTART:
175 case PIPE_CAP_TEXTURE_BARRIER:
176 case PIPE_CAP_SM3:
177 case PIPE_CAP_INDEP_BLEND_ENABLE:
178 case PIPE_CAP_INDEP_BLEND_FUNC:
179 case PIPE_CAP_DEPTH_CLIP_DISABLE:
180 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
181 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
182 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
183 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
184 case PIPE_CAP_USER_VERTEX_BUFFERS:
185 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
186 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
187 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
188 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
189 case PIPE_CAP_TEXTURE_GATHER_SM5:
190 case PIPE_CAP_FAKE_SW_MSAA:
191 case PIPE_CAP_TEXTURE_QUERY_LOD:
192 case PIPE_CAP_SAMPLE_SHADING:
193 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
194 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
195 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
196 case PIPE_CAP_MAX_TEXEL_OFFSET:
197 case PIPE_CAP_MAX_VERTEX_STREAMS:
198 case PIPE_CAP_DRAW_INDIRECT:
199 case PIPE_CAP_MULTI_DRAW_INDIRECT:
200 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
201 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
202 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
203 case PIPE_CAP_SAMPLER_VIEW_TARGET:
204 case PIPE_CAP_CLIP_HALFZ:
205 case PIPE_CAP_VERTEXID_NOBASE:
206 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
207 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
208 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
209 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
210 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
211 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
212 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
213 case PIPE_CAP_DEPTH_BOUNDS_TEST:
214 case PIPE_CAP_TGSI_TXQS:
215 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
216 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
217 case PIPE_CAP_CLEAR_TEXTURE:
218 case PIPE_CAP_DRAW_PARAMETERS:
219 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
220 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
221 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
222 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
223 case PIPE_CAP_INVALIDATE_BUFFER:
224 case PIPE_CAP_GENERATE_MIPMAP:
225 case PIPE_CAP_STRING_MARKER:
226 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
227 case PIPE_CAP_QUERY_BUFFER_OBJECT:
228 case PIPE_CAP_QUERY_MEMORY_INFO:
229 case PIPE_CAP_PCI_GROUP:
230 case PIPE_CAP_PCI_BUS:
231 case PIPE_CAP_PCI_DEVICE:
232 case PIPE_CAP_PCI_FUNCTION:
233 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
234 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
235 case PIPE_CAP_CULL_DISTANCE:
236 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
237 case PIPE_CAP_TGSI_VOTE:
238 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
239 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
240 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
241 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
242 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
243 case PIPE_CAP_NATIVE_FENCE_FD:
244 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
245 case PIPE_CAP_TGSI_FS_FBFETCH:
246 return 0;
247
248 /* Stream output. */
249 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
250 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
251 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
252 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
253 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
254 return 0;
255
256 /* Geometry shader output, unsupported. */
257 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
258 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
259 return 0;
260
261 /* Texturing. */
262 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
263 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
264 return VC4_MAX_MIP_LEVELS;
265 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
266 /* Note: Not supported in hardware, just faking it. */
267 return 5;
268 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
269 return 0;
270
271 /* Render targets. */
272 case PIPE_CAP_MAX_RENDER_TARGETS:
273 return 1;
274
275 /* Queries. */
276 case PIPE_CAP_QUERY_TIME_ELAPSED:
277 case PIPE_CAP_QUERY_TIMESTAMP:
278 return 0;
279
280 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
281 case PIPE_CAP_MIN_TEXEL_OFFSET:
282 return 0;
283
284 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
285 return 2048;
286
287 case PIPE_CAP_ENDIANNESS:
288 return PIPE_ENDIAN_LITTLE;
289
290 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
291 return 64;
292
293 case PIPE_CAP_VENDOR_ID:
294 return 0x14E4;
295 case PIPE_CAP_DEVICE_ID:
296 return 0xFFFFFFFF;
297 case PIPE_CAP_ACCELERATED:
298 return 1;
299 case PIPE_CAP_VIDEO_MEMORY: {
300 uint64_t system_memory;
301
302 if (!os_get_total_physical_memory(&system_memory))
303 return 0;
304
305 return (int)(system_memory >> 20);
306 }
307 case PIPE_CAP_UMA:
308 return 1;
309
310 default:
311 fprintf(stderr, "unknown param %d\n", param);
312 return 0;
313 }
314 }
315
316 static float
vc4_screen_get_paramf(struct pipe_screen * pscreen,enum pipe_capf param)317 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
318 {
319 switch (param) {
320 case PIPE_CAPF_MAX_LINE_WIDTH:
321 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
322 return 32;
323
324 case PIPE_CAPF_MAX_POINT_WIDTH:
325 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
326 return 512.0f;
327
328 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
329 return 0.0f;
330 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
331 return 0.0f;
332 case PIPE_CAPF_GUARD_BAND_LEFT:
333 case PIPE_CAPF_GUARD_BAND_TOP:
334 case PIPE_CAPF_GUARD_BAND_RIGHT:
335 case PIPE_CAPF_GUARD_BAND_BOTTOM:
336 return 0.0f;
337 default:
338 fprintf(stderr, "unknown paramf %d\n", param);
339 return 0;
340 }
341 }
342
343 static int
vc4_screen_get_shader_param(struct pipe_screen * pscreen,unsigned shader,enum pipe_shader_cap param)344 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
345 enum pipe_shader_cap param)
346 {
347 if (shader != PIPE_SHADER_VERTEX &&
348 shader != PIPE_SHADER_FRAGMENT) {
349 return 0;
350 }
351
352 /* this is probably not totally correct.. but it's a start: */
353 switch (param) {
354 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
355 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
356 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
357 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
358 return 16384;
359
360 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
361 return vc4_screen(pscreen)->has_control_flow;
362
363 case PIPE_SHADER_CAP_MAX_INPUTS:
364 if (shader == PIPE_SHADER_FRAGMENT)
365 return 8;
366 else
367 return 16;
368 case PIPE_SHADER_CAP_MAX_OUTPUTS:
369 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
370 case PIPE_SHADER_CAP_MAX_TEMPS:
371 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
372 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
373 return 16 * 1024 * sizeof(float);
374 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
375 return 1;
376 case PIPE_SHADER_CAP_MAX_PREDS:
377 return 0; /* nothing uses this */
378 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
379 return 0;
380 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
381 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
382 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
383 return 0;
384 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
385 return 1;
386 case PIPE_SHADER_CAP_SUBROUTINES:
387 return 0;
388 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
389 return 0;
390 case PIPE_SHADER_CAP_INTEGERS:
391 return 1;
392 case PIPE_SHADER_CAP_DOUBLES:
393 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
394 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
395 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
396 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
397 return 0;
398 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
399 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
400 return VC4_MAX_TEXTURE_SAMPLERS;
401 case PIPE_SHADER_CAP_PREFERRED_IR:
402 return PIPE_SHADER_IR_NIR;
403 case PIPE_SHADER_CAP_SUPPORTED_IRS:
404 return 0;
405 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
406 return 32;
407 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
408 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
409 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
410 return 0;
411 default:
412 fprintf(stderr, "unknown shader param %d\n", param);
413 return 0;
414 }
415 return 0;
416 }
417
418 static boolean
vc4_screen_is_format_supported(struct pipe_screen * pscreen,enum pipe_format format,enum pipe_texture_target target,unsigned sample_count,unsigned usage)419 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
420 enum pipe_format format,
421 enum pipe_texture_target target,
422 unsigned sample_count,
423 unsigned usage)
424 {
425 struct vc4_screen *screen = vc4_screen(pscreen);
426 unsigned retval = 0;
427
428 if (sample_count > 1 && sample_count != VC4_MAX_SAMPLES)
429 return FALSE;
430
431 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
432 !util_format_is_supported(format, usage)) {
433 return FALSE;
434 }
435
436 if (usage & PIPE_BIND_VERTEX_BUFFER) {
437 switch (format) {
438 case PIPE_FORMAT_R32G32B32A32_FLOAT:
439 case PIPE_FORMAT_R32G32B32_FLOAT:
440 case PIPE_FORMAT_R32G32_FLOAT:
441 case PIPE_FORMAT_R32_FLOAT:
442 case PIPE_FORMAT_R32G32B32A32_SNORM:
443 case PIPE_FORMAT_R32G32B32_SNORM:
444 case PIPE_FORMAT_R32G32_SNORM:
445 case PIPE_FORMAT_R32_SNORM:
446 case PIPE_FORMAT_R32G32B32A32_SSCALED:
447 case PIPE_FORMAT_R32G32B32_SSCALED:
448 case PIPE_FORMAT_R32G32_SSCALED:
449 case PIPE_FORMAT_R32_SSCALED:
450 case PIPE_FORMAT_R16G16B16A16_UNORM:
451 case PIPE_FORMAT_R16G16B16_UNORM:
452 case PIPE_FORMAT_R16G16_UNORM:
453 case PIPE_FORMAT_R16_UNORM:
454 case PIPE_FORMAT_R16G16B16A16_SNORM:
455 case PIPE_FORMAT_R16G16B16_SNORM:
456 case PIPE_FORMAT_R16G16_SNORM:
457 case PIPE_FORMAT_R16_SNORM:
458 case PIPE_FORMAT_R16G16B16A16_USCALED:
459 case PIPE_FORMAT_R16G16B16_USCALED:
460 case PIPE_FORMAT_R16G16_USCALED:
461 case PIPE_FORMAT_R16_USCALED:
462 case PIPE_FORMAT_R16G16B16A16_SSCALED:
463 case PIPE_FORMAT_R16G16B16_SSCALED:
464 case PIPE_FORMAT_R16G16_SSCALED:
465 case PIPE_FORMAT_R16_SSCALED:
466 case PIPE_FORMAT_R8G8B8A8_UNORM:
467 case PIPE_FORMAT_R8G8B8_UNORM:
468 case PIPE_FORMAT_R8G8_UNORM:
469 case PIPE_FORMAT_R8_UNORM:
470 case PIPE_FORMAT_R8G8B8A8_SNORM:
471 case PIPE_FORMAT_R8G8B8_SNORM:
472 case PIPE_FORMAT_R8G8_SNORM:
473 case PIPE_FORMAT_R8_SNORM:
474 case PIPE_FORMAT_R8G8B8A8_USCALED:
475 case PIPE_FORMAT_R8G8B8_USCALED:
476 case PIPE_FORMAT_R8G8_USCALED:
477 case PIPE_FORMAT_R8_USCALED:
478 case PIPE_FORMAT_R8G8B8A8_SSCALED:
479 case PIPE_FORMAT_R8G8B8_SSCALED:
480 case PIPE_FORMAT_R8G8_SSCALED:
481 case PIPE_FORMAT_R8_SSCALED:
482 retval |= PIPE_BIND_VERTEX_BUFFER;
483 break;
484 default:
485 break;
486 }
487 }
488
489 if ((usage & PIPE_BIND_RENDER_TARGET) &&
490 vc4_rt_format_supported(format)) {
491 retval |= PIPE_BIND_RENDER_TARGET;
492 }
493
494 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
495 vc4_tex_format_supported(format) &&
496 (format != PIPE_FORMAT_ETC1_RGB8 || screen->has_etc1)) {
497 retval |= PIPE_BIND_SAMPLER_VIEW;
498 }
499
500 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
501 (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
502 format == PIPE_FORMAT_X8Z24_UNORM)) {
503 retval |= PIPE_BIND_DEPTH_STENCIL;
504 }
505
506 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
507 (format == PIPE_FORMAT_I8_UINT ||
508 format == PIPE_FORMAT_I16_UINT)) {
509 retval |= PIPE_BIND_INDEX_BUFFER;
510 }
511
512 #if 0
513 if (retval != usage) {
514 fprintf(stderr,
515 "not supported: format=%s, target=%d, sample_count=%d, "
516 "usage=0x%x, retval=0x%x\n", util_format_name(format),
517 target, sample_count, usage, retval);
518 }
519 #endif
520
521 return retval == usage;
522 }
523
524 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
525
handle_hash(void * key)526 static unsigned handle_hash(void *key)
527 {
528 return PTR_TO_UINT(key);
529 }
530
handle_compare(void * key1,void * key2)531 static int handle_compare(void *key1, void *key2)
532 {
533 return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
534 }
535
536 static bool
vc4_has_feature(struct vc4_screen * screen,uint32_t feature)537 vc4_has_feature(struct vc4_screen *screen, uint32_t feature)
538 {
539 struct drm_vc4_get_param p = {
540 .param = feature,
541 };
542 int ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &p);
543
544 if (ret != 0)
545 return false;
546
547 return p.value;
548 }
549
550 static bool
vc4_get_chip_info(struct vc4_screen * screen)551 vc4_get_chip_info(struct vc4_screen *screen)
552 {
553 struct drm_vc4_get_param ident0 = {
554 .param = DRM_VC4_PARAM_V3D_IDENT0,
555 };
556 struct drm_vc4_get_param ident1 = {
557 .param = DRM_VC4_PARAM_V3D_IDENT1,
558 };
559 int ret;
560
561 ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &ident0);
562 if (ret != 0) {
563 if (errno == EINVAL) {
564 /* Backwards compatibility with 2835 kernels which
565 * only do V3D 2.1.
566 */
567 screen->v3d_ver = 21;
568 return true;
569 } else {
570 fprintf(stderr, "Couldn't get V3D IDENT0: %s\n",
571 strerror(errno));
572 return false;
573 }
574 }
575 ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &ident1);
576 if (ret != 0) {
577 fprintf(stderr, "Couldn't get V3D IDENT1: %s\n",
578 strerror(errno));
579 return false;
580 }
581
582 uint32_t major = (ident0.value >> 24) & 0xff;
583 uint32_t minor = (ident1.value >> 0) & 0xf;
584 screen->v3d_ver = major * 10 + minor;
585
586 if (screen->v3d_ver != 21) {
587 fprintf(stderr,
588 "V3D %d.%d not supported by this version of Mesa.\n",
589 screen->v3d_ver / 10,
590 screen->v3d_ver % 10);
591 return false;
592 }
593
594 return true;
595 }
596
597 struct pipe_screen *
vc4_screen_create(int fd)598 vc4_screen_create(int fd)
599 {
600 struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
601 struct pipe_screen *pscreen;
602
603 pscreen = &screen->base;
604
605 pscreen->destroy = vc4_screen_destroy;
606 pscreen->get_param = vc4_screen_get_param;
607 pscreen->get_paramf = vc4_screen_get_paramf;
608 pscreen->get_shader_param = vc4_screen_get_shader_param;
609 pscreen->context_create = vc4_context_create;
610 pscreen->is_format_supported = vc4_screen_is_format_supported;
611
612 screen->fd = fd;
613 list_inithead(&screen->bo_cache.time_list);
614 pipe_mutex_init(screen->bo_handles_mutex);
615 screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
616
617 screen->has_control_flow =
618 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_BRANCHES);
619 screen->has_etc1 =
620 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_ETC1);
621 screen->has_threaded_fs =
622 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_THREADED_FS);
623
624 if (!vc4_get_chip_info(screen))
625 goto fail;
626
627 slab_create_parent(&screen->transfer_pool, sizeof(struct vc4_transfer), 16);
628
629 vc4_fence_init(screen);
630
631 vc4_debug = debug_get_option_vc4_debug();
632 if (vc4_debug & VC4_DEBUG_SHADERDB)
633 vc4_debug |= VC4_DEBUG_NORAST;
634
635 #if USE_VC4_SIMULATOR
636 vc4_simulator_init(screen);
637 #endif
638
639 vc4_resource_screen_init(pscreen);
640
641 pscreen->get_name = vc4_screen_get_name;
642 pscreen->get_vendor = vc4_screen_get_vendor;
643 pscreen->get_device_vendor = vc4_screen_get_vendor;
644 pscreen->get_compiler_options = vc4_screen_get_compiler_options;
645
646 return pscreen;
647
648 fail:
649 close(fd);
650 ralloc_free(pscreen);
651 return NULL;
652 }
653
654 boolean
vc4_screen_bo_get_handle(struct pipe_screen * pscreen,struct vc4_bo * bo,unsigned stride,struct winsys_handle * whandle)655 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
656 struct vc4_bo *bo,
657 unsigned stride,
658 struct winsys_handle *whandle)
659 {
660 whandle->stride = stride;
661
662 /* If we're passing some reference to our BO out to some other part of
663 * the system, then we can't do any optimizations about only us being
664 * the ones seeing it (like BO caching or shadow update avoidance).
665 */
666 bo->private = false;
667
668 switch (whandle->type) {
669 case DRM_API_HANDLE_TYPE_SHARED:
670 return vc4_bo_flink(bo, &whandle->handle);
671 case DRM_API_HANDLE_TYPE_KMS:
672 whandle->handle = bo->handle;
673 return TRUE;
674 case DRM_API_HANDLE_TYPE_FD:
675 whandle->handle = vc4_bo_get_dmabuf(bo);
676 return whandle->handle != -1;
677 }
678
679 return FALSE;
680 }
681
682 struct vc4_bo *
vc4_screen_bo_from_handle(struct pipe_screen * pscreen,struct winsys_handle * whandle)683 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
684 struct winsys_handle *whandle)
685 {
686 struct vc4_screen *screen = vc4_screen(pscreen);
687
688 if (whandle->offset != 0) {
689 fprintf(stderr,
690 "Attempt to import unsupported winsys offset %u\n",
691 whandle->offset);
692 return NULL;
693 }
694
695 switch (whandle->type) {
696 case DRM_API_HANDLE_TYPE_SHARED:
697 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
698 case DRM_API_HANDLE_TYPE_FD:
699 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
700 default:
701 fprintf(stderr,
702 "Attempt to import unsupported handle type %d\n",
703 whandle->type);
704 return NULL;
705 }
706 }
707