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/external/valgrind/drd/
Ddrd_vc.c36 void DRD_(vc_reserve)(VectorClock* const vc, const unsigned new_capacity);
42 * Initialize the memory 'vc' points at as a vector clock with size 'size'.
46 void DRD_(vc_init)(VectorClock* const vc, in DRD_()
50 tl_assert(vc); in DRD_()
51 vc->size = 0; in DRD_()
52 vc->capacity = 0; in DRD_()
53 vc->vc = 0; in DRD_()
54 DRD_(vc_reserve)(vc, size); in DRD_()
55 tl_assert(size == 0 || vc->vc != 0); in DRD_()
58 VG_(memcpy)(vc->vc, vcelem, size * sizeof(vcelem[0])); in DRD_()
[all …]
Ddrd_segment.c89 DRD_(vc_copy)(&sg->vc, &creator_sg->vc); in sg_init()
91 DRD_(vc_init)(&sg->vc, 0, 0); in sg_init()
92 DRD_(vc_increment)(&sg->vc, created); in sg_init()
97 HChar* vc; in sg_init() local
99 vc = DRD_(vc_aprint)(&sg->vc); in sg_init()
100 VG_(message)(Vg_DebugMsg, "New segment for thread %u with vc %s\n", in sg_init()
101 created, vc); in sg_init()
102 VG_(free)(vc); in sg_init()
112 DRD_(vc_cleanup)(&sg->vc); in DRD_()
140 HChar* vc; in DRD_() local
[all …]
Ddrd_vc.h66 unsigned capacity; /**< number of elements allocated for array vc. */
67 unsigned size; /**< number of elements used of array vc. */
68 VCElem* vc; /**< vector clock elements. */ member
73 void DRD_(vc_init)(VectorClock* const vc,
76 void DRD_(vc_cleanup)(VectorClock* const vc);
79 void DRD_(vc_increment)(VectorClock* const vc, DrdThreadId const tid);
89 void DRD_(vc_print)(const VectorClock* const vc);
90 HChar* DRD_(vc_aprint)(const VectorClock* const vc);
91 void DRD_(vc_check)(const VectorClock* const vc);
109 while (j < vc2->size && vc2->vc[j].threadid < vc1->vc[i].threadid) in DRD_()
[all …]
Ddrd_thread.c415 HChar* vc; in DRD_() local
417 vc = DRD_(vc_aprint)(DRD_(thread_get_vc)(drd_joiner)); in DRD_()
419 ", new vc: %s", vc); in DRD_()
420 VG_(free)(vc); in DRD_()
890 return &latest_sg->vc; in DRD_()
914 * @param vc pointer to a vectorclock, holds result upon return.
916 static void DRD_(thread_compute_minimum_vc)(VectorClock* vc) in DRD_()
928 DRD_(vc_assign)(vc, &latest_sg->vc); in DRD_()
930 DRD_(vc_min)(vc, &latest_sg->vc); in DRD_()
939 * @param vc pointer to a vectorclock, holds result upon return.
[all …]
/external/curl/
DMakefile.dist23 VC=vc6
90 vc-clean: $(VC)
92 nmake -f Makefile.$(VC) clean
94 nmake -f Makefile.$(VC) clean
96 vc-all: $(VC)
98 nmake -f Makefile.$(VC) cfg=release
99 nmake -f Makefile.$(VC) cfg=release-ssl
100 nmake -f Makefile.$(VC) cfg=release-zlib
101 nmake -f Makefile.$(VC) cfg=release-ssl-zlib
102 nmake -f Makefile.$(VC) cfg=release-ssl-dll
[all …]
/external/fio/
Dverify.c298 static void __dump_verify_buffers(struct verify_header *hdr, struct vcont *vc) in __dump_verify_buffers() argument
300 struct thread_data *td = vc->td; in __dump_verify_buffers()
301 struct io_u *io_u = vc->io_u; in __dump_verify_buffers()
312 hdr_offset = vc->hdr_num * hdr->len; in __dump_verify_buffers()
315 "received", vc->io_u->file); in __dump_verify_buffers()
330 "expected", vc->io_u->file); in __dump_verify_buffers()
334 static void dump_verify_buffers(struct verify_header *hdr, struct vcont *vc) in dump_verify_buffers() argument
336 struct thread_data *td = vc->td; in dump_verify_buffers()
340 __fill_hdr(td, vc->io_u, &shdr, 0, vc->io_u->buflen, 0); in dump_verify_buffers()
344 __dump_verify_buffers(hdr, vc); in dump_verify_buffers()
[all …]
/external/swiftshader/third_party/subzero/tests_lit/reader_tests/
Dselect.ll9 %vc = trunc i32 %p to i1
12 %r = select i1 %vc, i1 %vt, i1 %ve
18 ; CHECK-NEXT: %vc = trunc i32 %p to i1
21 ; CHECK-NEXT: %r = select i1 %vc, i1 %vt, i1 %ve
27 %vc = trunc i32 %p to i1
30 %r = select i1 %vc, i8 %vt, i8 %ve
36 ; CHECK-NEXT: %vc = trunc i32 %p to i1
39 ; CHECK-NEXT: %r = select i1 %vc, i8 %vt, i8 %ve
45 %vc = trunc i32 %p to i1
48 %r = select i1 %vc, i16 %vt, i16 %ve
[all …]
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-operand-rn-t32-in-it-block.cc1671 {{vc, r0, r0}, true, vc, "vc r0 r0", "vc_r0_r0"},
1672 {{vc, r0, r1}, true, vc, "vc r0 r1", "vc_r0_r1"},
1673 {{vc, r0, r2}, true, vc, "vc r0 r2", "vc_r0_r2"},
1674 {{vc, r0, r3}, true, vc, "vc r0 r3", "vc_r0_r3"},
1675 {{vc, r0, r4}, true, vc, "vc r0 r4", "vc_r0_r4"},
1676 {{vc, r0, r5}, true, vc, "vc r0 r5", "vc_r0_r5"},
1677 {{vc, r0, r6}, true, vc, "vc r0 r6", "vc_r0_r6"},
1678 {{vc, r0, r7}, true, vc, "vc r0 r7", "vc_r0_r7"},
1679 {{vc, r0, r8}, true, vc, "vc r0 r8", "vc_r0_r8"},
1680 {{vc, r0, r9}, true, vc, "vc r0 r9", "vc_r0_r9"},
[all …]
Dtest-assembler-cond-rd-operand-rn-t32-low-registers-in-it-block.cc543 {{vc, r0, r0}, true, vc, "vc r0 r0", "vc_r0_r0"},
544 {{vc, r0, r1}, true, vc, "vc r0 r1", "vc_r0_r1"},
545 {{vc, r0, r2}, true, vc, "vc r0 r2", "vc_r0_r2"},
546 {{vc, r0, r3}, true, vc, "vc r0 r3", "vc_r0_r3"},
547 {{vc, r0, r4}, true, vc, "vc r0 r4", "vc_r0_r4"},
548 {{vc, r0, r5}, true, vc, "vc r0 r5", "vc_r0_r5"},
549 {{vc, r0, r6}, true, vc, "vc r0 r6", "vc_r0_r6"},
550 {{vc, r0, r7}, true, vc, "vc r0 r7", "vc_r0_r7"},
551 {{vc, r1, r0}, true, vc, "vc r1 r0", "vc_r1_r0"},
552 {{vc, r1, r1}, true, vc, "vc r1 r1", "vc_r1_r1"},
[all …]
Dtest-assembler-cond-rdlow-operand-imm8-t32-in-it-block.cc95 const TestData kTests[] = {{{vc, r1, 111}, true, vc, "vc r1 111", "vc_r1_111"},
109 {{vc, r7, 207}, true, vc, "vc r7 207", "vc_r7_207"},
119 {{vc, r0, 217}, true, vc, "vc r0 217", "vc_r0_217"},
139 {{vc, r6, 221}, true, vc, "vc r6 221", "vc_r6_221"},
144 {{vc, r3, 28}, true, vc, "vc r3 28", "vc_r3_28"},
161 {{vc, r5, 205}, true, vc, "vc r5 205", "vc_r5_205"},
174 {{vc, r1, 31}, true, vc, "vc r1 31", "vc_r1_31"},
206 {{vc, r1, 24}, true, vc, "vc r1 24", "vc_r1_24"},
222 {{vc, r3, 8}, true, vc, "vc r3 8", "vc_r3_8"},
226 {{vc, r6, 4}, true, vc, "vc r6 4", "vc_r6_4"},
[all …]
Dtest-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm8-in-it-block.cc98 {{vc, r6, r6, 138}, true, vc, "vc r6 r6 138", "vc_r6_r6_138"},
102 {{vc, r5, r5, 114}, true, vc, "vc r5 r5 114", "vc_r5_r5_114"},
112 {{vc, r0, r0, 83}, true, vc, "vc r0 r0 83", "vc_r0_r0_83"},
134 {{vc, r0, r0, 2}, true, vc, "vc r0 r0 2", "vc_r0_r0_2"},
144 {{vc, r3, r3, 203}, true, vc, "vc r3 r3 203", "vc_r3_r3_203"},
152 {{vc, r7, r7, 11}, true, vc, "vc r7 r7 11", "vc_r7_r7_11"},
177 {{vc, r0, r0, 200}, true, vc, "vc r0 r0 200", "vc_r0_r0_200"},
184 {{vc, r3, r3, 107}, true, vc, "vc r3 r3 107", "vc_r3_r3_107"},
195 {{vc, r2, r2, 69}, true, vc, "vc r2 r2 69", "vc_r2_r2_69"},
196 {{vc, r7, r7, 167}, true, vc, "vc r7 r7 167", "vc_r7_r7_167"},
[all …]
Dtest-assembler-cond-rdlow-rnlow-operand-immediate-t32-zero-in-it-block.cc543 {{vc, r0, r0, 0}, true, vc, "vc r0 r0 0", "vc_r0_r0_0"},
544 {{vc, r0, r1, 0}, true, vc, "vc r0 r1 0", "vc_r0_r1_0"},
545 {{vc, r0, r2, 0}, true, vc, "vc r0 r2 0", "vc_r0_r2_0"},
546 {{vc, r0, r3, 0}, true, vc, "vc r0 r3 0", "vc_r0_r3_0"},
547 {{vc, r0, r4, 0}, true, vc, "vc r0 r4 0", "vc_r0_r4_0"},
548 {{vc, r0, r5, 0}, true, vc, "vc r0 r5 0", "vc_r0_r5_0"},
549 {{vc, r0, r6, 0}, true, vc, "vc r0 r6 0", "vc_r0_r6_0"},
550 {{vc, r0, r7, 0}, true, vc, "vc r0 r7 0", "vc_r0_r7_0"},
551 {{vc, r1, r0, 0}, true, vc, "vc r1 r0 0", "vc_r1_r0_0"},
552 {{vc, r1, r1, 0}, true, vc, "vc r1 r1 0", "vc_r1_r1_0"},
[all …]
Dtest-assembler-cond-rdlow-rnlow-rmlow-t32-in-it-block.cc543 {{vc, r0, r0, r0}, true, vc, "vc r0 r0 r0", "vc_r0_r0_r0"},
544 {{vc, r0, r1, r0}, true, vc, "vc r0 r1 r0", "vc_r0_r1_r0"},
545 {{vc, r0, r2, r0}, true, vc, "vc r0 r2 r0", "vc_r0_r2_r0"},
546 {{vc, r0, r3, r0}, true, vc, "vc r0 r3 r0", "vc_r0_r3_r0"},
547 {{vc, r0, r4, r0}, true, vc, "vc r0 r4 r0", "vc_r0_r4_r0"},
548 {{vc, r0, r5, r0}, true, vc, "vc r0 r5 r0", "vc_r0_r5_r0"},
549 {{vc, r0, r6, r0}, true, vc, "vc r0 r6 r0", "vc_r0_r6_r0"},
550 {{vc, r0, r7, r0}, true, vc, "vc r0 r7 r0", "vc_r0_r7_r0"},
551 {{vc, r1, r0, r1}, true, vc, "vc r1 r0 r1", "vc_r1_r0_r1"},
552 {{vc, r1, r1, r1}, true, vc, "vc r1 r1 r1", "vc_r1_r1_r1"},
[all …]
Dtest-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm3-in-it-block.cc109 {{vc, r5, r2, 5}, true, vc, "vc r5 r2 5", "vc_r5_r2_5"},
115 {{vc, r1, r2, 0}, true, vc, "vc r1 r2 0", "vc_r1_r2_0"},
144 {{vc, r4, r2, 7}, true, vc, "vc r4 r2 7", "vc_r4_r2_7"},
184 {{vc, r1, r7, 1}, true, vc, "vc r1 r7 1", "vc_r1_r7_1"},
196 {{vc, r3, r4, 3}, true, vc, "vc r3 r4 3", "vc_r3_r4_3"},
201 {{vc, r3, r0, 3}, true, vc, "vc r3 r0 3", "vc_r3_r0_3"},
219 {{vc, r0, r2, 3}, true, vc, "vc r0 r2 3", "vc_r0_r2_3"},
247 {{vc, r5, r5, 4}, true, vc, "vc r5 r5 4", "vc_r5_r5_4"},
248 {{vc, r7, r2, 5}, true, vc, "vc r7 r2 5", "vc_r7_r2_5"},
262 {{vc, r5, r1, 6}, true, vc, "vc r5 r1 6", "vc_r5_r1_6"},
[all …]
Dtest-assembler-cond-rd-operand-rn-shift-rs-t32-in-it-block.cc100 {{vc, r4, r4, ROR, r1}, true, vc, "vc r4 r4 ROR r1", "vc_r4_r4_ROR_r1"},
102 {{vc, r4, r4, LSR, r4}, true, vc, "vc r4 r4 LSR r4", "vc_r4_r4_LSR_r4"},
134 {{vc, r5, r5, ROR, r3}, true, vc, "vc r5 r5 ROR r3", "vc_r5_r5_ROR_r3"},
138 {{vc, r6, r6, ASR, r7}, true, vc, "vc r6 r6 ASR r7", "vc_r6_r6_ASR_r7"},
155 {{vc, r3, r3, LSR, r7}, true, vc, "vc r3 r3 LSR r7", "vc_r3_r3_LSR_r7"},
157 {{vc, r1, r1, LSL, r7}, true, vc, "vc r1 r1 LSL r7", "vc_r1_r1_LSL_r7"},
169 {{vc, r2, r2, LSR, r7}, true, vc, "vc r2 r2 LSR r7", "vc_r2_r2_LSR_r7"},
187 {{vc, r6, r6, LSL, r0}, true, vc, "vc r6 r6 LSL r0", "vc_r6_r6_LSL_r0"},
198 {{vc, r5, r5, LSR, r3}, true, vc, "vc r5 r5 LSR r3", "vc_r5_r5_LSR_r3"},
199 {{vc, r4, r4, LSL, r4}, true, vc, "vc r4 r4 LSL r4", "vc_r4_r4_LSL_r4"},
[all …]
Dtest-assembler-cond-rd-operand-rn-shift-amount-1to31-t32-in-it-block.cc104 {{vc, r2, r2, LSL, 22}, true, vc, "vc r2 r2 LSL 22", "vc_r2_r2_LSL_22"},
127 {{vc, r0, r5, LSL, 20}, true, vc, "vc r0 r5 LSL 20", "vc_r0_r5_LSL_20"},
129 {{vc, r6, r0, LSL, 13}, true, vc, "vc r6 r0 LSL 13", "vc_r6_r0_LSL_13"},
134 {{vc, r5, r6, LSL, 5}, true, vc, "vc r5 r6 LSL 5", "vc_r5_r6_LSL_5"},
145 {{vc, r6, r3, LSL, 17}, true, vc, "vc r6 r3 LSL 17", "vc_r6_r3_LSL_17"},
157 {{vc, r6, r6, LSL, 31}, true, vc, "vc r6 r6 LSL 31", "vc_r6_r6_LSL_31"},
160 {{vc, r6, r4, LSL, 20}, true, vc, "vc r6 r4 LSL 20", "vc_r6_r4_LSL_20"},
180 {{vc, r3, r7, LSL, 25}, true, vc, "vc r3 r7 LSL 25", "vc_r3_r7_LSL_25"},
188 {{vc, r3, r2, LSL, 24}, true, vc, "vc r3 r2 LSL 24", "vc_r3_r2_LSL_24"},
206 {{vc, r4, r2, LSL, 24}, true, vc, "vc r4 r2 LSL 24", "vc_r4_r2_LSL_24"},
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-t32-all-low-in-it-block.cc103 {{vc, r4, r3, r4}, true, vc, "vc r4 r3 r4", "vc_r4_r3_r4"},
142 {{vc, r6, r2, r3}, true, vc, "vc r6 r2 r3", "vc_r6_r2_r3"},
148 {{vc, r4, r6, r3}, true, vc, "vc r4 r6 r3", "vc_r4_r6_r3"},
159 {{vc, r4, r1, r6}, true, vc, "vc r4 r1 r6", "vc_r4_r1_r6"},
160 {{vc, r5, r0, r1}, true, vc, "vc r5 r0 r1", "vc_r5_r0_r1"},
169 {{vc, r2, r0, r3}, true, vc, "vc r2 r0 r3", "vc_r2_r0_r3"},
176 {{vc, r0, r3, r7}, true, vc, "vc r0 r3 r7", "vc_r0_r3_r7"},
178 {{vc, r3, r0, r3}, true, vc, "vc r3 r0 r3", "vc_r3_r0_r3"},
198 {{vc, r7, r2, r6}, true, vc, "vc r7 r2 r6", "vc_r7_r2_r6"},
240 {{vc, r2, r1, r0}, true, vc, "vc r2 r1 r0", "vc_r2_r1_r0"},
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-t32-rd-is-rn-in-it-block.cc100 {{vc, r11, r11, r0}, true, vc, "vc r11 r11 r0", "vc_r11_r11_r0"},
133 {{vc, r8, r8, r6}, true, vc, "vc r8 r8 r6", "vc_r8_r8_r6"},
143 {{vc, r6, r6, r14}, true, vc, "vc r6 r6 r14", "vc_r6_r6_r14"},
148 {{vc, r10, r10, r8}, true, vc, "vc r10 r10 r8", "vc_r10_r10_r8"},
151 {{vc, r1, r1, r7}, true, vc, "vc r1 r1 r7", "vc_r1_r1_r7"},
160 {{vc, r9, r9, r12}, true, vc, "vc r9 r9 r12", "vc_r9_r9_r12"},
177 {{vc, r9, r9, r11}, true, vc, "vc r9 r9 r11", "vc_r9_r9_r11"},
199 {{vc, r12, r12, r10}, true, vc, "vc r12 r12 r10", "vc_r12_r12_r10"},
207 {{vc, r13, r13, r2}, true, vc, "vc r13 r13 r2", "vc_r13_r13_r2"},
254 {{vc, r14, r14, r2}, true, vc, "vc r14 r14 r2", "vc_r14_r14_r2"},
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-t32-all-low-rd-is-rn-in-it-block.cc137 {{vc, r0, r0, r3}, true, vc, "vc r0 r0 r3", "vc_r0_r0_r3"},
140 {{vc, r0, r0, r1}, true, vc, "vc r0 r0 r1", "vc_r0_r0_r1"},
181 {{vc, r4, r4, r2}, true, vc, "vc r4 r4 r2", "vc_r4_r4_r2"},
182 {{vc, r4, r4, r7}, true, vc, "vc r4 r4 r7", "vc_r4_r4_r7"},
198 {{vc, r4, r4, r1}, true, vc, "vc r4 r4 r1", "vc_r4_r4_r1"},
238 {{vc, r2, r2, r3}, true, vc, "vc r2 r2 r3", "vc_r2_r2_r3"},
295 {{vc, r0, r0, r5}, true, vc, "vc r0 r0 r5", "vc_r0_r0_r5"},
311 {{vc, r0, r0, r4}, true, vc, "vc r0 r0 r4", "vc_r0_r0_r4"},
312 {{vc, r4, r4, r5}, true, vc, "vc r4 r4 r5", "vc_r4_r4_r5"},
321 {{vc, r1, r1, r1}, true, vc, "vc r1 r1 r1", "vc_r1_r1_r1"},
[all …]
/external/valgrind/drd/tests/
Dannotate_trace_memory.stderr.exp-mips323 store 0x........ size 4 val 1065353216/0x........ (thread x / vc ...)
5 load 0x........ size 4 (thread x / vc ...)
7 store 0x........ size 4 val 1077936128/0x........ (thread x / vc ...)
10 store 0x........ size 4 val 0/0x........ (thread x / vc ...)
12 store 0x........ size 4 val 1074266112/0x........ (thread x / vc ...)
14 load 0x........ size 4 (thread x / vc ...)
16 load 0x........ size 4 (thread x / vc ...)
18 store 0x........ size 4 val 0/0x........ (thread x / vc ...)
20 store 0x........ size 4 val 1075576832/0x........ (thread x / vc ...)
23 store 0x........ size 1 val 5/0x........ (thread x / vc ...)
[all …]
Dannotate_trace_memory.stderr.exp-32bit3 store 0x........ size 4 val 1065353216/0x........ (thread x / vc ...)
5 load 0x........ size 4 (thread x / vc ...)
7 store 0x........ size 4 val 1077936128/0x........ (thread x / vc ...)
10 store 0x........ size 8 val 4613937818241073152/0x........ (thread x / vc ...)
12 load 0x........ size 8 (thread x / vc ...)
14 store 0x........ size 8 val 4619567317775286272/0x........ (thread x / vc ...)
17 store 0x........ size 1 val 5/0x........ (thread x / vc ...)
19 load 0x........ size 1 (thread x / vc ...)
21 store 0x........ size 1 val 11/0x........ (thread x / vc ...)
24 store 0x........ size 2 val 7/0x........ (thread x / vc ...)
[all …]
Dannotate_trace_memory.stderr.exp-64bit3 store 0x........ size 4 val 1065353216/0x........ (thread x / vc ...)
5 load 0x........ size 4 (thread x / vc ...)
7 store 0x........ size 4 val 1077936128/0x........ (thread x / vc ...)
10 store 0x........ size 8 val 4613937818241073152/0x........ (thread x / vc ...)
12 load 0x........ size 8 (thread x / vc ...)
14 store 0x........ size 8 val 4619567317775286272/0x........ (thread x / vc ...)
17 store 0x........ size 1 val 5/0x........ (thread x / vc ...)
19 load 0x........ size 1 (thread x / vc ...)
21 store 0x........ size 1 val 11/0x........ (thread x / vc ...)
24 store 0x........ size 2 val 7/0x........ (thread x / vc ...)
[all …]
/external/tremolo/Tremolo/
Dtreminfo.c58 void vorbis_comment_init(vorbis_comment *vc){ in vorbis_comment_init() argument
59 memset(vc,0,sizeof(*vc)); in vorbis_comment_init()
74 char *vorbis_comment_query(vorbis_comment *vc, char *tag, int count){ in vorbis_comment_query() argument
83 for(i=0;i<vc->comments;i++){ in vorbis_comment_query()
84 if(!tagcompare(vc->user_comments[i], fulltag, taglen)){ in vorbis_comment_query()
87 return vc->user_comments[i] + taglen; in vorbis_comment_query()
95 int vorbis_comment_query_count(vorbis_comment *vc, char *tag){ in vorbis_comment_query_count() argument
102 for(i=0;i<vc->comments;i++){ in vorbis_comment_query_count()
103 if(!tagcompare(vc->user_comments[i], fulltag, taglen)) in vorbis_comment_query_count()
110 void vorbis_comment_clear(vorbis_comment *vc){ in vorbis_comment_clear() argument
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dswaps-le-2.ll7 ; vector char vc = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
16 ; vcr = (vector char){vc[5], vc[5], vc[5], vc[5], vc[5], vc[5], vc[5], vc[5],
17 ; vc[5], vc[5], vc[5], vc[5], vc[5], vc[5], vc[5], vc[5]};
31 @vc = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i…
41 %0 = load <16 x i8>, <16 x i8>* @vc, align 16
/external/mesa3d/src/gallium/drivers/nouveau/
Dnouveau_vp3_video_bsp.c164 struct vc1_picparm_bsp *vc = (struct vc1_picparm_bsp *)map; in nouveau_vp3_fill_picparm_vc1_bsp() local
166 vc->width = dec->base.width; in nouveau_vp3_fill_picparm_vc1_bsp()
167 vc->height = dec->base.height; in nouveau_vp3_fill_picparm_vc1_bsp()
168 vc->profile = dec->base.profile - PIPE_VIDEO_PROFILE_VC1_SIMPLE; // 04 in nouveau_vp3_fill_picparm_vc1_bsp()
169 vc->postprocflag = d->postprocflag; in nouveau_vp3_fill_picparm_vc1_bsp()
170 vc->pulldown = d->pulldown; in nouveau_vp3_fill_picparm_vc1_bsp()
171 vc->interlaced = d->interlace; in nouveau_vp3_fill_picparm_vc1_bsp()
172 vc->tfcntrflag = d->tfcntrflag; // 08 in nouveau_vp3_fill_picparm_vc1_bsp()
173 vc->finterpflag = d->finterpflag; in nouveau_vp3_fill_picparm_vc1_bsp()
174 vc->psf = d->psf; in nouveau_vp3_fill_picparm_vc1_bsp()
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