| /external/valgrind/none/tests/mips64/ |
| D | fpu_load_store.stdout.exp-BE | 2 ldc1 :: offset: 0x0, out: 0x0
3 ldc1 :: offset: 0x8, out: 0x9823b6e0d4326d9
4 ldc1 :: offset: 0x10, out: 0x130476dc17c56b6b
5 ldc1 :: offset: 0x18, out: 0x1a864db21e475005
6 ldc1 :: offset: 0x20, out: 0x2608edb822c9f00f
7 ldc1 :: offset: 0x28, out: 0x2f8ad6d62b4bcb61
8 ldc1 :: offset: 0x30, out: 0x350c9b6431cd86d3
9 ldc1 :: offset: 0x38, out: 0x3c8ea00a384fbdbd
10 ldc1 :: offset: 0x40, out: 0x4c11db7048d0c6c7
11 ldc1 :: offset: 0x48, out: 0x4593e01e4152fda9
[all …]
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| D | fpu_load_store.stdout.exp-LE | 2 ldc1 :: offset: 0x0, out: 0x0
3 ldc1 :: offset: 0x8, out: 0xd4326d909823b6e
4 ldc1 :: offset: 0x10, out: 0x17c56b6b130476dc
5 ldc1 :: offset: 0x18, out: 0x1e4750051a864db2
6 ldc1 :: offset: 0x20, out: 0x22c9f00f2608edb8
7 ldc1 :: offset: 0x28, out: 0x2b4bcb612f8ad6d6
8 ldc1 :: offset: 0x30, out: 0x31cd86d3350c9b64
9 ldc1 :: offset: 0x38, out: 0x384fbdbd3c8ea00a
10 ldc1 :: offset: 0x40, out: 0x48d0c6c74c11db70
11 ldc1 :: offset: 0x48, out: 0x4152fda94593e01e
[all …]
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| D | load_store.stdout.exp-BE | 1 lb :: offset: 0x0, out: 0x0
2 lb :: offset: 0x1, out: 0x0
3 lb :: offset: 0x2, out: 0x0
4 lb :: offset: 0x3, out: 0x0
5 lb :: offset: 0x4, out: 0x0
6 lb :: offset: 0x5, out: 0x0
7 lb :: offset: 0x6, out: 0x0
8 lb :: offset: 0x7, out: 0x0
9 lb :: offset: 0x8, out: 0x9
10 lb :: offset: 0x9, out: 0xffffffffffffff82
[all …]
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| D | load_store.stdout.exp-LE | 1 lb :: offset: 0x0, out: 0x0
2 lb :: offset: 0x1, out: 0x0
3 lb :: offset: 0x2, out: 0x0
4 lb :: offset: 0x3, out: 0x0
5 lb :: offset: 0x4, out: 0x0
6 lb :: offset: 0x5, out: 0x0
7 lb :: offset: 0x6, out: 0x0
8 lb :: offset: 0x7, out: 0x0
9 lb :: offset: 0x8, out: 0x6e
10 lb :: offset: 0x9, out: 0x3b
[all …]
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| D | cvm_lx_ins.stdout.exp-LE | 1 lhux :: offset: 0x4, out: 0x1db7
2 lhux :: offset: 0x8, out: 0x3b6e
3 lhux :: offset: 0xc, out: 0x26d9
4 lhux :: offset: 0x10, out: 0x76dc
5 lhux :: offset: 0x14, out: 0x6b6b
6 lhux :: offset: 0x18, out: 0x4db2
7 lhux :: offset: 0x1c, out: 0x5005
8 lhux :: offset: 0x20, out: 0xedb8
9 lhux :: offset: 0x24, out: 0xf00f
10 lhux :: offset: 0x28, out: 0xd6d6
[all …]
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| D | cvm_lx_ins.stdout.exp-BE | 1 lhux :: offset: 0x4, out: 0x4c1
2 lhux :: offset: 0x8, out: 0x982
3 lhux :: offset: 0xc, out: 0xd43
4 lhux :: offset: 0x10, out: 0x1304
5 lhux :: offset: 0x14, out: 0x17c5
6 lhux :: offset: 0x18, out: 0x1a86
7 lhux :: offset: 0x1c, out: 0x1e47
8 lhux :: offset: 0x20, out: 0x2608
9 lhux :: offset: 0x24, out: 0x22c9
10 lhux :: offset: 0x28, out: 0x2f8a
[all …]
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| D | load_indexed_instructions.stdout.exp-LE | 1 ldx :: offset: 0x8, out: 0xd4326d909823b6e
2 ldx :: offset: 0x10, out: 0x17c56b6b130476dc
3 ldx :: offset: 0x18, out: 0x1e4750051a864db2
4 ldx :: offset: 0x20, out: 0x22c9f00f2608edb8
5 ldx :: offset: 0x28, out: 0x2b4bcb612f8ad6d6
6 ldx :: offset: 0x30, out: 0x31cd86d3350c9b64
7 ldx :: offset: 0x38, out: 0x384fbdbd3c8ea00a
8 ldx :: offset: 0x40, out: 0x48d0c6c74c11db70
9 ldx :: offset: 0x48, out: 0x4152fda94593e01e
10 ldx :: offset: 0x50, out: 0x5bd4b01b5f15adac
[all …]
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| D | load_indexed_instructions.stdout.exp-BE | 1 ldx :: offset: 0x8, out: 0x9823b6e0d4326d9
2 ldx :: offset: 0x10, out: 0x130476dc17c56b6b
3 ldx :: offset: 0x18, out: 0x1a864db21e475005
4 ldx :: offset: 0x20, out: 0x2608edb822c9f00f
5 ldx :: offset: 0x28, out: 0x2f8ad6d62b4bcb61
6 ldx :: offset: 0x30, out: 0x350c9b6431cd86d3
7 ldx :: offset: 0x38, out: 0x3c8ea00a384fbdbd
8 ldx :: offset: 0x40, out: 0x4c11db7048d0c6c7
9 ldx :: offset: 0x48, out: 0x4593e01e4152fda9
10 ldx :: offset: 0x50, out: 0x5f15adac5bd4b01b
[all …]
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| /external/elfutils/tests/ |
| D | run-show-die-info.sh | 28 Offset : 11
29 CU offset : 11
38 Offset : 104
39 CU offset : 104
45 Offset : 127
46 CU offset : 127
52 Offset : 146
53 CU offset : 11
62 Offset : 239
63 CU offset : 104
[all …]
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| D | run-show-abbrev.sh | 25 abbrev[0]: attr[0]: code = 16, form = 6, offset = 0
26 abbrev[0]: attr[1]: code = 18, form = 1, offset = 2
27 abbrev[0]: attr[2]: code = 17, form = 1, offset = 4
28 abbrev[0]: attr[3]: code = 3, form = 8, offset = 6
29 abbrev[0]: attr[4]: code = 27, form = 8, offset = 8
30 abbrev[0]: attr[5]: code = 37, form = 8, offset = 10
31 abbrev[0]: attr[6]: code = 19, form = 11, offset = 12
33 abbrev[19]: attr[0]: code = 1, form = 19, offset = 19
34 abbrev[19]: attr[1]: code = 63, form = 12, offset = 21
35 abbrev[19]: attr[2]: code = 3, form = 8, offset = 23
[all …]
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| /external/libnetfilter_conntrack/src/expect/ |
| D | snprintf_xml.c | 57 unsigned int size = 0, offset = 0; in snprintf_expect_meta_xml() local
60 BUFFER_SIZE(ret, size, len, offset); in snprintf_expect_meta_xml()
63 ret = snprintf(buf+offset, len, in snprintf_expect_meta_xml()
66 BUFFER_SIZE(ret, size, len, offset); in snprintf_expect_meta_xml()
69 ret = snprintf(buf+offset, len, "<timeout>%u</timeout>", in snprintf_expect_meta_xml()
71 BUFFER_SIZE(ret, size, len, offset); in snprintf_expect_meta_xml()
74 ret = snprintf(buf+offset, len, "<class>%u</class>", in snprintf_expect_meta_xml()
76 BUFFER_SIZE(ret, size, len, offset); in snprintf_expect_meta_xml()
79 ret = snprintf(buf+offset, len, "<zone>%u</zone>", exp->zone); in snprintf_expect_meta_xml()
80 BUFFER_SIZE(ret, size, len, offset); in snprintf_expect_meta_xml()
[all …]
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| /external/llvm/unittests/Support/ |
| D | DataExtractorTest.cpp | 28 uint32_t offset = 0; in TEST() local
30 EXPECT_EQ(0x80U, DE.getU8(&offset)); in TEST()
31 EXPECT_EQ(1U, offset); in TEST()
32 offset = 0; in TEST()
33 EXPECT_EQ(0x8090U, DE.getU16(&offset)); in TEST()
34 EXPECT_EQ(2U, offset); in TEST()
35 offset = 0; in TEST()
36 EXPECT_EQ(0x8090FFFFU, DE.getU32(&offset)); in TEST()
37 EXPECT_EQ(4U, offset); in TEST()
38 offset = 0; in TEST()
[all …]
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_state_dump.c | 73 batch_out(struct brw_context *brw, const char *name, uint32_t offset,
77 batch_out(struct brw_context *brw, const char *name, uint32_t offset, in batch_out() argument
80 uint32_t *data = brw->batch.bo->virtual + offset; in batch_out()
84 offset + index * 4, data[index], name); in batch_out()
91 batch_out64(struct brw_context *brw, const char *name, uint32_t offset, in batch_out64() argument
94 uint32_t *tmp = brw->batch.bo->virtual + offset; in batch_out64()
103 offset + index * 4, data, name); in batch_out64()
123 static void dump_vs_state(struct brw_context *brw, uint32_t offset) in dump_vs_state() argument
126 struct brw_vs_unit_state *vs = brw->batch.bo->virtual + offset; in dump_vs_state()
128 batch_out(brw, name, offset, 0, "thread0\n"); in dump_vs_state()
[all …]
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-memop-immediate-512-a32.cc | 73 int32_t offset; member
100 const TestData kTests[] = {{{pl, r13, r0, plus, 0, Offset},
103 "pl r13 r0 plus 0 Offset",
105 {{ge, r5, r3, plus, 0, Offset},
108 "ge r5 r3 plus 0 Offset",
110 {{cc, r0, r4, plus, 0, Offset},
113 "cc r0 r4 plus 0 Offset",
115 {{ge, r0, r0, plus, 0, Offset},
118 "ge r0 r0 plus 0 Offset",
120 {{eq, r12, r3, plus, 0, Offset},
[all …]
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| D | test-assembler-cond-rd-memop-immediate-8192-a32.cc | 73 int32_t offset; member
100 const TestData kTests[] = {{{pl, r13, r0, plus, 0, Offset},
103 "pl r13 r0 plus 0 Offset",
105 {{ge, r5, r3, plus, 0, Offset},
108 "ge r5 r3 plus 0 Offset",
110 {{cc, r0, r4, plus, 0, Offset},
113 "cc r0 r4 plus 0 Offset",
115 {{ge, r0, r0, plus, 0, Offset},
118 "ge r0 r0 plus 0 Offset",
120 {{eq, r12, r3, plus, 0, Offset},
[all …]
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| D | test-assembler-cond-rd-memop-rs-a32.cc | 104 const TestData kTests[] = {{{pl, r8, r11, plus, r6, Offset},
107 "pl r8 r11 plus r6 Offset",
109 {{le, r4, r8, plus, r5, Offset},
112 "le r4 r8 plus r5 Offset",
114 {{vs, r2, r6, plus, r14, Offset},
117 "vs r2 r6 plus r14 Offset",
119 {{ls, r1, r7, plus, r8, Offset},
122 "ls r1 r7 plus r8 Offset",
124 {{ge, r14, r6, plus, r14, Offset},
127 "ge r14 r6 plus r14 Offset",
[all …]
|
| D | test-assembler-cond-rd-memop-rs-shift-amount-1to32-a32.cc | 102 const TestData kTests[] = {{{pl, r8, r11, plus, r6, LSR, 1, Offset},
105 "pl r8 r11 plus r6 LSR 1 Offset",
107 {{le, r4, r8, plus, r5, LSR, 1, Offset},
110 "le r4 r8 plus r5 LSR 1 Offset",
112 {{vs, r2, r6, plus, r14, LSR, 1, Offset},
115 "vs r2 r6 plus r14 LSR 1 Offset",
117 {{ls, r1, r7, plus, r8, LSR, 1, Offset},
120 "ls r1 r7 plus r8 LSR 1 Offset",
122 {{ge, r14, r6, plus, r14, LSR, 1, Offset},
125 "ge r14 r6 plus r14 LSR 1 Offset",
[all …]
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| D | test-assembler-cond-rd-memop-rs-shift-amount-1to31-a32.cc | 102 const TestData kTests[] = {{{pl, r8, r11, plus, r6, LSL, 1, Offset},
105 "pl r8 r11 plus r6 LSL 1 Offset",
107 {{le, r4, r8, plus, r5, LSL, 1, Offset},
110 "le r4 r8 plus r5 LSL 1 Offset",
112 {{vs, r2, r6, plus, r14, LSL, 1, Offset},
115 "vs r2 r6 plus r14 LSL 1 Offset",
117 {{ls, r1, r7, plus, r8, LSL, 1, Offset},
120 "ls r1 r7 plus r8 LSL 1 Offset",
122 {{ge, r14, r6, plus, r14, LSL, 1, Offset},
125 "ge r14 r6 plus r14 LSL 1 Offset",
[all …]
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| /external/swiftshader/third_party/LLVM/unittests/Support/ |
| D | DataExtractorTest.cpp | 27 uint32_t offset = 0; in TEST() local
29 EXPECT_EQ(0x80U, DE.getU8(&offset)); in TEST()
30 EXPECT_EQ(1U, offset); in TEST()
31 offset = 0; in TEST()
32 EXPECT_EQ(0x8090U, DE.getU16(&offset)); in TEST()
33 EXPECT_EQ(2U, offset); in TEST()
34 offset = 0; in TEST()
35 EXPECT_EQ(0x8090FFFFU, DE.getU32(&offset)); in TEST()
36 EXPECT_EQ(4U, offset); in TEST()
37 offset = 0; in TEST()
[all …]
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| /external/proguard/src/proguard/optimize/peephole/ |
| D | BranchTargetFinder.java | 93 * Returns whether there is an instruction at the given offset in the
96 public boolean isInstruction(int offset) in isInstruction() argument
98 return (instructionMarks[offset] & INSTRUCTION) != 0; in isInstruction()
103 * Returns whether the instruction at the given offset is the target of
106 public boolean isTarget(int offset) in isTarget() argument
108 return offset == 0 || in isTarget()
109 (instructionMarks[offset] & (BRANCH_TARGET | in isTarget()
117 * Returns whether the instruction at the given offset is the origin of a
120 public boolean isBranchOrigin(int offset) in isBranchOrigin() argument
122 return (instructionMarks[offset] & BRANCH_ORIGIN) != 0; in isBranchOrigin()
[all …]
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| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/dexbacked/ |
| D | BaseDexBuffer.java | 45 public BaseDexBuffer(@Nonnull byte[] buf, int offset) { in BaseDexBuffer() argument
47 this.baseOffset = offset; in BaseDexBuffer()
50 public int readSmallUint(int offset) { in readSmallUint() argument
52 offset += baseOffset; in readSmallUint()
53 int result = (buf[offset] & 0xff) | in readSmallUint()
54 ((buf[offset+1] & 0xff) << 8) | in readSmallUint()
55 ((buf[offset+2] & 0xff) << 16) | in readSmallUint()
56 ((buf[offset+3]) << 24); in readSmallUint()
58 …row new ExceptionWithContext("Encountered small uint that is out of range at offset 0x%x", offset); in readSmallUint()
63 public int readOptionalUint(int offset) { in readOptionalUint() argument
[all …]
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| /external/libnetfilter_conntrack/src/conntrack/ |
| D | snprintf_xml.c | 100 unsigned int size = 0, offset = 0; in __snprintf_addr_xml() local
104 BUFFER_SIZE(ret, size, len, offset); in __snprintf_addr_xml()
108 ret = __snprintf_ipv4_xml(buf+offset, len, tuple, type); in __snprintf_addr_xml()
109 BUFFER_SIZE(ret, size, len, offset); in __snprintf_addr_xml()
112 ret = __snprintf_ipv6_xml(buf+offset, len, tuple, type); in __snprintf_addr_xml()
113 BUFFER_SIZE(ret, size, len, offset); in __snprintf_addr_xml()
117 ret = snprintf(buf+offset, len, "</%s>", tag); in __snprintf_addr_xml()
118 BUFFER_SIZE(ret, size, len, offset); in __snprintf_addr_xml()
128 unsigned int size = 0, offset = 0; in __snprintf_proto_xml() local
139 BUFFER_SIZE(ret, size, len, offset); in __snprintf_proto_xml()
[all …]
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| /external/flatbuffers/net/FlatBuffers/ |
| D | ByteBuffer.cs | 99 protected void WriteLittleEndian(int offset, int count, ulong data) in WriteLittleEndian() argument
105 _buffer[offset + i] = (byte)(data >> i * 8); in WriteLittleEndian()
112 _buffer[offset + count - 1 - i] = (byte)(data >> i * 8); in WriteLittleEndian()
117 protected ulong ReadLittleEndian(int offset, int count) in ReadLittleEndian() argument
119 AssertOffsetAndLength(offset, count); in ReadLittleEndian()
125 r |= (ulong)_buffer[offset + i] << i * 8; in ReadLittleEndian()
132 r |= (ulong)_buffer[offset + count - 1 - i] << i * 8; in ReadLittleEndian()
140 private void AssertOffsetAndLength(int offset, int length) in AssertOffsetAndLength() argument
143 if (offset < 0 || in AssertOffsetAndLength()
144 offset > _buffer.Length - length) in AssertOffsetAndLength()
[all …]
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| /external/libmojo/mojo/public/js/ |
| D | buffer.js | 57 Buffer.prototype.getUint8 = function(offset) { argument
58 return this.dataView.getUint8(offset);
60 Buffer.prototype.getUint16 = function(offset) { argument
61 return this.dataView.getUint16(offset, kHostIsLittleEndian);
63 Buffer.prototype.getUint32 = function(offset) { argument
64 return this.dataView.getUint32(offset, kHostIsLittleEndian);
66 Buffer.prototype.getUint64 = function(offset) { argument
69 lo = this.dataView.getUint32(offset, kHostIsLittleEndian);
70 hi = this.dataView.getUint32(offset + 4, kHostIsLittleEndian);
72 hi = this.dataView.getUint32(offset, kHostIsLittleEndian);
[all …]
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| /external/mesa3d/src/mesa/x86/ |
| D | gen_matypes.c | 97 #define OFFSET( s, t, m ) \ macro
122 OFFSET( "CTX_LIGHT_ENABLED ", struct gl_context, Light.Enabled ); in main()
123 OFFSET( "CTX_LIGHT_SHADE_MODEL ", struct gl_context, Light.ShadeModel ); in main()
124 OFFSET( "CTX_LIGHT_COLOR_MAT_FACE ", struct gl_context, Light.ColorMaterialFace ); in main()
125 OFFSET( "CTX_LIGHT_COLOR_MAT_MODE ", struct gl_context, Light.ColorMaterialMode ); in main()
126 OFFSET( "CTX_LIGHT_COLOR_MAT_MASK ", struct gl_context, Light._ColorMaterialBitmask ); in main()
127 OFFSET( "CTX_LIGHT_COLOR_MAT_ENABLED ", struct gl_context, Light.ColorMaterialEnabled ); in main()
128 OFFSET( "CTX_LIGHT_ENABLED_LIGHTS ", struct gl_context, Light._EnabledLights ); in main()
129 OFFSET( "CTX_LIGHT_NEED_VERTS ", struct gl_context, Light._NeedVertices ); in main()
130 OFFSET( "CTX_LIGHT_BASE_COLOR ", struct gl_context, Light._BaseColor ); in main()
[all …]
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