• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
2
3;CHECK: MIN * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
4
5define amdgpu_ps void @test(<4 x float> inreg %reg0) {
6   %r0 = extractelement <4 x float> %reg0, i32 0
7   %r1 = extractelement <4 x float> %reg0, i32 1
8   %r2 = fcmp uge float %r0, %r1
9   %r3 = select i1 %r2, float %r1, float %r0
10   %vec = insertelement <4 x float> undef, float %r3, i32 0
11   call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
12   ret void
13}
14
15declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
16