1;; Copyright ARM Ltd 2005. All rights reserved. 2 3ROM_LOAD 0x2000 4{ 5 6 ROM_EXEC 0x2000 7 { 8 init.o (CortexA8, +First) ; Create Translation Table 9 * (InRoot$$Sections) ; this section must be in a root region 10 } 11 12 I-TCM 0x30000 FIXED ; 0x1E000 ; built at 0x100 to avoid vector space 13 { ; assumes 32K I-TCM 14 15 * (+RO) ; any remaining code inc C lib. 16 } 17 18 D-TCM 0x230000 FIXED ; 0x40000 ; 8 Kb of D-TCM used for RW/ZI 19 { 20 * (+RW,+ZI) 21 } 22 23 HEAP 0x4E0000 EMPTY 0x100000 {} ; 8Kb Heap follows direcly after RW/ZI 24 25 STACK 0x300000 EMPTY -0x8000 {} ; 32KB Stack, starts after DTCM block. 26 27 TTB 0x20000 EMPTY 0x4000 {} ; place translation table at 0x28000, 16Kb required 28 29} 30