1 // Copyright 2014, VIXL authors 2 // All rights reserved. 3 // 4 // Redistribution and use in source and binary forms, with or without 5 // modification, are permitted provided that the following conditions are met: 6 // 7 // * Redistributions of source code must retain the above copyright notice, 8 // this list of conditions and the following disclaimer. 9 // * Redistributions in binary form must reproduce the above copyright notice, 10 // this list of conditions and the following disclaimer in the documentation 11 // and/or other materials provided with the distribution. 12 // * Neither the name of ARM Limited nor the names of its contributors may be 13 // used to endorse or promote products derived from this software without 14 // specific prior written permission. 15 // 16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27 #ifndef VIXL_CPU_AARCH64_H 28 #define VIXL_CPU_AARCH64_H 29 30 #include "../globals-vixl.h" 31 32 #include "instructions-aarch64.h" 33 34 namespace vixl { 35 namespace aarch64 { 36 37 class CPU { 38 public: 39 // Initialise CPU support. 40 static void SetUp(); 41 42 // Ensures the data at a given address and with a given size is the same for 43 // the I and D caches. I and D caches are not automatically coherent on ARM 44 // so this operation is required before any dynamically generated code can 45 // safely run. 46 static void EnsureIAndDCacheCoherency(void *address, size_t length); 47 48 // Handle tagged pointers. 49 template <typename T> SetPointerTag(T pointer,uint64_t tag)50 static T SetPointerTag(T pointer, uint64_t tag) { 51 VIXL_ASSERT(IsUintN(kAddressTagWidth, tag)); 52 53 // Use C-style casts to get static_cast behaviour for integral types (T), 54 // and reinterpret_cast behaviour for other types. 55 56 uint64_t raw = (uint64_t)pointer; 57 VIXL_STATIC_ASSERT(sizeof(pointer) == sizeof(raw)); 58 59 raw = (raw & ~kAddressTagMask) | (tag << kAddressTagOffset); 60 return (T)raw; 61 } 62 63 template <typename T> GetPointerTag(T pointer)64 static uint64_t GetPointerTag(T pointer) { 65 // Use C-style casts to get static_cast behaviour for integral types (T), 66 // and reinterpret_cast behaviour for other types. 67 68 uint64_t raw = (uint64_t)pointer; 69 VIXL_STATIC_ASSERT(sizeof(pointer) == sizeof(raw)); 70 71 return (raw & kAddressTagMask) >> kAddressTagOffset; 72 } 73 74 private: 75 // Return the content of the cache type register. 76 static uint32_t GetCacheType(); 77 78 // I and D cache line size in bytes. 79 static unsigned icache_line_size_; 80 static unsigned dcache_line_size_; 81 }; 82 83 } // namespace aarch64 84 } // namespace vixl 85 86 #endif // VIXL_CPU_AARCH64_H 87