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1 // Copyright 2015, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are met:
6 //
7 //   * Redistributions of source code must retain the above copyright notice,
8 //     this list of conditions and the following disclaimer.
9 //   * Redistributions in binary form must reproduce the above copyright notice,
10 //     this list of conditions and the following disclaimer in the documentation
11 //     and/or other materials provided with the distribution.
12 //   * Neither the name of ARM Limited nor the names of its contributors may be
13 //     used to endorse or promote products derived from this software without
14 //     specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 
27 
28 // ---------------------------------------------------------------------
29 // This file is auto generated using tools/generate_simulator_traces.py.
30 //
31 // PLEASE DO NOT EDIT.
32 // ---------------------------------------------------------------------
33 
34 #ifndef VIXL_SIM_CMLE_4H_2OPIMM_TRACE_AARCH64_H_
35 #define VIXL_SIM_CMLE_4H_2OPIMM_TRACE_AARCH64_H_
36 
37 const uint16_t kExpected_NEON_cmle_4H_2OPIMM[] = {
38   0xffff, 0xffff, 0xffff, 0xffff,
39   0xffff, 0xffff, 0xffff, 0xffff,
40   0xffff, 0xffff, 0xffff, 0xffff,
41   0xffff, 0xffff, 0xffff, 0xffff,
42   0xffff, 0xffff, 0xffff, 0xffff,
43   0xffff, 0xffff, 0xffff, 0x0000,
44   0xffff, 0xffff, 0x0000, 0x0000,
45   0xffff, 0x0000, 0x0000, 0x0000,
46   0x0000, 0x0000, 0x0000, 0x0000,
47   0x0000, 0x0000, 0x0000, 0x0000,
48   0x0000, 0x0000, 0x0000, 0x0000,
49   0x0000, 0x0000, 0x0000, 0x0000,
50   0x0000, 0x0000, 0x0000, 0x0000,
51   0x0000, 0x0000, 0x0000, 0x0000,
52   0x0000, 0x0000, 0x0000, 0x0000,
53   0x0000, 0x0000, 0x0000, 0x0000,
54   0x0000, 0x0000, 0x0000, 0xffff,
55   0x0000, 0x0000, 0xffff, 0xffff,
56   0x0000, 0xffff, 0xffff, 0xffff,
57   0xffff, 0xffff, 0xffff, 0xffff,
58   0xffff, 0xffff, 0xffff, 0xffff,
59   0xffff, 0xffff, 0xffff, 0xffff,
60   0xffff, 0xffff, 0xffff, 0xffff,
61   0xffff, 0xffff, 0xffff, 0xffff,
62 };
63 const unsigned kExpectedCount_NEON_cmle_4H_2OPIMM = 24;
64 
65 #endif  // VIXL_SIM_CMLE_4H_2OPIMM_TRACE_AARCH64_H_
66