1 /* rtl8139.c - etherboot driver for the Realtek 8139 chipset
2
3 ported from the linux driver written by Donald Becker
4 by Rainer Bawidamann (Rainer.Bawidamann@informatik.uni-ulm.de) 1999
5
6 This software may be used and distributed according to the terms
7 of the GNU Public License, incorporated herein by reference.
8
9 changes to the original driver:
10 - removed support for interrupts, switching to polling mode (yuck!)
11 - removed support for the 8129 chip (external MII)
12
13 */
14
15 FILE_LICENCE ( GPL_ANY );
16
17 /*********************************************************************/
18 /* Revision History */
19 /*********************************************************************/
20
21 /*
22 27 May 2006 mcb30@users.sourceforge.net (Michael Brown)
23 Rewrote to use the new net driver API, the updated PCI API, and
24 the generic three-wire serial device support for EEPROM access.
25
26 28 Dec 2002 ken_yap@users.sourceforge.net (Ken Yap)
27 Put in virt_to_bus calls to allow Etherboot relocation.
28
29 06 Apr 2001 ken_yap@users.sourceforge.net (Ken Yap)
30 Following email from Hyun-Joon Cha, added a disable routine, otherwise
31 NIC remains live and can crash the kernel later.
32
33 4 Feb 2000 espenlaub@informatik.uni-ulm.de (Klaus Espenlaub)
34 Shuffled things around, removed the leftovers from the 8129 support
35 that was in the Linux driver and added a bit more 8139 definitions.
36 Moved the 8K receive buffer to a fixed, available address outside the
37 0x98000-0x9ffff range. This is a bit of a hack, but currently the only
38 way to make room for the Etherboot features that need substantial amounts
39 of code like the ANSI console support. Currently the buffer is just below
40 0x10000, so this even conforms to the tagged boot image specification,
41 which reserves the ranges 0x00000-0x10000 and 0x98000-0xA0000. My
42 interpretation of this "reserved" is that Etherboot may do whatever it
43 likes, as long as its environment is kept intact (like the BIOS
44 variables). Hopefully fixed rtl_poll() once and for all. The symptoms
45 were that if Etherboot was left at the boot menu for several minutes, the
46 first eth_poll failed. Seems like I am the only person who does this.
47 First of all I fixed the debugging code and then set out for a long bug
48 hunting session. It took me about a week full time work - poking around
49 various places in the driver, reading Don Becker's and Jeff Garzik's Linux
50 driver and even the FreeBSD driver (what a piece of crap!) - and
51 eventually spotted the nasty thing: the transmit routine was acknowledging
52 each and every interrupt pending, including the RxOverrun and RxFIFIOver
53 interrupts. This confused the RTL8139 thoroughly. It destroyed the
54 Rx ring contents by dumping the 2K FIFO contents right where we wanted to
55 get the next packet. Oh well, what fun.
56
57 18 Jan 2000 mdc@etherboot.org (Marty Connor)
58 Drastically simplified error handling. Basically, if any error
59 in transmission or reception occurs, the card is reset.
60 Also, pointed all transmit descriptors to the same buffer to
61 save buffer space. This should decrease driver size and avoid
62 corruption because of exceeding 32K during runtime.
63
64 28 Jul 1999 (Matthias Meixner - meixner@rbg.informatik.tu-darmstadt.de)
65 rtl_poll was quite broken: it used the RxOK interrupt flag instead
66 of the RxBufferEmpty flag which often resulted in very bad
67 transmission performace - below 1kBytes/s.
68
69 */
70
71 #include <stdint.h>
72 #include <stdlib.h>
73 #include <stdio.h>
74 #include <string.h>
75 #include <gpxe/io.h>
76 #include <errno.h>
77 #include <unistd.h>
78 #include <byteswap.h>
79 #include <gpxe/pci.h>
80 #include <gpxe/if_ether.h>
81 #include <gpxe/ethernet.h>
82 #include <gpxe/iobuf.h>
83 #include <gpxe/netdevice.h>
84 #include <gpxe/spi_bit.h>
85 #include <gpxe/threewire.h>
86 #include <gpxe/nvo.h>
87
88 #define TX_RING_SIZE 4
89
90 struct rtl8139_tx {
91 unsigned int next;
92 struct io_buffer *iobuf[TX_RING_SIZE];
93 };
94
95 struct rtl8139_rx {
96 void *ring;
97 unsigned int offset;
98 };
99
100 struct rtl8139_nic {
101 unsigned short ioaddr;
102 struct rtl8139_tx tx;
103 struct rtl8139_rx rx;
104 struct spi_bit_basher spibit;
105 struct spi_device eeprom;
106 struct nvo_block nvo;
107 };
108
109 /* Tuning Parameters */
110 #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
111 #define RX_FIFO_THRESH 4 /* Rx buffer level before first PCI xfer. */
112 #define RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 bytes */
113 #define TX_DMA_BURST 4 /* Calculate as 16<<val. */
114 #define TX_IPG 3 /* This is the only valid value */
115 #define RX_BUF_LEN_IDX 0 /* 0, 1, 2 is allowed - 8,16,32K rx buffer */
116 #define RX_BUF_LEN ( (8192 << RX_BUF_LEN_IDX) )
117 #define RX_BUF_PAD 4
118
119 /* Symbolic offsets to registers. */
120 enum RTL8139_registers {
121 MAC0=0, /* Ethernet hardware address. */
122 MAR0=8, /* Multicast filter. */
123 TxStatus0=0x10, /* Transmit status (four 32bit registers). */
124 TxAddr0=0x20, /* Tx descriptors (also four 32bit). */
125 RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36,
126 ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A,
127 IntrMask=0x3C, IntrStatus=0x3E,
128 TxConfig=0x40, RxConfig=0x44,
129 Timer=0x48, /* general-purpose counter. */
130 RxMissed=0x4C, /* 24 bits valid, write clears. */
131 Cfg9346=0x50, Config0=0x51, Config1=0x52,
132 TimerIntrReg=0x54, /* intr if gp counter reaches this value */
133 MediaStatus=0x58,
134 Config3=0x59,
135 MultiIntr=0x5C,
136 RevisionID=0x5E, /* revision of the RTL8139 chip */
137 TxSummary=0x60,
138 MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,
139 NWayExpansion=0x6A,
140 DisconnectCnt=0x6C, FalseCarrierCnt=0x6E,
141 NWayTestReg=0x70,
142 RxCnt=0x72, /* packet received counter */
143 CSCR=0x74, /* chip status and configuration register */
144 PhyParm1=0x78,TwisterParm=0x7c,PhyParm2=0x80, /* undocumented */
145 /* from 0x84 onwards are a number of power management/wakeup frame
146 * definitions we will probably never need to know about. */
147 };
148
149 enum RxEarlyStatusBits {
150 ERGood=0x08, ERBad=0x04, EROVW=0x02, EROK=0x01
151 };
152
153 enum ChipCmdBits {
154 CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };
155
156 enum IntrMaskBits {
157 SERR=0x8000, TimeOut=0x4000, LenChg=0x2000,
158 FOVW=0x40, PUN_LinkChg=0x20, RXOVW=0x10,
159 TER=0x08, TOK=0x04, RER=0x02, ROK=0x01
160 };
161
162 /* Interrupt register bits, using my own meaningful names. */
163 enum IntrStatusBits {
164 PCIErr=0x8000, PCSTimeout=0x4000, CableLenChange= 0x2000,
165 RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10,
166 TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,
167 };
168 enum TxStatusBits {
169 TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000,
170 TxOutOfWindow=0x20000000, TxAborted=0x40000000,
171 TxCarrierLost=0x80000000,
172 };
173 enum RxStatusBits {
174 RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000,
175 RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,
176 RxBadAlign=0x0002, RxStatusOK=0x0001,
177 };
178
179 enum MediaStatusBits {
180 MSRTxFlowEnable=0x80, MSRRxFlowEnable=0x40, MSRSpeed10=0x08,
181 MSRLinkFail=0x04, MSRRxPauseFlag=0x02, MSRTxPauseFlag=0x01,
182 };
183
184 enum MIIBMCRBits {
185 BMCRReset=0x8000, BMCRSpeed100=0x2000, BMCRNWayEnable=0x1000,
186 BMCRRestartNWay=0x0200, BMCRDuplex=0x0100,
187 };
188
189 enum CSCRBits {
190 CSCR_LinkOKBit=0x0400, CSCR_LinkChangeBit=0x0800,
191 CSCR_LinkStatusBits=0x0f000, CSCR_LinkDownOffCmd=0x003c0,
192 CSCR_LinkDownCmd=0x0f3c0,
193 };
194
195 enum RxConfigBits {
196 RxCfgWrap=0x80,
197 Eeprom9356=0x40,
198 AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,
199 AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,
200 };
201
202 enum Config1Bits {
203 VPDEnable=0x02,
204 };
205
206 /* EEPROM access */
207 #define EE_M1 0x80 /* Mode select bit 1 */
208 #define EE_M0 0x40 /* Mode select bit 0 */
209 #define EE_CS 0x08 /* EEPROM chip select */
210 #define EE_SK 0x04 /* EEPROM shift clock */
211 #define EE_DI 0x02 /* Data in */
212 #define EE_DO 0x01 /* Data out */
213
214 /* Offsets within EEPROM (these are word offsets) */
215 #define EE_MAC 7
216
217 static const uint8_t rtl_ee_bits[] = {
218 [SPI_BIT_SCLK] = EE_SK,
219 [SPI_BIT_MOSI] = EE_DI,
220 [SPI_BIT_MISO] = EE_DO,
221 [SPI_BIT_SS(0)] = ( EE_CS | EE_M1 ),
222 };
223
rtl_spi_read_bit(struct bit_basher * basher,unsigned int bit_id)224 static int rtl_spi_read_bit ( struct bit_basher *basher,
225 unsigned int bit_id ) {
226 struct rtl8139_nic *rtl = container_of ( basher, struct rtl8139_nic,
227 spibit.basher );
228 uint8_t mask = rtl_ee_bits[bit_id];
229 uint8_t eereg;
230
231 eereg = inb ( rtl->ioaddr + Cfg9346 );
232 return ( eereg & mask );
233 }
234
rtl_spi_write_bit(struct bit_basher * basher,unsigned int bit_id,unsigned long data)235 static void rtl_spi_write_bit ( struct bit_basher *basher,
236 unsigned int bit_id, unsigned long data ) {
237 struct rtl8139_nic *rtl = container_of ( basher, struct rtl8139_nic,
238 spibit.basher );
239 uint8_t mask = rtl_ee_bits[bit_id];
240 uint8_t eereg;
241
242 eereg = inb ( rtl->ioaddr + Cfg9346 );
243 eereg &= ~mask;
244 eereg |= ( data & mask );
245 outb ( eereg, rtl->ioaddr + Cfg9346 );
246 }
247
248 static struct bit_basher_operations rtl_basher_ops = {
249 .read = rtl_spi_read_bit,
250 .write = rtl_spi_write_bit,
251 };
252
253 /** Portion of EEPROM available for non-volatile stored options
254 *
255 * We use offset 0x40 (i.e. address 0x20), length 0x40. This block is
256 * marked as VPD in the rtl8139 datasheets, so we use it only if we
257 * detect that the card is not supporting VPD.
258 */
259 static struct nvo_fragment rtl_nvo_fragments[] = {
260 { 0x20, 0x40 },
261 { 0, 0 }
262 };
263
264 /**
265 * Set up for EEPROM access
266 *
267 * @v netdev Net device
268 */
rtl_init_eeprom(struct net_device * netdev)269 static void rtl_init_eeprom ( struct net_device *netdev ) {
270 struct rtl8139_nic *rtl = netdev->priv;
271 int ee9356;
272 int vpd;
273
274 /* Initialise three-wire bus */
275 rtl->spibit.basher.op = &rtl_basher_ops;
276 rtl->spibit.bus.mode = SPI_MODE_THREEWIRE;
277 init_spi_bit_basher ( &rtl->spibit );
278
279 /* Detect EEPROM type and initialise three-wire device */
280 ee9356 = ( inw ( rtl->ioaddr + RxConfig ) & Eeprom9356 );
281 if ( ee9356 ) {
282 DBGC ( rtl, "rtl8139 %p EEPROM is an AT93C56\n", rtl );
283 init_at93c56 ( &rtl->eeprom, 16 );
284 } else {
285 DBGC ( rtl, "rtl8139 %p EEPROM is an AT93C46\n", rtl );
286 init_at93c46 ( &rtl->eeprom, 16 );
287 }
288 rtl->eeprom.bus = &rtl->spibit.bus;
289
290 /* Initialise space for non-volatile options, if available */
291 vpd = ( inw ( rtl->ioaddr + Config1 ) & VPDEnable );
292 if ( vpd ) {
293 DBGC ( rtl, "rtl8139 %p EEPROM in use for VPD; cannot use "
294 "for options\n", rtl );
295 } else {
296 nvo_init ( &rtl->nvo, &rtl->eeprom.nvs, rtl_nvo_fragments,
297 &netdev->refcnt );
298 }
299 }
300
301 /**
302 * Reset NIC
303 *
304 * @v netdev Net device
305 *
306 * Issues a hardware reset and waits for the reset to complete.
307 */
rtl_reset(struct net_device * netdev)308 static void rtl_reset ( struct net_device *netdev ) {
309 struct rtl8139_nic *rtl = netdev->priv;
310
311 /* Reset chip */
312 outb ( CmdReset, rtl->ioaddr + ChipCmd );
313 mdelay ( 10 );
314 memset ( &rtl->tx, 0, sizeof ( rtl->tx ) );
315 rtl->rx.offset = 0;
316 }
317
318 /**
319 * Open NIC
320 *
321 * @v netdev Net device
322 * @ret rc Return status code
323 */
rtl_open(struct net_device * netdev)324 static int rtl_open ( struct net_device *netdev ) {
325 struct rtl8139_nic *rtl = netdev->priv;
326 int i;
327
328 /* Program the MAC address */
329 for ( i = 0 ; i < ETH_ALEN ; i++ )
330 outb ( netdev->ll_addr[i], rtl->ioaddr + MAC0 + i );
331
332 /* Set up RX ring */
333 rtl->rx.ring = malloc ( RX_BUF_LEN + RX_BUF_PAD );
334 if ( ! rtl->rx.ring )
335 return -ENOMEM;
336 outl ( virt_to_bus ( rtl->rx.ring ), rtl->ioaddr + RxBuf );
337 DBGC ( rtl, "rtl8139 %p RX ring at %lx\n",
338 rtl, virt_to_bus ( rtl->rx.ring ) );
339
340 /* Enable TX and RX */
341 outb ( ( CmdRxEnb | CmdTxEnb ), rtl->ioaddr + ChipCmd );
342 outl ( ( ( RX_FIFO_THRESH << 13 ) | ( RX_BUF_LEN_IDX << 11 ) |
343 ( RX_DMA_BURST << 8 ) | AcceptBroadcast | AcceptMulticast |
344 AcceptMyPhys ), rtl->ioaddr + RxConfig );
345 outl ( 0xffffffffUL, rtl->ioaddr + MAR0 + 0 );
346 outl ( 0xffffffffUL, rtl->ioaddr + MAR0 + 4 );
347 outl ( ( ( TX_DMA_BURST << 8 ) | ( TX_IPG << 24 ) ),
348 rtl->ioaddr + TxConfig );
349
350 return 0;
351 }
352
353 /**
354 * Close NIC
355 *
356 * @v netdev Net device
357 */
rtl_close(struct net_device * netdev)358 static void rtl_close ( struct net_device *netdev ) {
359 struct rtl8139_nic *rtl = netdev->priv;
360
361 /* Reset the hardware to disable everything in one go */
362 rtl_reset ( netdev );
363
364 /* Free RX ring */
365 free ( rtl->rx.ring );
366 rtl->rx.ring = NULL;
367 }
368
369 /**
370 * Transmit packet
371 *
372 * @v netdev Network device
373 * @v iobuf I/O buffer
374 * @ret rc Return status code
375 */
rtl_transmit(struct net_device * netdev,struct io_buffer * iobuf)376 static int rtl_transmit ( struct net_device *netdev,
377 struct io_buffer *iobuf ) {
378 struct rtl8139_nic *rtl = netdev->priv;
379
380 /* Check for space in TX ring */
381 if ( rtl->tx.iobuf[rtl->tx.next] != NULL ) {
382 DBGC ( rtl, "rtl8139 %p TX overflow\n", rtl );
383 return -ENOBUFS;
384 }
385
386 /* Pad and align packet */
387 iob_pad ( iobuf, ETH_ZLEN );
388
389 /* Add to TX ring */
390 DBGC2 ( rtl, "rtl8139 %p TX id %d at %lx+%zx\n", rtl, rtl->tx.next,
391 virt_to_bus ( iobuf->data ), iob_len ( iobuf ) );
392 rtl->tx.iobuf[rtl->tx.next] = iobuf;
393 outl ( virt_to_bus ( iobuf->data ),
394 rtl->ioaddr + TxAddr0 + 4 * rtl->tx.next );
395 outl ( ( ( ( TX_FIFO_THRESH & 0x7e0 ) << 11 ) | iob_len ( iobuf ) ),
396 rtl->ioaddr + TxStatus0 + 4 * rtl->tx.next );
397 rtl->tx.next = ( rtl->tx.next + 1 ) % TX_RING_SIZE;
398
399 return 0;
400 }
401
402 /**
403 * Poll for received packets
404 *
405 * @v netdev Network device
406 */
rtl_poll(struct net_device * netdev)407 static void rtl_poll ( struct net_device *netdev ) {
408 struct rtl8139_nic *rtl = netdev->priv;
409 unsigned int status;
410 unsigned int tsad;
411 unsigned int rx_status;
412 unsigned int rx_len;
413 struct io_buffer *rx_iob;
414 int wrapped_len;
415 int i;
416
417 /* Acknowledge interrupts */
418 status = inw ( rtl->ioaddr + IntrStatus );
419 if ( ! status )
420 return;
421 outw ( status, rtl->ioaddr + IntrStatus );
422
423 /* Handle TX completions */
424 tsad = inw ( rtl->ioaddr + TxSummary );
425 for ( i = 0 ; i < TX_RING_SIZE ; i++ ) {
426 if ( ( rtl->tx.iobuf[i] != NULL ) && ( tsad & ( 1 << i ) ) ) {
427 DBGC2 ( rtl, "rtl8139 %p TX id %d complete\n",
428 rtl, i );
429 netdev_tx_complete ( netdev, rtl->tx.iobuf[i] );
430 rtl->tx.iobuf[i] = NULL;
431 }
432 }
433
434 /* Handle received packets */
435 while ( ! ( inw ( rtl->ioaddr + ChipCmd ) & RxBufEmpty ) ) {
436 rx_status = * ( ( uint16_t * )
437 ( rtl->rx.ring + rtl->rx.offset ) );
438 rx_len = * ( ( uint16_t * )
439 ( rtl->rx.ring + rtl->rx.offset + 2 ) );
440 if ( rx_status & RxOK ) {
441 DBGC2 ( rtl, "rtl8139 %p RX packet at offset "
442 "%x+%x\n", rtl, rtl->rx.offset, rx_len );
443
444 rx_iob = alloc_iob ( rx_len );
445 if ( ! rx_iob ) {
446 netdev_rx_err ( netdev, NULL, -ENOMEM );
447 /* Leave packet for next call to poll() */
448 break;
449 }
450
451 wrapped_len = ( ( rtl->rx.offset + 4 + rx_len )
452 - RX_BUF_LEN );
453 if ( wrapped_len < 0 )
454 wrapped_len = 0;
455
456 memcpy ( iob_put ( rx_iob, rx_len - wrapped_len ),
457 rtl->rx.ring + rtl->rx.offset + 4,
458 rx_len - wrapped_len );
459 memcpy ( iob_put ( rx_iob, wrapped_len ),
460 rtl->rx.ring, wrapped_len );
461
462 netdev_rx ( netdev, rx_iob );
463 } else {
464 DBGC ( rtl, "rtl8139 %p RX bad packet (status %#04x "
465 "len %d)\n", rtl, rx_status, rx_len );
466 netdev_rx_err ( netdev, NULL, -EINVAL );
467 }
468 rtl->rx.offset = ( ( ( rtl->rx.offset + 4 + rx_len + 3 ) & ~3 )
469 % RX_BUF_LEN );
470 outw ( rtl->rx.offset - 16, rtl->ioaddr + RxBufPtr );
471 }
472 }
473
474 /**
475 * Enable/disable interrupts
476 *
477 * @v netdev Network device
478 * @v enable Interrupts should be enabled
479 */
rtl_irq(struct net_device * netdev,int enable)480 static void rtl_irq ( struct net_device *netdev, int enable ) {
481 struct rtl8139_nic *rtl = netdev->priv;
482
483 DBGC ( rtl, "rtl8139 %p interrupts %s\n",
484 rtl, ( enable ? "enabled" : "disabled" ) );
485 outw ( ( enable ? ( ROK | RER | TOK | TER ) : 0 ),
486 rtl->ioaddr + IntrMask );
487 }
488
489 /** RTL8139 net device operations */
490 static struct net_device_operations rtl_operations = {
491 .open = rtl_open,
492 .close = rtl_close,
493 .transmit = rtl_transmit,
494 .poll = rtl_poll,
495 .irq = rtl_irq,
496 };
497
498 /**
499 * Probe PCI device
500 *
501 * @v pci PCI device
502 * @v id PCI ID
503 * @ret rc Return status code
504 */
rtl_probe(struct pci_device * pci,const struct pci_device_id * id __unused)505 static int rtl_probe ( struct pci_device *pci,
506 const struct pci_device_id *id __unused ) {
507 struct net_device *netdev;
508 struct rtl8139_nic *rtl;
509 int rc;
510
511 /* Allocate net device */
512 netdev = alloc_etherdev ( sizeof ( *rtl ) );
513 if ( ! netdev )
514 return -ENOMEM;
515 netdev_init ( netdev, &rtl_operations );
516 rtl = netdev->priv;
517 pci_set_drvdata ( pci, netdev );
518 netdev->dev = &pci->dev;
519 memset ( rtl, 0, sizeof ( *rtl ) );
520 rtl->ioaddr = pci->ioaddr;
521
522 /* Fix up PCI device */
523 adjust_pci_device ( pci );
524
525 /* Reset the NIC, set up EEPROM access and read MAC address */
526 rtl_reset ( netdev );
527 rtl_init_eeprom ( netdev );
528 nvs_read ( &rtl->eeprom.nvs, EE_MAC, netdev->hw_addr, ETH_ALEN );
529
530 /* Mark as link up; we don't yet handle link state */
531 netdev_link_up ( netdev );
532
533 /* Register network device */
534 if ( ( rc = register_netdev ( netdev ) ) != 0 )
535 goto err_register_netdev;
536
537 /* Register non-volatile storage */
538 if ( rtl->nvo.nvs ) {
539 if ( ( rc = register_nvo ( &rtl->nvo,
540 netdev_settings ( netdev ) ) ) != 0)
541 goto err_register_nvo;
542 }
543
544 return 0;
545
546 err_register_nvo:
547 unregister_netdev ( netdev );
548 err_register_netdev:
549 rtl_reset ( netdev );
550 netdev_nullify ( netdev );
551 netdev_put ( netdev );
552 return rc;
553 }
554
555 /**
556 * Remove PCI device
557 *
558 * @v pci PCI device
559 */
rtl_remove(struct pci_device * pci)560 static void rtl_remove ( struct pci_device *pci ) {
561 struct net_device *netdev = pci_get_drvdata ( pci );
562 struct rtl8139_nic *rtl = netdev->priv;
563
564 if ( rtl->nvo.nvs )
565 unregister_nvo ( &rtl->nvo );
566 unregister_netdev ( netdev );
567 rtl_reset ( netdev );
568 netdev_nullify ( netdev );
569 netdev_put ( netdev );
570 }
571
572 static struct pci_device_id rtl8139_nics[] = {
573 PCI_ROM(0x10ec, 0x8129, "rtl8129", "Realtek 8129", 0),
574 PCI_ROM(0x10ec, 0x8139, "rtl8139", "Realtek 8139", 0),
575 PCI_ROM(0x10ec, 0x8138, "rtl8139b", "Realtek 8139B", 0),
576 PCI_ROM(0x1186, 0x1300, "dfe538", "DFE530TX+/DFE538TX", 0),
577 PCI_ROM(0x1113, 0x1211, "smc1211-1", "SMC EZ10/100", 0),
578 PCI_ROM(0x1112, 0x1211, "smc1211", "SMC EZ10/100", 0),
579 PCI_ROM(0x1500, 0x1360, "delta8139", "Delta Electronics 8139", 0),
580 PCI_ROM(0x4033, 0x1360, "addtron8139", "Addtron Technology 8139", 0),
581 PCI_ROM(0x1186, 0x1340, "dfe690txd", "D-Link DFE690TXD", 0),
582 PCI_ROM(0x13d1, 0xab06, "fe2000vx", "AboCom FE2000VX", 0),
583 PCI_ROM(0x1259, 0xa117, "allied8139", "Allied Telesyn 8139", 0),
584 PCI_ROM(0x14ea, 0xab06, "fnw3603tx", "Planex FNW-3603-TX", 0),
585 PCI_ROM(0x14ea, 0xab07, "fnw3800tx", "Planex FNW-3800-TX", 0),
586 PCI_ROM(0xffff, 0x8139, "clone-rtl8139", "Cloned 8139", 0),
587 };
588
589 struct pci_driver rtl8139_driver __pci_driver = {
590 .ids = rtl8139_nics,
591 .id_count = ( sizeof ( rtl8139_nics ) / sizeof ( rtl8139_nics[0] ) ),
592 .probe = rtl_probe,
593 .remove = rtl_remove,
594 };
595